Abstract: A protective member forming method includes forming a water film on a flat holding surface of a support base, placing a wafer on the water film formed on the holding surface and next freezing the water film in a condition where the wafer floats on an upper surface of the water film owing to the surface tension of the water film, thereby forming an ice layer and fixing the wafer on the ice layer, supplying a liquid resin curable by the application of ultraviolet light to the upper surface of the wafer, opposing a transparent sheet to the wafer with the liquid resin interposed therebetween, and applying ultraviolet light to the liquid resin, thereby curing the liquid resin to form a protective member on a whole of the upper surface of the wafer.

Abstract: An organic light-emitting diode (OLED) display and method of fabricating the same are disclosed. In one aspect, the OLED display includes a first substrate including a display area and a peripheral area surrounding the display area. The display area includes a plurality of pixels each including an OLED and the peripheral area includes a signal driver electrically connected to the pixels. A conductive layer is formed over the signal driver and on opposing sides of the signal driver and a second substrate is formed over the first substrate. The OLED display further includes a first seal interposed between the first and second substrates in the peripheral area and substantially sealing the first and second substrates and a second seal surrounding the first seal and formed over the signal driver.

Abstract: The manufacturing method for TFT array substrate of the invention exposes the negative photoresist material on the passivation layer with a semi-transmissive mask to form a crosslinked portion, first and second uncrosslinked portion; then, performs the first development to remove the first uncrosslinked portion and forms a via on the passivation layer, performs the ashing treatment for thinning the negative photoresist material to expose the second uncrosslinked portion, performs the second development to remove the second uncrosslinked portion; deposits transparent conductive material on negative photoresist material and exposed passivation layer to form a pixel electrode on passivation layer, and finally removes the remaining negative photoresist material and the transparent conductive material with photoresist stripping solution.

Abstract: A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

Abstract: A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.

Abstract: A display panel and a display device are disclosed. The display panel defines a basic display area and a light transmissive display area connected to the basic display area. The light transmissive display area includes an anode layer, a pixel defining layer, a light-emitting functional layer, and a cathode all sequentially laminated to each other. The anode layer includes a first transparent conductive layer, a metal reflective layer, and a second transparent conductive layer. The metal reflective layer is disposed on the first transparent conductive layer and corresponding to the light-emitting elements. The display device includes the display panel.

Abstract: The present disclosure is directed to systems and methods of improving the efficiency and reducing the power consumption of organic light emitting diode (OLED) display devices. The OLED display device includes an OLED display layer that includes a substrate, an anode layer, a transparent cathode layer, and a plurality of OLED display pixels disposed between the anode and the cathode layers. A light-scattering layer is selectively or randomly disposed on, across, or about at least a portion of the surface of the OLED display layer. The light-scattering layer includes one or more monolayers, each of which includes a plurality of nanoparticles having a principal dimension that is greater than 10% of the wavelength of the electromagnetic energy emitted by the OLED display layer.

Abstract: There are provided a fan-out sensor package and an optical fingerprint sensor module including the same. The fan-out sensor package includes: a connection member having a 5 through-hole; an image sensor disposed in the through-hole of the connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the connection member, the image sensor, and 10 an optical lens; and a redistribution layer disposed on the connection member, the image sensor, and the optical lens. The connection member includes a wiring layer, and the redistribution layer electrically connects the wiring layer and the connection pads to each other.

Abstract: Provided are a method for manufacturing an electronic device capable of efficiently utilizing a material and a method for removing impurities using the same.

Abstract: A display device includes a substrate including a display area and a peripheral area, a first insulating layer on the substrate, a first dam in the peripheral area and separated from the first insulating layer, an electrode power supply line on the substrate between the first insulating layer and the first dam, a protection conductive layer on the first insulating layer, extending over the electrode power supply line, electrically connected to the electrode power supply line, and including an uneven structure on an upper surface thereof, a pixel electrode on the first insulating layer, an opposite electrode on the pixel electrode, and contacting the protection conductive layer by extending to the peripheral area, and an encapsulation layer on the opposite electrode, and having a lower surface that contacts the upper surface of the protection conductive layer in a region where the protection conductive layer overlaps the electrode power supply line.

Abstract: A semiconductor device includes a semiconductor substrate and a pair of memory device structures. The semiconductor substrate includes a common source/drain region and a pair of individual source/drain regions, in which the common source/drain region is between the individual source/drain regions. The memory device structures each corresponds to one of the individual source/drain regions. Each memory device structure includes a trap storage structure, a control gate, a cap structure, and a word line. The trap storage structure is between the common source/drain region and the corresponding individual source/drain region. The control gate is over the trap storage structure. The cap structure is over the control gate, in which the cap structure comprises a nitride layer over the control gate and an oxide layer over the nitride layer. The word line is over the semiconductor substrate and laterally spaced from the control gate.

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

Abstract: The present disclosure provides a display substrate, a manufacturing method thereof and a display device, belonging to the technical field of displaying. The display substrate includes a display area and a wiring area. The manufacturing method includes: forming a barrier structure at least between the wiring area and the display area; and forming a rheological organic material in the wiring area, so that the rheological organic material levels in the wiring area to form a protective film covering the wiring area.

Abstract: A high-voltage sensing device providing full galvanic isolation between a high-voltage domain and a low-voltage domain, wherein the circuit topology of the device resembles that of a Wheatstone bridge, the Wheatstone bridge employing at least one voltage-controlled semiconductor resistor, wherein the circuit also comprises a reference source connected directly to the Wheatstone bridge and the device comprises a number of shielding structures to electrically isolate the high-voltage domain from the low-voltage domain.

Abstract: A photonic integrated device is provided, includes a substrate, a two-dimensional material unit and semiconductor light-emitting units located at both sides thereof are disposed on the substrate; the two-dimensional material unit is provided with a luminescent two-dimensional material of which a luminous band is longer than that of the semiconductor light-emitting unit, and the semiconductor light-emitting unit provides a pump light source for the two-dimensional material unit to pump the luminescent two-dimensional material to emit light. The photonic integrated device in the present disclosure can obtain different luminous bands by changing the number of layers or kinds of the luminescent two-dimensional material.

Abstract: A semiconductor device includes a non-volatile memory and a logic circuit. The non-volatile memory includes a stacked structure comprising a first insulating layer, a floating gate, a second insulating layer, a control gate and a third insulating layer stacked in this order from a substrate; an erase gate line; and a word line. The logic circuit includes a field effect transistor comprising a gate electrode. The word line includes a protrusion, and a height of the protrusion from the substrate is higher than a height of the erase gate line from the substrate. The word line and the gate electrode are formed of polysilicon.

Abstract: A light emitting device includes a window and a collimating component over a light emitting pixel. A light reflection performance of the light emitting pixel to an incoming ambient light is configured by the window to be appeared to have at least two regions, wherein one region of the at least two regions has a smaller transmittance to the incoming ambient light than the other, the light emitting pixel includes a plurality of sub-pixels separated with a space, and the space is smaller than a resolution of a human eye.

Abstract: Provided is a method for manufacturing a display device. The method may comprise providing a substrate, providing a first organic solution which includes a mixed solvent containing a first solvent having a first boiling point and a second solvent having a second boiling point, conducting a first depressurized drying to form a second organic solution, and conducting a second depressurized drying to form a preliminary organic layer.

Abstract: An organic light emitting display device includes: a thin film transistor disposed in a display area of a substrate; an insulating layer disposed on the thin film transistor; an organic light emitting element disposed on the insulating layer and connected to the thin film transistor; and an encapsulation layer covering the organic light emitting element. The encapsulation layer includes: a first inorganic layer extending from the organic light emitting element to a non-display area; an organic layer disposed on the first inorganic layer; a second inorganic layer extending from the organic layer to the non-display area; and an organic pattern layer disposed between the first inorganic layer and the second inorganic layer and spaced apart from the organic layer in the non-display area. At least a part of the first inorganic layer and at least a part of the second inorganic layer may contact each other in the non-display area.

Abstract: A MEMS device includes a semiconductor support body having a first cavity, a membrane including a peripheral portion, fixed to the support body, and a suspended portion. A first deformable structure is at a distance from a central part of the suspended portion of the membrane and a second deformable structure is laterally offset relative to the first deformable structure towards the peripheral portion of the membrane. A projecting region is fixed under the membrane. The second deformable structure is deformable so as to translate the central part of the suspended portion of the membrane along a first direction, and the first deformable structure is deformable so as to translate the central part of the suspended portion of the membrane along a second direction.