Abstract: An integrated circuit package and a method of fabrication of the same are provided. An opening is formed in a substrate. An embedded heat dissipation feature (eHDF) is placed in the opening in the substrate and is attached to the substrate using a high thermal conductivity adhesive. One or more bonded chips are attached to the substrate using a flip-chip method. The eHDF is thermally attached to one or more hot spots of the bonded chips. In some embodiments, the eHDF may comprise multiple physically disconnected portions. In other embodiments, the eHDF may have a perforated structure.

Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. In an embodiment, the semiconductor device includes a fin extending from a substrate, a gate structure over the channel region, a first spacer extending along a sidewall of the lower portion of the gate structure, and a second spacer extending along a sidewall of the upper portion of the gate structure. The fin includes a channel region and a source/drain (S/D) region adjacent to the channel region. The gate structure includes an upper portion and a lower portion. The second spacer is disposed on a top surface of the first spacer. The first spacer is formed of a first dielectric material and the second spacer is formed of a second dielectric material different from the first dielectric material.

Abstract: Light emitting diode (LED) devices and systems include a superstrate (e.g., a light-transmissive layer), at least one region of wavelength-conversion material in the light-transmissive layer, and LEDs attached to the superstrate at the location of the wavelength-conversion material. An encapsulant layer is formed over and/or around the LEDs with an opaque or clear material. Additional color filter layers are optionally applied to the light-transmissive layer. A method for producing LED devices and systems includes providing a superstrate with a wavelength-conversion material region formed therein, attaching LEDs to the superstrate at the die-attach layer, forming conductive surfaces on a side of the LED opposite the die-attach layer, dispensing an encapsulant layer to at least partially encapsulate the LEDs, and forming one or more electrical traces to electrically interconnect the conductive surfaces of at least some of the LEDs with each other.

Abstract: An image sensor includes a color filter on a substrate, first and second organic photodiodes on the color filter, and first and second capacitors connected to the first and second organic photodiodes, respectively. The color filter is spaced apart from a first surface of the substrate. Each of the first and second organic photodiodes face an upper surface of the color filter. The first capacitor includes a first conductive pattern and a first insulating space. The first conductive pattern extends through the substrate, and the first insulating spacer surrounds a sidewall of the first conductive pattern and has a first thickness. The second capacitor includes a second conductive pattern and a second insulating spacer. The second conductive pattern extends through the substrate, and the second insulating spacer surrounds a sidewall of the second conductive pattern and has a second thickness smaller than the first thickness.

Abstract: A semiconductor device including a static random access memory (SRAM) device includes a first SRAM array including a first plurality of bit cells arranged in a matrix; a second SRAM array including a second plurality of bit cells arranged in a matrix; and a plurality of abutting dummy cells disposed between the first SRAM array and the second SRAM array. Each of the plurality of abutting dummy cells includes a plurality of dummy gate electrode layers and a plurality of dummy contacts. The semiconductor device further includes a first-type well continuously extending from the first SRAM array to the second SRAM array. The first-type well is in direct contact with portions of the plurality of dummy contacts.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a first gate structure formed over a fin structure and a first spacer layer formed on the first gate structure. The FinFET device structure includes a first insulation layer formed over the fin structure, and the first insulating layer is adjacent to and separated from the first spacer layer. The FinFET device structure includes a conductive plug formed over the first gate structure, and the conductive plug is formed over the first spacer layer and the first insulation layer.

Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Abstract: An opto-electronic device includes: a first electrode; an organic layer disposed over the first electrode; a nucleation promoting coating disposed over the organic layer; a nucleation inhibiting coating covering a first region of the opto-electronic device; and a conductive coating covering a second region of the opto-electronic device.

Abstract: An active matrix substrate includes a TFT. The TFT includes a gate electrode, a semiconductor layer overlapping the gate electrode with a gate insulating film interposed therebetween, and a source electrode and a drain electrode disposed on the semiconductor layer. The source electrode, the drain electrode, and the semiconductor layer are covered with a first insulating film. The gate insulating film includes a first stepped portion in a portion covering a peripheral portion of the gate electrode. The first insulating film includes a first opening at a position overlapping a portion of the first stepped portion that is not covered with the source electrode and the drain electrode in a plan view.

Abstract: A light filter structure is provided. The light filter structure includes a substrate having a plurality of photoelectric conversion elements. The light filter structure also includes a dielectric-stacking layer disposed on the substrate. The light filter structure further includes a flattening layer disposed on the dielectric-stacking layer. The dielectric-stacking layer has a wedge portion and a flattening portion adjacent to the wedge portion, the wedge portion has a continuously or non-continuously varied thickness, and the flattening portion has a substantially constant thickness.

Abstract: An OLED is disclosed that includes an enhancement layer having optically active metamaterials, or hyperbolic metamaterials, which transfer radiative energy from the organic emissive material to a non-radiative mode, wherein the enhancement layer is disposed over the organic emissive layer opposite from the first electrode, and is positioned no more than a threshold distance away from the organic emissive layer, wherein the organic emissive material has a total non-radiative decay rate constant and a total radiative decay rate constant due to the presence of the enhancement layer, and the threshold distance is where the total non-radiative decay rate constant is equal to the total radiative decay rate constant; and an outcoupling layer disposed over the enhancement layer, wherein the outcoupling layer scatters radiative energy from the enhancement layer to free space.

Abstract: A process for producing a component includes a structure made of III-V material(s) on the surface of a substrate, the structure comprising at least one upper contact level defined on the surface of a first III-V material and a lower contact level defined on the surface of a second III-V material, comprising: successive operations of encapsulation of the structure with at least one dielectric; making primary apertures in a dielectric for the two contacts; making secondary apertures in a dielectric for the two contacts; at least partial filling of the apertures with at least one metallic material so as to produce upper contact bottom metallization and at least one upper contact pad in contact with the metallization for each of said contacts. A component produced by the process is also provided. The component may be a laser diode.

Abstract: Embodiments of the invention are directed to a method that includes forming a fin over a major surface of a substrate. The fin includes an active fin region having a top fin surface and a fin sidewall. The top fin surface is substantially parallel with respect to the major surface, and the fin sidewall is substantially perpendicular with respect to the major surface. A gate is formed over and around a central portion of the fin, the gate having a bottom gate region and a top gate region. The bottom gate region is substantially below the top fin surface and includes a bottom gate region sidewall that is substantially parallel with respect to the fin sidewall. The top gate region is substantially above the top fin surface and includes a top gate region sidewall that is at an angle with respect to the major surface.

Abstract: A display device includes a substrate including a display area and a peripheral area, a first insulating layer on the substrate, a first dam in the peripheral area and separated from the first insulating layer, an electrode power supply line on the substrate between the first insulating layer and the first dam, a protection conductive layer on the first insulating layer, extending over the electrode power supply line, electrically connected to the electrode power supply line, and including an uneven structure on an upper surface thereof, a pixel electrode on the first insulating layer, an opposite electrode on the pixel electrode, and contacting the protection conductive layer by extending to the peripheral area, and an encapsulation layer on the opposite electrode, and having a lower surface that contacts the upper surface of the protection conductive layer in a region where the protection conductive layer overlaps the electrode power supply line.

Abstract: A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.

Abstract: Provided are a manufacturing method of an organic light emitting diode back plate and the organic light emitting diode back plate. In the manufacturing method of an OLED back plate, pixel openings and light blocking grooves correspondingly above active layers are formed in a pixel definition layer. Then, OLED light-emitting functional layers are formed in the pixel openings and the black light shielding blocks completely covering the active layers are formed in the light shielding grooves by ink jet printing, thereby effectively preventing the TFT elements from being affected by the illumination and ensuring the characteristics of the TFT elements. The structure is simple and the production cost is low.

Abstract: A device includes a first semiconductor strip and a second semiconductor strip extending longitudinally in a first direction, where the first semiconductor strip and the second semiconductor strip are spaced apart from each other in a second direction. The device also includes a power supply line located between the first semiconductor strip and the second semiconductor strip. A top surface of the power supply line is recessed in comparison to a top surface of the first semiconductor strip. A source feature is disposed on a source region of the first semiconductor strip, and a source contact electrically couples the source feature to the power supply line. The source contact includes a lateral portion contacting a top surface of the source feature, and a vertical portion extending along a sidewall of the source feature towards the power supply line to physically contact the power supply line.

Abstract: A display device may include a light emitting element, a buffer layer, a gate insulation layer, and a switching element. A refractive index of the gate insulation layer may be equal to a refractive index of the buffer layer. The switching element may be electrically connected to the light emitting element and may include an active layer and a gate electrode. The active layer may be positioned between the buffer layer and the gate insulation layer and may directly contact at least one of the buffer layer and the gate insulation layer. The gate insulation layer may be positioned between the active layer and the gate electrode and may directly contact at least one of the active layer and the gate electrode.

Abstract: A memory device includes a channel element, a memory element, and an electrode element. The channel element has an open ring shape. A memory cell is defined in the memory element between the channel element and the electrode element.