Abstract: Systems and methods are provided for identifying a wire of a plurality of wires to be adjusted to mitigate effects of electromigration. A method includes identifying a plurality of wires of a circuit, each wire comprising a one or more wire segments. An electromigration stress is determined for each wire path of each wire, a wire path being made up of one or more wire segments. For each wire, a highest determined electromigration stress is assigned for wire paths of that wire as the wire electromigration stress for that wire. An identification of the wire having the highest wire electromigration stress is stored, where the wire having the highest wire electromigration stress is a candidate for adjustment to mitigate electromigration effects.

Abstract: A storage battery system connected to a power system includes: a storage battery; a BMU which monitors a state of the storage battery with a first sensor; a PCS which charges the storage battery and discharges from the storage battery with reference to an output value of a second sensor similar in type to the first sensor; and a control device. The control device receives a charge/discharge request and storage battery information supplied from the BMU and controls the PCS based on the charge/discharge request and the storage battery information. An abnormality detection unit of the control device acquires the output value of the second sensor from the PCS, and detects abnormality of any sensor as a result of comparison between the output value of the second sensor and an output value of the first sensor included in the storage battery information.

Abstract: In one embodiment, a method for building a clock tree for an integrated circuit design is provided. The clock tree may include a clock tree root node and a plurality of clock tree nodes that couple to sink pins for circuit elements of the integrated circuit design. The clock tree nodes may be arranged to distribute the clock signal to the sink pins. In synthesizing the clock tree, the sink pins may be clustered into one or more clusters. Clock tree nodes may be placed for the clock tree to distribute the clock signal to the one or more clusters. Timing information is determined to measure the clock signal delay from the root to the sink pins in the one or more clusters based on the placed one or more clock tree nodes. Different sets of timing information may be determined based on different sets of clock tree timing variation parameters. For example, the clock tree timing variation parameters includes timing information for multiple process corners and/or multiple modes of operation.

Abstract: A method for selecting transistor design parameters. A first set of simulations is used to calculate leakage current at a plurality of sets of design parameter values, and the results are fitted with a first response surface methodology model. The first model is used to generate a function that returns a value of a selected design parameter, for which a leakage current specification is just met. A second set of simulations is used to calculate effective drive current for a plurality of sets of design parameter values, and the results are fitted with a second response surface methodology model. The second model is used, together with the first, to search for a set of design parameter values at which a worst-case effective drive current is greatest, subject to the constraint of meeting the worst-case leakage current specification.

Abstract: A wireless charging device includes an enclosure base and an enclosure top. A portion of the enclosure top is inclined relative to the base. A power transmission antenna is disposed on an under-surface of the inclined portion. A first inlet is located proximate to the enclosure base for receiving ambient air. An outlet is located proximate to an apex of the inclined portion for exhausting air. Airflow from the inlet to the outlet is based only on passive air convection.

Abstract: A charge wake-up circuit for a battery management system (“BMS”) for an electric vehicle, the circuit including a charging plug connection circuit, a comparator circuit, and a DC wake-up circuit. The charge wake-up circuit monitors the state of the charger after the BMS turns off. If the charger charges the battery pack after the BMS turns off, the BMS will be started by the charge wake-up circuit and continue to monitor the battery pack. If the charger is off-line, the BMS will maintain the low-power state to prevent the automotive lead-acid battery from over-discharging.

Abstract: An embodiment is a system including a first wireless charging pad coupled to a wireless charging system and an energy source, the first wireless charging pad being configured to transmit an energy by a magnetic field. The system further includes a second wireless charging pad coupled to a second system, the second wireless charging pad configured to receive at least a portion of the energy from the first wireless charging system for operating the second system. Further embodiments include a least one of an electronic compass configured to provide alignment data of the first and second wireless charging pads, and an interface configured to receive the alignment data and affect an alignment of the first and second wireless charging pads.

Abstract: The present inventions, in one aspect, are directed to techniques and/or circuitry to applying a charge pulse to the terminals of the battery during a charging operation, measure a plurality of voltages of the battery which are in response to the first charge pulse, determine a charge pulse voltage (CPV) of the battery, wherein the charge pulse voltage is a peak voltage which is in response to the first charge pulse, determine whether the CPV of the battery is within a predetermined range or greater than a predetermined upper limit value and adapt one or more characteristics of a charge packet if the CPV is outside the predetermined range or is greater than a predetermined upper limit value.

Abstract: Systems and methods automatically generate code from an executable model. The code may be generated from one or more in-memory representations constructed for the model. The in-memory representations may be analyzed, and portions that can be mapped to DSP slices of a programmable logic device may be identified. The portions may be modified based on information for a particular programmable logic device, such as the structure of the device's DSP slices. The modifications may ensure that elements of the generated code get mapped to DSP slices, when the generated code is used to synthesize the programmable logic device.

Abstract: A charge control circuit includes: a charge current control circuit configured to receive an input voltage at a first node, output a sensing current to a second node, and turn on a power transistor; a comparator configured to compare a voltage level of the second node with a voltage level of a third node, wherein the third node receives a charging current from the power transistor; a current mirror configured to generate a mirror current corresponding to the sensing current; and an amplifier configured to receive a first feedback voltage based on the mirror current, and amplify a difference between the first feedback voltage and a reference voltage to generate a switch control signal, wherein in response to the switch control signal and a plurality of control signals, the charge current control circuit is configured to decrease the sensing current and turn on the power transistor.

Abstract: A system according to examples of the present disclosure includes a battery charger electrically coupled to a battery and a battery charging circuit. The battery charging circuit includes an operational amplifier having a negative input to receive a pre-bias voltage, a positive input, an output, and a voltage offset. The battery charging circuit also includes a charge controller having an analog-to-digital converter to receive a voltage output from the output of the operational amplifier and a voltage supply to supply a voltage input into the positive input of the operation amplifier to cancel the voltage offset of the operational amplifier. In the example, the voltage output of the charge controller is a function of the voltage input of the charge controller.

Abstract: Disclosed is a battery management system for outputting a signal, capable of determining whether an error has occurred. The battery management system, according to the present invention, includes a plurality of battery management units measuring the voltage of a secondary battery and controlling the charging and discharging thereof. The battery management units output signals when the secondary battery managed thereby is overcharged or overdischarged and errors occur in the units themselves. At this time, the plurality of battery management units output the signals to lines connected in series. In the battery management system, according to the present invention, the waveforms of the signals to be output change according to the amount of current flowing in the lines connected in series.

Abstract: A method of detecting a bug in a counter of a hardware design that includes formally verifying, using a formal verification tool, an inductive assertion from a non-reset state of an instantiation of the hardware design. The inductive assertion establishes a relationship between the counter and a test bench counter at two or more points in time. If the formal verification tool identifies at least one valid state of an instantiation of the counter in which the inductive assertion is not true, information is output indicating a location of a bug in the hardware design or the test bench counter.

Abstract: Disclosed herein are systems and methods to construct a symmetric clock-distribution H-tree in upper layers of an integrated circuit (IC), which may have complicated routing and/or placement blockages. The systems and methods disclosed herein may implement concomitant bottom-up wiring and top-down rewiring to achieve a clock-distribution tree symmetrically balanced across all of the hierarchical levels while respecting the complicated routing and/or placement blockages. Such symmetrically balanced clock-tree ensures that a clock-signal reaches all of the clock-sinks simultaneously or near simultaneously thereby minimizing clock-skew across the clock-sinks. The minimal skew symmetric clock-distribution H-tree may therefore be used for higher performance and high speed ICs.

Abstract: When a designer designates one or more errors identified in layout design data as false errors, waiver geometric elements corresponding to the designated false errors are created and added to the design. The waiver geometric element may be associated with a verification rule that generated its corresponding false error. When the design is subsequently analyzed using those verification rules in another verification rule check process, the waiver geometric elements are examined, and used to mask those errors associated with a waiver geometric element that would otherwise be displayed to the designer. A designer may also designate a waiver region based on pattern matching, cell names or layout markers in which layout region one or more verification rules may be inapplicable. A waiver region identification item for the waiver region may be associated with a waiver geometric element and the one or more verification rules.

Abstract: An example circuit includes: a first clock gating circuit coupled between a first latch and a second latch and configured to provide a first gated clock signal based at least in part on an input clock signal. The first latch is configured to be activated in response to the first gated clock signal being at a first logic level to pass a data input. The second latch is configured to be activated in response to the input clock signal being at a second logic level to pass a first selection signal.

Abstract: The present technique relates to a battery device, a battery management method, and an electronic apparatus that can easily manage a battery device formed with a large number of battery cells. When a battery (51) has capacitive properties (or when the equivalent circuit of the battery (51) for an AC signal at a frequency f is a capacitor (51C)), a series circuit formed with a capacitor (171) and a coil (172) (=a coil (172-1)+a coil (172-2)) is provided in parallel to the battery (51), to form a blocking filter. The capacitor (171) and the coil (172-1) form a series resonance circuit. The capacitor (51C) and the coil (172-2) form a parallel resonance circuit. The present invention can be applied to an electronic apparatus that includes a large number of battery cells, for example.

Abstract: A system includes: a robotic charging connector including: a temperature sensor configured to measure temperature data; a processor operably connected to the temperature sensor, the processor configured to use the temperature data to determine an appropriate charging current, wherein the processor is further configured to send an alert upon occurrence of a triggering condition; and a computer operably connected to the processor, the computer configured to control the robotic charging connector, the computer further configured to receive the alert.

Abstract: This disclosure relates to a DC-charging power source adaptor including a charging interface, an AC to DC converting unit, and a controlling unit; and the DC-charging power source adaptor is timed to communicate with a mobile terminal which is a charging object, to acquire a change in voltage of a battery in the mobile terminal and further adjust dynamically a volt value of charging voltage output by the DC-charging power source adaptor according to the change in voltage of the battery, and DC-charges the battery in the mobile terminal using the charging voltage.

Abstract: This disclosure provides a mobile terminal, a DC-charging power source adaptor, and a charging method, where firstly the DC-charging power source adaptor is configured to communicate with the mobile terminal in a UART communication mode, and then a strategy to identity the type of charging is designed in the mobile terminal dependent upon configuration of communication pins of a different charging device, so that the mobile terminal identifies automatically the type of the external device. Also a specialized rapid charging mode is designed for the DC-charging power source adaptor, the battery of the mobile terminal being charged is DC-charged at large current by charging voltage output by the DC-charging power source adaptor, and the volt value of the charging voltage is adjusted dynamically according to the varying voltage of the battery.