Patents Examined by Mohammed Shamsuzzaman
  • Semi-conductor wafers longer than industry standard square
    Patent number: 11562920
    Abstract: A semiconductor wafer is as wide as the industry standard width A (presently 156 mm+/?1 mm) and is longer than the industry standard A by at least 1 mm and as much as the standard equipment can reasonably accommodate, presently approximately 3-20 mm and potentially longer, thus, gaining significant additional surface area for sunlight absorption. Modules may be composed of a plurality of such larger wafers. Such wafers can be processed in conventional processing equipment that has a wafer retaining portion of industry standard size A and a configuration that also accommodates a wafer with a perpendicular second edge longer than A by at least 1 and typically 3-20 mm. Wet bench carriers and transport and inspection stations can be so used.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: January 24, 2023
    Assignee: CUBICPV INC.
    Inventor: Robertus Antonius Steeman
  • Load lock with integrated features
    Patent number: 11557496
    Abstract: A cassette with embedded temperature sensors that is disposed within a load lock is disclosed. The temperature sensors may be disposed in a plurality of shelves of the load lock cassette to monitor the temperature of each of a plurality of workpieces disposed in the load lock. The output of these temperature sensors may be provided to a controller, which controls when the load lock is opened. The load lock cassette may also include cooling channels to accelerate the cooling of the workpieces to improve throughput. The cooling may be controlled using closed loop control, where a controller monitors the temperature of the workpieces during the cooling operation.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: January 17, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Michael Blanchard, Steven M. Anella, Brant S. Binns, Jordan B. Tye, D. Jeffrey Lischer
  • Transportation method
    Patent number: 11555740
    Abstract: A transportation method for transporting an object including a plurality of Fabry-Perot interference filters, the transportation method including a first step of accommodating the object in an accommodating container, wherein the Fabry-Perot interference filter includes a substrate, a first mirror portion and a second mirror portion provided on the substrate to face each other via a gap and in which a distance from each other is variable, and in the first step, the object is accommodated and supported in the accommodating container in a state where the plurality of Fabry-Perot interference filters is two-dimensionally arranged.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: January 17, 2023
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Hiroki Oyama, Katsumi Shibayama, Takashi Kasahara, Masaki Hirose, Toshimitsu Kawai, Yumi Kuramoto
  • System and method to control PVD deposition uniformity
    Patent number: 11557473
    Abstract: A physical vapor deposition chamber comprising a tilting substrate support is described. Methods of processing a substrate are also provided comprising tilting at least one of the substrate and the target to improve the uniformity of the layer on the substrate from the center of the substrate to the edge of the substrate. Process controllers are also described which comprise one or more process configurations causing the physical deposition chamber to perform the operations of rotating a substrate support within the physical deposition chamber and tilting the substrate support at a plurality of angles with respect to a horizontal axis.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: January 17, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Wen Xiao, Vibhu Jindal, Sanjay Bhat
  • Resin coating applying apparatus and method of applying resin coating
    Patent number: 11551947
    Abstract: A resin coating applying apparatus includes a housing, a lid, a lid actuator for actuating the lid openably and closably with respect to the housing, a resin supply for supplying a solid resin to a workpiece, a vacuum pump for evacuating a processing space hermetically sealed by the housing and the lid, and an atmospheric vent valve for introducing atmospheric air into the processing space to cool the resin applied to the workpiece. The housing includes a holding table and a holding table actuator for moving the holding table upwardly and downwardly. The lid includes an upper table disposed opposite the holding table and movable relatively closely to the holding table to spread the resin supplied to the workpiece and coat the workpiece with the resin. When the lid is closed, it covers the opening in the housing to create the hermetically sealed processing space.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: January 10, 2023
    Assignee: DISCO CORPORATION
    Inventors: Yoshinori Kakinuma, Yoshikuni Migiyama
  • Method and apparatus for coating photo resist over a substrate
    Patent number: 11545361
    Abstract: In a method of coating a photo resist over a wafer, dispensing the photo resist from a nozzle over the wafer is started while rotating the wafer, and dispensing the photo resist is stopped while rotating the wafer. After starting and before stopping the dispensing the photo resist, a wafer rotation speed is changed at least 4 times. During dispensing, an arm holding the nozzle may move horizontally. A tip end of the nozzle may be located at a height of 2.5 mm to 3.5 mm from the wafer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: January 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tung-Hung Feng, Hui-Chun Lee, Sheng-Wen Jiang, Shih-Che Wang
  • Substrate processing apparatus, method of manufacturing semiconductor device, and recording medium
    Patent number: 11538716
    Abstract: There is provided a technique that includes a process chamber configured to process a substrate; a transfer chamber in communication with a lower portion of the process chamber, and configured to transfer the substrate to a substrate support disposed in the process chamber, and a heating chamber in communication with a lower portion of the transfer chamber, and configured to heat the substrate support and the substrate.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: December 27, 2022
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Tomoya Matsui, Hideto Tateno, Makoto Hirano
  • System and method for edge ring wear compensation
    Patent number: 11538713
    Abstract: A controller for adjusting a height of an edge ring in a substrate processing system includes an edge ring wear calculation module configured to receive at least one input indicative of one or more erosion rates of the edge ring, calculate at least one erosion rate of the edge ring based on the at least one input, and calculate an amount of erosion of the edge ring based on the at least one erosion rate. An actuator control module is configured to adjust the height of the edge ring based on the amount of erosion as calculated by the edge ring wear calculation module.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: December 27, 2022
    Assignee: Lam Research Corporation
    Inventors: Tom A. Kamp, Carlos Leal-Verdugo
  • System apparatus and method for enhancing electrical clamping of substrates using photo-illumination
    Patent number: 11538714
    Abstract: An apparatus may include a clamp to clamp a substrate wherein the clamp is arranged opposing a back side of the substrate; and an illumination system, disposed to direct radiation to the substrate, when the substrate is disposed on the clamp, wherein the radiation comprises a radiation energy, equal to or above a threshold energy to generate mobile charge in the substrate, where the illumination system is disposed to direct radiation to the back side of the substrate.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: December 27, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Qin Chen, Julian G. Blake, Michael W. Osborne, Steven M. Anella, Jonathan D. Fischer
  • Method for fabricating semiconductor device
    Patent number: 11532632
    Abstract: A semiconductor device includes a base substrate including an NMOS region and a PMOS region. The PMOS region includes a first P-type region and a second P-type region. The semiconductor device also includes an interlayer dielectric layer, a gate structure formed through the interlayer dielectric layer and including an N-type region gate structure formed in the NMOS region, a first gate structure formed in the first P-type region and connected to the N-type region gate structure, and a second gate structure formed in the second P-type region and connected to the first gate structure. The direction from the N-type region gate structure to the second gate structure is an extending direction of the N-type region opening, and along a direction perpendicular to the extending direction of the N-type region opening, the width of the first gate structure is larger than the width of the second gate structure.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 20, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Yong Li
  • Chip matching system and method thereof
    Patent number: 11532495
    Abstract: A chip matching system and a corresponding method are provided. The method defines a plurality of first electronic components in a first wafer as various grades of chips and defines a plurality of second electronic components in a second wafer as various grades of chips, and then grades of the first electronic components and the second electronic components are matched to generate target information, and finally the first and second electronic components are integrated in the same position according to the target information. Therefore, the highest-grade chips can be arranged in a multi-chip module to optimize the quality of the multi-chip module.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: December 20, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wu-Hung Yen, Yi-Hsien Huang, Chun-Tang Lin, Shu-Hua Chen, Shou-Qi Chang
  • Semiconductor device and method of fabrication the same
    Patent number: 11527428
    Abstract: Provided is a method of manufacturing a semiconductor device, including providing a substrate including a first region and a second region; forming an alignment mark in the substrate in the second region; forming a material layer on a first surface of the substrate in the first region and the second region; introducing heteroatoms into the substrate in the second region from a second surface of the substrate; and reacting the heteroatoms with the substrate to form a dielectric layer overlapping the alignment mark in the substrate in the second region.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: December 13, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Nuo Wei Luo, Huabiao Wu
  • Hydrogen assisted atmospheric radical oxidation
    Patent number: 11521847
    Abstract: Apparatus, systems, and methods for processing workpieces are provided. In one example implementation, a hydrogen gas mixed with an inert gas can be reacted with an oxygen gas to oxidize a workpiece at atmospheric pressure. A chemical reaction of a hydrogen gas with an oxygen gas facilitated by a hot workpiece surface can positively affect an oxidation process. A reaction speed of the chemical reaction can be slowed down by mixing the hydrogen gas with an inert gas. Such mixture can effectively reduce a partial pressure of the hydrogen gas. As such, the oxidation process can be carried out at atmospheric pressure, thereby, in an atmospheric thermal processing chamber.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: December 6, 2022
    Assignees: BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY CO., LTD., MATTSON TECHNOLOGY, INC.
    Inventors: Michael X. Yang, Christian Pfahler, Alexandr Cosceev
  • Annealing chamber
    Patent number: 11521870
    Abstract: Embodiments disclosed herein generally include annealing chambers. The annealing chambers allow for high throughput without sacrificing wafer-to-wafer and within wafer uniformity. The annealing chamber includes a transport system, a substrate carrier, and a plurality of thermal sources. The transport system is magnetically coupled to the substrate carrier. The transport system moves the substrate carrier along a path. A substrate supported by the substrate carrier is annealed by the thermal sources. The annealing chamber described herein allows for a higher throughput of substrate (alternatively referred to as a wafer) annealing compared to furnace annealing chambers.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: December 6, 2022
    Assignee: Applied Materials, Inc.
    Inventor: Giridhar Kamesh
  • Thermally controlled lid stack components
    Patent number: 11515176
    Abstract: Exemplary substrate processing systems may include chamber body defining a transfer region. The systems may include a lid plate seated on the chamber body. The lid plate may define a first plurality of apertures through the lid plate and a second plurality of apertures through the lid plate. The systems may include a plurality of lid stacks equal to a number of apertures of the first plurality of apertures defined through the lid plate. Each lid stack of the plurality of lid stacks may include a choke plate seated on the lid plate along a first surface of the choke plate. The choke plate may define a first aperture axially aligned with an associated aperture of the first plurality of apertures. The choke plate may define a second aperture axially aligned with an associated aperture of the second plurality of apertures.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: November 29, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Siva Chandrasekar, Satish Radhakrishnan, Rajath Kumar Lakkenahalli Hiriyannaiah, Viren Kalsekar, Vinay Prabhakar
  • Ceiling conveyance vehicle system and temporary storage method for articles in ceiling conveyance vehicle system
    Patent number: 11515186
    Abstract: An overhead transport vehicle system stores a large number of articles and includes an inclined rail and overhead transport vehicles each including a traveler to travel on the inclined rail, a holder to hold an article, an elevator to raise and lower the holder, a horizontality guide to keep the elevator horizontal or substantially horizontal at the inclined rail, and a controller. Supports are horizontally provided at a same or substantially same height, and the overhead transport vehicles located on the inclined rail are able to transfer the article between them. The overhead transport vehicles transfer the article between the supports and the controller controls the elevator to raise and lower the holder by a raising and lowering amount according to a height distance between the inclined rail and an individual support.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: November 29, 2022
    Assignee: MURATA MACHINERY, LTD.
    Inventor: Yoshiki Yuasa
  • System and methods for wafer drying
    Patent number: 11515178
    Abstract: In one example, a method for wafer drying includes providing a surface of a first wafer, the surface of the first wafer including a liquid to be removed with a drying process. The method further includes replacing the liquid with a first solid film in a first processing chamber, the first solid film covering the surface of the first wafer. The method further includes transferring the first wafer from the first processing chamber to a second processing chamber. The method further includes processing the first wafer in the second processing chamber by flowing a supercritical fluid through the second processing chamber, where the supercritical fluid removes the first solid film.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: November 29, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Trace Hurd, Antonio Luis Pacheco Rotondaro, Derek William Bassett, Hitoshi Kosugi
  • Fan-out semiconductor package
    Patent number: 11515265
    Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including a dummy metal layer; a first semiconductor chip disposed in the first through-hole and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface; a first encapsulant covering at least portions of the core member and the first semiconductor chip and filling at least portions of the first through-hole; and a first connection member disposed on the core member and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads, wherein the dummy metal layer is electrically insulated from signal patterns of the first redistribution layer.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: November 29, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seon Hee Moon, Myung Sam Kang, Jin Gu Kim
  • Focus ring adjustment assembly of a system for processing workpieces under vacuum
    Patent number: 11508560
    Abstract: A focus ring adjustment assembly of a system for processing workpieces under vacuum, where the focus ring may include a lower side having a first surface portion and a second surface portion, the first surface portion being vertically above the second surface portion. The adjustment assembly may include a pin configured to selectively contact the first surface portion of the focus ring, and an actuator operable to move the pin along the vertical direction between an extended position and a retracted position. The extended position of the pin may be associated with the distal end of the pin contacting the first surface of the focus ring and the focus ring being accessible for removal by a workpiece handling robot from the vacuum process chamber.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: November 22, 2022
    Assignees: BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY CO., LTD, MATTSON TECHNOLOGY, INC.
    Inventors: Martin L. Zucker, Peter J. Lembesis, Ryan M. Pakulski, Shawming Ma
  • Selective metal deposition by patterning direct electroless metal plating
    Patent number: 11501967
    Abstract: Embodiments include package substrates and a method of forming the package substrates. A package substrate includes a self-assembled monolayer (SAM) layer over a first dielectric, where the SAM layer includes first end groups and second end groups. The second end groups may include a plurality of hydrophobic moieties. The package substrate also includes a conductive pad on the first dielectric, where the conductive pad has a bottom surface, a top surface, and a sidewall, and where the SAM layer surrounds and contacts a surface of the sidewall of the conductive pad. The hydrophobic moieties may include fluorinated moieties. The conductive pad includes a copper material, where the top surface of the conductive pad has a surface roughness that is approximately equal to a surface roughness of the as-plated copper material. The SAM layer may have a thickness that is approximately 0.1 nm to 20 nm.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Suddhasattwa Nad, Roy Dittler, Darko Grujicic, Marcel Wall, Rahul Manepalli