Abstract: A method of forming a semiconductor device includes forming a doped region on a semiconductor substrate, in which the doped region comprises an impurity therein, and performing a laser anneal process to the doped region with a process gas containing a dopant gas, in which the dopant gas and the impurity comprise the same chemical element.

Abstract: A MEMS package has a MEMS chip, a package substrate which the MEMS chip is adhered, a chip-cover which wraps the MEMS chip, and a cover-supporting part which supports the chip-cover from the inside. In the MEMS package, the chip-cover is supported by the cover-supporting part to form a back chamber, surrounded by the chip-cover and the package substrate.

Abstract: A method includes forming a fin on a substrate, forming an insulating material over the fin, recessing the insulating material to form an isolation region surrounding the fin, wherein an upper portion of the fin protrudes above the isolation region, performing a trimming process to reduce a width of the upper portion of the fin, and forming a gate structure extending over the isolation region and the upper portion of the fin.

Abstract: An image sensor includes a sensor layer and at least one metal layer. The sensor layer includes a plurality of sensing elements arranged as a 2-dimensional array along a first direction and a second direction. Each of the at least one metal layer includes a plurality of metal wires configured to form a plurality of apertures for passing lights to the plurality of sensing elements. At least one of the plurality of metal wires forming the plurality of apertures is disposed along a third direction different from the first direction and the second direction.

Abstract: In a capacitor of an integrated circuit, a crystallization induction film is obtained by oxidizing a surface of an electrode, and a dielectric structure is formed on the crystallization induction film, to reduce defect density generated in the dielectric film, improve leakage current, and reduce equivalent oxide thickness.

Abstract: A photodetection element includes: a photoelectric conversion structure that contains a first material having an absorption coefficient higher than an absorption coefficient of monocrystalline silicon for light of a first wavelength, for which monocrystalline silicon exhibits absorption, and generates positive and negative charges by absorbing a photon; and an avalanche structure that includes a monocrystalline silicon layer, in which avalanche multiplication occurs as a result of injection of at least one selected from the group consisting of the positive and negative charges from the photoelectric conversion structure. The first material includes at least one selected from the group consisting of an organic semiconductor, a semiconductor-type carbon nanotube, and a semiconductor quantum dot.

Abstract: A method of fabricating a semiconductor device, the method including forming semiconductor patterns on a substrate such that the semiconductor patterns are vertically spaced apart from each other; and forming a metal work function pattern to fill a space between the semiconductor patterns, wherein forming the metal work function pattern includes performing an atomic layer deposition (ALD) process to form an alloy layer, and the ALD process includes providing a first precursor containing an organoaluminum compound on the substrate, and providing a second precursor containing a vanadium-halogen compound on the substrate.

Abstract: A semiconductor apparatus has a semiconductor substrate, a first trench provided in a front surface of the semiconductor substrate, an anode electrode provided inside the first trench, and a cathode electrode provided on a back surface of the semiconductor substrate. The semiconductor substrate has a first p-type region, a second p-type region, and a main n-type region which is in contact with the first p-type region and the second p-type region, and is in Schottky contact with the anode electrode in the side surface of the first trench. The semiconductor substrate satisfies the relationship that an area of the first trench, when the front surface is viewed in a plan view, is smaller than an area of a Schottky interface where the main n-type region is in contact with the anode electrode in the side surface of the first trench.

Abstract: A method includes providing a structure having a first region and a second region, the first region including a first channel region, the second region including a second channel region; forming a gate stack layer over the first and second regions; patterning the gate stack layer, thereby forming a first gate stack over the first channel region and a second gate stack over the second channel region; and laterally etching bottom portions of the first and second gate stacks by applying different etchant concentrations to the first and second regions simultaneously, thereby forming notches at the bottom portions of the first and second gate stacks.

Abstract: Advanced flat metals for microelectronics are provided. While conventional processes create large damascene features that have a dishing defect that causes failure in bonded devices, example systems and methods described herein create large damascene features that are planar. In an implementation, an annealing process creates large grains or large metallic crystals of copper in large damascene cavities, while a thinner layer of copper over the field of a substrate anneals into smaller grains of copper. The large grains of copper in the damascene cavities resist dishing defects during chemical-mechanical planarization (CMP), resulting in very flat damascene features. In an implementation, layers of resist and layers of a second coating material may be applied in various ways to resist dishing during chemical-mechanical planarization (CMP), resulting in very flat damascene features.

Abstract: A display device according to an embodiment of the present invention includes first and second electroluminescent elements on a substrate. The first and second electroluminescent elements each include a lower electrode, a functional layer including a light-emitting layer, an upper electrode, and a first or second color filter. The display device includes an overlapping region where the first and second color filters overlap each other in a plan view. Light transmitted through the first color filter has a higher luminosity factor than light transmitted through the second color filter. L2>L1, wherein L2 is the distance between the light-emitting region of the second electroluminescent element and the second color filter, and L1 is the distance between the light-emitting region of the first electroluminescent element and the first color filter.

Abstract: Semiconductor devices and methods of forming the same include forming a dummy gate over a fin, which has a lower semiconductor layer, an insulating intermediate layer, and an upper semiconductor layer, to establish a channel region and source/drain regions. Source/drain extensions are grown on the lower semiconductor layer. Source/drain extensions are grown on the upper semiconductor layer. The dummy gate is replaced with a gate stack.

Abstract: A method and structure of forming an interconnect structure with a sidewall image transfer process such as self-aligned double patterning to reduce capacitance and resistance. In these methods and structures, the spacer is a metal.

Abstract: In an example, a method of forming a stacked memory array includes, forming a termination structure passing through a stack of alternating first and second dielectrics in a first region of the stack; forming first and second sets of contacts through the stack of alternating first and second dielectrics in a second region of the stack concurrently with forming the termination structure; forming an opening through the stack of alternating first and second dielectrics between the first and second sets of contacts so that the opening terminates at the termination structure; and removing the first dielectrics from the second region by accessing the first dielectrics through the opening so that the first and second sets of contacts pass through the second dielectrics alternating with spaces corresponding to the removed first dielectrics.

Abstract: There is provided a lead frame. The lead frame includes: a die pad; a lead terminal that is separated from the die pad and disposed around the die pad; and a resin layer that is formed between the die pad and the lead terminal so as to fix the die pad and the lead terminal. The resin layer has an opening portion that exposes at least a lower surface of the lead terminal.

Abstract: A method may include depositing a carbon layer on a substrate using physical vapor deposition, wherein the carbon layer exhibits compressive stress, and is characterized by a first stress value; and directing a dose of low-mass species into the carbon layer, wherein, after the directing, the carbon layer exhibits a second stress value, less compressive than the first stress value.

Abstract: Light emitting devices (LEDs) are described. An LED includes a light emitting semiconductor structure that includes a light emitting active layer disposed between an n-layer and a p-layer. A wavelength converting material may be disposed adjacent the light emitting semiconductor structure. The wavelength converting material includes multiple pores, at least one of which contains a second material. An absolute value of a ratio of a coefficient of thermal expansion of the second material to a coefficient of thermal expansion of the wavelength converting material is at least two in an embodiment, at least ten in another embodiment, at least 100 in another embodiment, and at least 1,000 in yet another embodiment.

Abstract: Provided are an OLED array substrate and a manufacturing method thereof, and a display device. The OLED array substrate includes a substrate and a plurality of pixel units provided thereon. The plurality of pixel units are arranged into a plurality of rows extending in a first direction and a plurality of columns extending in a second direction. Each pixel unit includes a plurality of subpixels emitting light of different colors. At least two subpixels emitting light of the same color are adjacent to each other in at least one of the first direction and the second direction.

Abstract: A semiconductor memory device includes a semiconductor substrate, bit line structures, storage node contacts, isolation structures, a first spacer, a second spacer, and a third spacer. Each bit line structure is elongated in a first direction. The bit line structures are repeatedly arranged in a second direction. Each storage node contact and each isolation structure are disposed between two adjacent bit line structures. The first spacer is partly disposed between each isolation structure and the bit line structure adjacent to the isolation structure and partly disposed between each storage node contact and the bit line structure adjacent to the storage node contact. The second spacer is disposed between each storage node contact and the first spacer. The third spacer is disposed between each storage node contact and the second spacer. A thickness of the third spacer is less than a thickness of the second spacer in the second direction.

Abstract: A photodetection element includes: a photoelectric conversion structure that contains a first material having an absorption coefficient higher than an absorption coefficient of monocrystalline silicon for light of a first wavelength, for which monocrystalline silicon exhibits absorption, and generates positive and negative charges by absorbing a photon; and an avalanche structure that includes a monocrystalline silicon layer, in which avalanche multiplication occurs as a result of injection of at least one selected from the group consisting of the positive and negative charges from the photoelectric conversion structure. The first material includes at least one selected from the group consisting of an organic semiconductor, a semiconductor-type carbon nanotube, and a semiconductor quantum dot.