Abstract: Disclosed herein are systems, apparatuses, methods, and non-transitory computer readable media related to a display construct coupled to a structure (e.g., a vision window). The structure can be a supportive structure such as a fixture. The display construct is configured to facilitate media display and is at least partially transparent. The vision window may be a tintable window, e.g., a window in which its tint is electrically controllable (e.g., an electrochromic window). Various interactive capabilities with the display construct are disclosed (e.g., via a touch screen).

Abstract: This disclosure relates generally to optically-switchable devices, and more particularly, to systems, apparatus, and methods for controlling optically-switchable devices. In some implementations, the apparatus includes an interface for communicating with window controllers, and the apparatus includes one or more processors. A processor can be configured to cause status information received from a window controller to be processed. The status information can indicate at least a tint status of one or more optically-switchable devices controlled by the window controller. In response to receiving the status information, one or more tint commands can be sent via the interface to the window controller.

Abstract: A semiconductor device configured for a radio frequency (RF) application and further configured for passive device integration and/or improved cooling includes a substrate; an active region portion arranged on the substrate, the active region portion includes at least one radio frequency (RF) transistor amplifier; a cavity arranged within the substrate; and one or more radio frequency (RF) devices arranged in the cavity.

Abstract: A method of manufacturing a semiconductor device having a conductive substrate having a first surface, a second surface opposite the first surface, and a passivation material covering a portion of the first surface can include applying a seed layer of conductive material to the first surface of the conductive substrate and to the passivation material, the seed layer having a first face opposite the conductive substrate. The method can include forming a plurality of pillars comprising layers of first and second materials. The method can include etching the seed layer to undercut the seed layer between the conductive substrate and the first material of at least one of the pillars. In some embodiments, a cross-sectional area of the seed layer in contact with the passivation material between the first material and the conductive substrate is less than the cross-sectional area of the second material.

Abstract: Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.

Abstract: A power module according implementations of the present disclosure includes a bonding layer for bonding two adjacent members. The bonding layer is formed by melting, applying, and solidifying a bonding material that has excellent thermal conductivity and electrical conductivity. The melted bonding material includes a plurality of anti-tilting members. The two members bonded during the process of solidifying the melted bonding material are supported by the plurality of anti-tilting members. This may allow tilting caused during the formation of the bonding layer to be suppressed.

Abstract: Back end of line metallization structures and methods for fabricating self-aligned vias. The structures generally include a first interconnect structure disposed above a substrate. The first interconnect structure includes a metal line formed in a first interlayer dielectric. A second interconnect structure overlies the first interconnect structure. The second interconnect structure includes a second cap layer on the first interlayer dielectric, a second interlayer dielectric thereon, and at least one self-aligned via in the second interlayer dielectric conductively coupled to at least a portion of the metal line of the first interconnect structure, wherein any misalignment of the at least one self-aligned via results in the at least one self-aligned via landing on both the metal line of the first interconnect structure and the second cap layer. The second cap layer is an insulating material.

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.

Abstract: The oxide semiconductor layer is electrically connected to a source electrode or the source bus line within the source opening formed in the lower insulating layer, each wiring line connection section includes a lower conductive portion formed using the first conductive film, the lower insulating layer extending over the lower conductive portion, an oxide connection layer formed using an oxide film the same as the oxide semiconductor layer and electrically connected to the lower conductive portion within the lower opening formed in the lower insulating layer, an insulating layer covering the oxide connection layer, and an upper conductive portion electrically connected to the oxide connection layer within the upper opening formed in the insulating layer, wherein the oxide connection layer includes a region lower in a specific resistance than the channel region of the oxide semiconductor layer.

Abstract: Provided is a display device including a substrate, a first electrode disposed on the substrate, a second electrode disposed on the substrate and spaced apart from the first electrode, a plurality of first sub-insulating layers extending in a first direction, disposed on the substrate and on the first and second electrodes, and arranged in a second direction crossing the first direction, and a plurality of light emitting elements disposed between the first sub-insulating layers and electrically connected to the first electrode and the second electrode.

Abstract: Embodiments of the disclosure provide a method to form an air gap structure. An opening is formed in a first dielectric layer between adjacent conductors. A first dielectric layer is formed over the opening to fill a first portion of the opening. A remainder of the opening is free of the first dielectric layer. A second dielectric layer is formed on a top surface of the first dielectric layer, with a remainder of the opening unfilled. The second dielectric layer is devoid of wiring. The remainder of the opening below the second dielectric layer defines an air gap structure. A wiring layer is formed above the air gap structure.

Abstract: A method, apparatus and computer program product are provided to incentivize crowd sourcing of data by identifying and compensating content contributors based on a value of the content to training a neural network. Methods may include: receiving a request; processing the request using a machine learning model to generate a response to the request; based on the processing of the request using the machine learning model, identifying training data contributing to the response to the request; identifying one or more data contributors as providing the identified training data contributing to the response to the request; and providing a response to the request and an indication of the one or more data contributors.

Abstract: An object detecting system comprising: a first distance measuring device, configured to measure a first distance between a first part of an object and the first distance measuring device; a second distance measuring device, configured to measure a second distance between a second part of the object and the second distance measuring device; a uniform light source, configured to emit uniform light to the object; an optical sensor, configured to sense optical data of the object generated based on the uniform light; and a control circuit, configured to calculate a location of the object according to the first distance, the second distance and the optical data.

Abstract: A semiconductor structure includes a substrate, a passive device and an active device over the substrate. The active device is formed in the first region of the substrate, and the passive device is formed in the second region of the substrate. The semiconductor structure further includes a passivation layer that covers the top surface of the passive device. The passivation layer has an opening that exposes the active device.

Abstract: A display device includes a display substrate, a first connection wiring, and a signal wiring. The display substrate includes a display area and a pad area disposed outside the display area. The first connection wiring is disposed on the pad area of the display substrate. The signal wiring is disposed on the first connection wiring of the pad area of the display substrate. The signal wiring is electrically connected to the first connection wiring through a first contact hole. The signal wiring includes at least one first opening at least partially surrounded by the signal wiring in a plan view. The first opening is disposed closer to the display area than the first contact hole.

Abstract: A semiconductor device includes a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, a first mesa isolation on the HEMT region, a HEMT on the first mesa isolation, a second mesa isolation on the capacitor region, and a capacitor on the second mesa isolation. The semiconductor device further includes buffer layer between the substrate, the first mesa isolation, and the second mesa isolation, in which bottom surfaces of the first mesa isolation and the second mesa isolation are coplanar.

Abstract: There is provided a method for manufacturing an electronic device including a substrate of semiconductor material, an intermediate portion, and a silicon carbide layer, the method including transferring the silicon carbide layer from a first electronic element onto a face of a second electronic element including the substrate, the transfer including: providing the first element including a primary silicon carbide-based layer, a first diffusion barrier portion, and a first metal layer; providing the second element including the substrate, a second diffusion barrier portion, and a second metal layer; and bonding an exposed face of each of the first and the second metal layers, the first and the second metal layers being formed of tungsten, the first and the second portions being formed of at least one tungsten silicide layer, and the second portion, the second metal layer, the first metal layer, and the first portion form the intermediate portion.

Abstract: A device includes a conductive feature, a dielectric layer, a bottom electrode via, and a liner layer. The dielectric layer is over the conductive feature. The bottom electrode via is in the dielectric layer and over the conductive feature. A topmost surface of the bottom electrode via is substantially flat. A liner layer cups an underside of the bottom electrode via. The liner layer has a topmost end substantially level with the topmost surface of the bottom electrode via.

Abstract: Devices and methods for switch body connections to achieve soft breakdown. In some embodiments, a field-effect transistor (FET) can include an assembly of source, gate, and drain implemented on an active region, a first body contact implemented at a first end of the assembly, and a second body contact implemented at a second end of the assembly. The second end can be distal from the first end along a width of the field-effect transistor.

Abstract: A light-emitting diode includes a semiconductor body and electrical connection points for contacting the semiconductor body, the semiconductor body including an active region including a quantum well that generates electromagnetic radiation, a first region and a second region that impede passage of charge carriers from the active region, wherein the semiconductor body is based on a nitride compound semiconductor material, the first region is directly adjacent to the active region on a p-side, the second region is arranged on a side of the first region facing away from the active region, the first region has an electronic band gap larger than the electronic band gap of the quantum well and less than or equal to an electronic band gap of the second region, the first region and the second region contain aluminum, and the active region emits electromagnetic radiation having a peak wavelength of less than 480 nm.