Patents Examined by Nitin C. Patel
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Patent number: 11231937Abstract: A method and system method for communication port management in a device. The method including enabling a set of communication ports in response to power up of the device, detecting connection at a port in the set of communication ports prior to operating system boot of the device, and connecting an external device to an operational component of the device in response to the connection at the port.Type: GrantFiled: October 24, 2017Date of Patent: January 25, 2022Assignee: Intel CorporationInventor: Choon Gun Por
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Patent number: 11221667Abstract: An apparatus sets an operating voltage of a shared power rail in a multi-core electronic device. The apparatus includes a system-on-chip (SoC) having multiple cores with each core in the SoC configured to report an operating status. The apparatus includes an operating state aggregator configured to receive the operating status reported from each core in the SoC and to select the selected operating voltage based on the operating status from each core. A voltage regulator is in communication with the operating state aggregator and a power management integrated circuit (PMIC). The selected operating voltage is then programmed into the (PMIC) to control the shared power rail.Type: GrantFiled: July 30, 2020Date of Patent: January 11, 2022Assignee: QUALCOMM IncorporatedInventors: Venkatesh Ravipati, Venkata Biswanath Devarasetty, Nirav Narendra Desai, Lakshmi Narayana Panuku, Kumar Kanti Ghosh, Sharath Kumar Nagilla, Sravan Kumar Ambapuram, Shrikanth Shenoy
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Patent number: 11221662Abstract: A system and method according to the principles of the invention provides the data center operator enhanced tools for managing power capacity. The system tracks and stores actual power usage to the item level and automatically adjusts the budgeted power for items, groups of items and item models. The disclosed system and method finds stranded power capacity by adjusting power budgets according to actual usage trends. Operators can implement auto power budget adjustments based on configured policies. The policies can include specifying the power budget headroom for items, groups of items and models.Type: GrantFiled: November 2, 2020Date of Patent: January 11, 2022Assignee: Sunbird Software, Inc.Inventor: Samer Yousef Nassoura
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Patent number: 11216050Abstract: A method, a computer-readable medium, and an apparatus for power management are provided. The apparatus may determine an activation distance based on operator behavior in relation to operating the apparatus. The apparatus may detect the presence of an approaching operator at the activation distance. The apparatus may wake up from a low-power state in response to the detecting of the presence of the approaching operator at the activation distance. The apparatus may determine a deactivation distance based on the operator behavior. The apparatus may detect the presence of a departing operator of the apparatus at the deactivation distance. The apparatus may enter into the low-power state in response to the detecting of the presence of the departing operator at the deactivation distance.Type: GrantFiled: November 10, 2017Date of Patent: January 4, 2022Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.Inventors: Kah Yong Lee, Chee Oei Chan, Rafael Raymund Viernes, Pierre Zeloon Lye
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Patent number: 11199885Abstract: The disclosed computing device may include electronic components, at least one of which is a processor. The computing device may also include a heat sink thermally coupled to the electronic components, as well as a temperature sensor that determines the current temperature inside the computing device. The computing device may further include a controller. The processor may generate a load schedule for the electronic components based on the current temperature inside the computing device. This load schedule ensures that a maximum temperature for the heat sink is not exceeded even when the total system power load exceeds, for a short period of time, the maximum sustainable power level the heat sink can dissipate. The controller may then load the electronic components according to the generated load schedule. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: November 2, 2020Date of Patent: December 14, 2021Assignee: Facebook, Inc.Inventors: Howard William Winter, ChuanKeat Kho, Peter John Richard Gilbert Bracewell
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Patent number: 11181970Abstract: Power consumption by a first host included in a plurality of hosts in a clustered computing system, where each of the hosts executes one or more applications, is managed by detecting that a utilization level of the first host falls below a threshold value and, responsive to the detecting, migrating one or more applications executing on the first host to a second host. After the migration is completed, the first host is caused to consume less power while remaining powered on.Type: GrantFiled: January 23, 2020Date of Patent: November 23, 2021Assignee: VMware, Inc.Inventors: Parth Shah, Madhuri Yechuri
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Patent number: 11169818Abstract: Systems and methods that may be implemented in a Unified Extensible Firmware Interface (UEFI) pre-boot environment time to dynamically locate and load bootable images stored in one or more operating system (OS) partitions on a system storage device/s (e.g., HDD, SSD) that is formatted with an advanced filesystem (e.g., such as NTFS, EXT3, etc.). An OS-based filesystem-independent method may be provided to access OS filesystem data during UEFI pre-boot time. Individual selected boot images stored across multiple OS filesystem partitions may be located and loaded to boot from UEFI pre-boot.Type: GrantFiled: April 25, 2019Date of Patent: November 9, 2021Assignee: Dell Products L.P.Inventors: Shekar Babu Suryanarayana, Ibrahim Sayyed
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Patent number: 11169593Abstract: Various aspects are described herein. In some aspects, the disclosure provides selective coupling of portions of a memory structure to voltage supplies. Certain aspects provide a computing device. The computing device includes a memory comprising a plurality of portions that are individually power collapsible. The computing device further includes a first voltage rail supplying a first voltage. The computing device further includes a second voltage rail supplying a second voltage. The computing device further includes a plurality of switching circuits, each switching circuit configured to selectively couple a corresponding one of the plurality of portions with the first voltage rail or the second voltage rail. The computing device further includes a controller configured to control each of the plurality of switching circuits based on a current active mode of the memory, and a current operating mode of each of the plurality of portions.Type: GrantFiled: May 19, 2020Date of Patent: November 9, 2021Assignee: QUALCOMM IncorporatedInventors: Raghavendra Srinivas, Bharat Kumar Rangarajan, Rajesh Arimilli
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Patent number: 11163352Abstract: The invention relates to a multicore processor and a method for dynamically adjusting a supply voltage and a clock frequency, with which an individual supply voltage and dock frequency adjustment, which depends on a current computing load, is facilitated for each processor core of a multicore processor. Thus, an assembly is disclosed where a local queue memory unit which is connected to the processor core, the internal memory unit, and the level converter is arranged in a voltage-variable region of the processor element in order to store events to be processed by the processor core. The invention is also directed to a method in that the required supply voltage U and the required clock frequency f are adjusted for each cycle in a controlled manner by the processor core of the respective processor element depending on the detection of a number of events to be processed which are stored in an internal queue memory unit.Type: GrantFiled: May 18, 2018Date of Patent: November 2, 2021Assignee: Technische Universität DresdenInventors: Sebastian Höppner, Bernhard Vogginer, Yexin Yan, Christian Mayr
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Patent number: 11132039Abstract: An information handling system may include an information handling resource and an energy storage device electrically coupled to the information handling resource and comprising one or more energy storage cells and a control subsystem configured to selectively enable and disable discharging of the one or more energy storage cells to the information handling resource based on a temperature associated with the energy storage device.Type: GrantFiled: September 27, 2019Date of Patent: September 28, 2021Assignee: Dell Products L.P.Inventors: Lei Wang, Zhen Huang
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Patent number: 11126233Abstract: A circuit includes: a first interface circuit supporting multiple first interface operating modes respectively corresponding to different versions of a first data transmission protocol; a second interface circuit supporting multiple second interface operating modes respectively corresponding to different versions of a second data transmission protocol; a control circuit configured to operably instruct the first interface circuit to operate in a first target operating mode selected from the multiple first interface operating modes, and configured to operably instruct the second interface circuit to operate in a second target operating mode selected from the multiple second interface operating modes; wherein a difference between a nominal data rate of the first target operating mode and a nominal data rate of the second target operating mode is less than a predetermined threshold.Type: GrantFiled: July 15, 2020Date of Patent: September 21, 2021Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Yi Ting Chien, Cheng Yuan Hsiao, Chih Yu Hsu, Sung Kao Liu, Wei Hung Chuang
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Patent number: 11126254Abstract: Systems and methods, according to the present disclosure, determines a duration of the current queue of commands in the controller, executes all full commands capable of being executed prior to the beginning of a low power cycle. Commands that are not executed may be re-fetched when the device enters a power mode. In an alternate embodiment, a portion of a command that is executable prior to the beginning of a low power cycle is executed, with the un-executed portion of the command being stored on the device, in an “always on” or AON memory. This un-executed portion is fetched and executed when the device enters the power mode.Type: GrantFiled: May 26, 2020Date of Patent: September 21, 2021Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Amir Segev, Shay Benisty
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Patent number: 11119788Abstract: Closed loop performance controllers of asymmetric multiprocessor systems may be configured and operated to improve performance and power efficiency of such systems by adjusting control effort parameters that determine the dynamic voltage and frequency state of the processors and coprocessors of the system in response to the workload. One example of such an arrangement includes applying hysteresis to the control effort parameter and/or seeding the control effort parameter so that the processor or coprocessor receives a returning workload in a higher performance state. Another example of such an arrangement includes deadline driven control, in which the control effort parameter for one or more processing agents may be increased in response to deadlines not being met for a workload and/or decreased in response to deadlines being met too far in advance. The performance increase/decrease may be determined by comparison of various performance metrics for each of the processing agents.Type: GrantFiled: April 5, 2019Date of Patent: September 14, 2021Assignee: Apple Inc.Inventors: Aditya Venkataraman, Bryan R. Hinch, John G. Dorsey
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Patent number: 11113402Abstract: Methods, systems and apparatuses may provide for technology that includes a system on chip (SoC) having a root of trust and an embedded controller to conduct functional safety operations and non-functional safety operations with respect to the SoC. The technology may also include an enhanced serial peripheral interface (eSPI) coupled to the SoC and the embedded controller, wherein the eSPI is to tunnel communications associated with the functional safety operations between the embedded controller and the root of trust.Type: GrantFiled: March 29, 2019Date of Patent: September 7, 2021Assignee: Intel CorporationInventors: Mikal Hunsaker, Mark Feuerstraeter, Asad Azam, Zhenyu Zhu, Navtej Singh
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Patent number: 11113070Abstract: Technologies are provided for automated identification of system devices to be disabled in a computing system and the disablement of the system devices during bootup of the computing system. In some embodiments, the computing system can execute a firmware configured to perform a bootup process of the computing system. The computing system includes multiple system devices. The firmware can generate program code for identifying a system device for disablement. The firmware can send the program code to a controller device curing the bootup process, where execution of the program code by the controller device generates data identifying one or several specific system devices to be disabled in the computing system. The firmware can then access such data from the controller device. Using the data, the firmware can determine that a specific system device to be disabled. The firmware can then disable that particular system device on a next bootup process.Type: GrantFiled: July 31, 2019Date of Patent: September 7, 2021Assignee: AMERICAN MEGATRENDS INTERNATIONAL, LLCInventors: Igor Kulchytskyy, Manickavasakam Karpagavinayagam, Viswanathan Swaminathan, Chandrasekar Rathineswaran
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Patent number: 11107179Abstract: A method for profiling energy usage of invoking an application programming interface (API) by an application in a computing device. The method includes obtaining source code for the API, modifying each class by adding a callback function identifier field that is initiated to a unique value upon instantiation of each object that belongs to the class, identifying each location in the source code that posts the callback function for asynchronous execution by enqueueing each object instantiated from the class containing the callback function into the system callback queue, modifying the source code to log the callback function identifier of object at the location that dequeues objects from the system callback queue, modifying source code by adding two system logging function calls to log the callback function identifier of the dequeued object before and after executing the callback function, executing the application, and performing energy accounting of the asynchronous API calls.Type: GrantFiled: April 23, 2019Date of Patent: August 31, 2021Assignee: Purdue Research FoundationInventors: Yu Charlie Hu, Ning Ding
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Patent number: 11106261Abstract: Integrated circuits, or computer chips, typically include multiple hardware components (e.g. memory, processors, etc.) operating under a shared power (e.g. thermal) constraint that is sourced by one or more power sources for the chip. Typically, the hardware components can be individually configured to operate at certain states (e.g. to operate at a certain frequency by setting a clock speed for a clock dedicated to the hardware component). Thus, each hardware component can be configured to operate at an operating point that is determined to be optimal, usually in terms of achieving some desired goal for a specific application (e.g. frame rates for gaming, etc.). In the context of chip hardware that operates under a shared power/thermal constraint, a method, computer readable medium, and system are provided for determining the optimal operating point for the chip that takes into consideration both performance of the chip and power consumption by the chip.Type: GrantFiled: November 2, 2018Date of Patent: August 31, 2021Assignee: NVIDIA CORPORATIONInventors: Aniket Naik, Siddharth Bhargav, Bardia Zandian, Narayan Kulshrestha, Amit Pabalkar, Arvind Gopalakrishnan, Justin Tai, Sachin Satish Idgunji
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Patent number: 11106267Abstract: A method for managing clock frequency in a multi-core integrated circuit includes determining a minimum allowable operating clock frequency and a maximum allowable operating clock frequency for an integrated circuit having a plurality of processor cores. A plurality of clock sources is configured to provide a corresponding plurality of clock frequencies between the minimum allowable operating clock frequency and the maximum allowable operating clock frequency. A total number of active processor cores is determined. If it is determined that all of the plurality the processor cores are active, all active processor cores are operated at the minimum allowable operating clock frequency. If it is determined that the total number of active processor cores is lower than a threshold number, the clock frequency of one or more active processor cores is increased based on available electrical current budget.Type: GrantFiled: November 27, 2019Date of Patent: August 31, 2021Assignee: Amazon Technologies, Inc.Inventors: Larisa Goffman-Vinopal, Udi Sherel, Anat Arbely, Yaniv Shapira
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Patent number: 11099857Abstract: For parallel deployment of a plurality of virtual systems in a broadband network, an electronic data structure is obtained, which specifies a set of requirements for each of the plurality of virtual systems to be deployed in parallel. The sets of requirements in the electronic data structure are parsed to obtain a plurality of virtual system creation instruction files, one for each of the virtual systems to be deployed in parallel. A plurality of threads are executed in parallel, one for each of the virtual systems to be deployed in parallel, in accordance with the plurality of virtual system creation instruction files, to build the plurality of virtual systems.Type: GrantFiled: February 14, 2019Date of Patent: August 24, 2021Assignee: CHARTER COMMUNICATIONS OPERATING, LLCInventors: Rachel Popo, Yehuda Yefet, Bryan Zaffino, Sagar Parikh, Dino Starinieri, John D. Bolton, Craig McDonnell, Nate Getrich, Jay Rolls
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Patent number: 11093021Abstract: Power management (203) for controlling a delivery of a DC-power to a device (204) operable in an accepting operational state or a non-accepting operational state with respect to receiving the DC-power comprises: receiving DC input power; providing an indication that the DC-power supply device (202) operates in a powered-device detection mode and not in an powered-device operation mode; connecting, when the DC-power supply device (202) is in the powered-device detection mode, the power to an energy storage unit (212); storing electrical energy currently received; determining, whether the power-acceptance criterion is fulfilled and, in case it is fulfilled, providing an instruction to operate in the accepting operational state; connecting the energy storage unit (212) and a power interface unit (206) when the external DC-power supply device (202) is currently operating in the powered-device operation mode.Type: GrantFiled: July 24, 2017Date of Patent: August 17, 2021Assignee: SIGNIFY HOLDING B.V.Inventors: Matthias Wendt, Eduard Gerhard Zondag, Harald Josef Günther Radermacher