Abstract: Dynamic power budget allocation in a multi-processor system is described. In an example, an apparatus includes a plurality of processor units; and a power control component, the power control component to monitor power utilization of each of the plurality of processor units, wherein power consumed by the plurality of processor units is limited by a global power budget. The apparatus is to assign a workload to each of the processor units and is to establish an initial power budget for operation of each of the processor units, and, upon the apparatus determining that one or more processor units require an increased power budget based on one or more criteria, the apparatus is to dynamically reallocate an amount of the global power budget to the one or more processor units.

Abstract: A method and a system for impact detection in a stationary vehicle are provided. The method includes putting a telematics device into a sleep mode, performing at least one micro wakeup, determining at least one value from at least one sensor during the micro wakeup. The method also includes storing the at least one value, returning to sleep mode, and waking up from the sleep mode. The method further includes sending the at least one value over a network interface to a telematics server. The telematics device which carries out the method has a controller, memory, and network interface. An accident impact profile may be recorded during the micro wakeups and sent during a wakeup duration for analysis by the telematics server.

Abstract: The systems and methods discussed herein provide for intelligent identification of applications or tasks to be utilized or performed by a user based on a variety of variables that provide relevant context. In some implementations, applications may be pre-launched or instantiated prior to a user requesting to execute the application, reducing user experience latency and avoiding incorrect application launch. User behavior patterns, location, time of day, user events, etc. may be utilized to identify and recommend or pre-launch relevant applications that should or can be used at any given instance. In some implementations, deep linking may be used to pre-launch or suggest specific tasks to be performed within an application.

Abstract: Techniques are disclosed that pertain to synchronizing power states between integrated circuit dies. A system includes an integrated circuit that includes a plurality of integrated circuit dies coupled together. A particular integrated circuit die may include a primary power manager circuit and one or more remaining integrated circuit dies include respective secondary power manager circuits. The primary power manager circuit is configured to issue a transition request to the secondary power manager circuits to transition their integrated circuit dies from a first power state to a second power state. A given secondary power manager circuit is configured to receive the transition request, transition its integrated circuit die to the second power state, and issue an acknowledgement to the primary power manager circuit that its integrated circuit die has been transitioned to the second power state.

Abstract: A rack in a datacenter is powered by a first power feed and a second power feed. The rack supports a plurality of servers which have a maximum combined power consumption which is greater than a maximum supplied power from either the first power feed or the second power feed. When power is lost from one of the power feeds, a rack manager reduces the total power consumption of the plurality of servers by throttling at least one of the servers and/or shutting off at least one of the plurality of servers.

Abstract: An information handling system includes a memory module having a first temperature sensor collocated with first memory devices associated with a first memory channel, and a second temperature sensor collocated with second memory devices associated with a second memory channel. A processor receives a first temperature from the first temperature sensor and a second temperature from the second temperature sensor, receives a first power level associated with the first memory channel and a second power level associated with the second memory channel from the memory module, determines a first thermal resistance of the first memory devices based upon the first temperature and the first power level, and determines a second thermal resistance of the second memory device based upon the second temperature and the second power level.

Abstract: Examples disclosed herein relate to performing an action based on a pre-boot measurement of a firmware image. In an example, at a firmware component in a system, a measurement of a firmware image may be determined prior to booting of the system, beginning from a hardware root of trust boot block, by a Trusted Platform Module (TPM) emulator engine that emulates a hardware-based TPM. A pre-determined measurement of the firmware image may be retrieved from a storage location within the system. The measurement of the firmware image may be compared with the pre-determined measurement of the firmware image prior to booting of the system. In response to a determination that the measurement of the firmware image is different from the pre-determined measurement of the firmware image, performing an action.

Abstract: In each of two or more pipelined subsystems, the relative amount of time that the processing cores are idle may be determined. If the idle ratio is below a threshold, the clock frequency and voltage may be adjusted using dynamic clock and voltage scaling (DCVS) based on a power limit. However, if the idle ratio exceeds the threshold, the clock frequency and voltage may be decreased without regard to the power limit.

Abstract: Various implementations described herein are related to a device. The device may include first circuitry that receives a clock signal and provides one or more phase-shifted pulse signals based on the clock signal. The device may include second circuitry that receives an input voltage, receives the clock signal, and provides an internal control signal based on the input voltage and the clock signal. The device may include third circuitry that receives the internal control signal, receives the one or more phase-shifted pulse signals, and provides an output clock signal based on the internal control signal and the one or more phase-shifted pulse signals.

Abstract: Device temperature values that are each indicative of a temperature at a respective device of multiple devices of a system are identified. Whether at least one device temperature value of the of device temperature values satisfies a respective thermal throttling threshold of multiple thermal throttling thresholds is determined by comparing each of the device temperature values to a respective one of the multiple thermal throttling thresholds that each correspond to one of the plurality of devices. Responsive to determining that the at least one device temperatures value satisfies the respective thermal throttling threshold, a power reduction value that is indicative of an amount of power consumption of the system that is to be reduced is determined. A power reducing operation is performed to reduce the power consumption of the system in accordance with the power reduction value.

Abstract: One example method includes receiving input concerning a boot order sequence, where the input includes VM metadata, entering a training phase which includes generating a boot sequence rule based on the input, using the boot sequence rule to generate a proposed boot sequence, performing the proposed boot sequence, and gathering information concerning performance of the proposed boot sequence. The gathered information can be used as a basis to generate a modified boot sequence.

Abstract: Systems, methods, and computer-readable media are disclosed for a systems and methods for improved LIDAR return light capture efficiency. One example method may include comparing, by a controller including a processor and at a first time, a first temperature of a first computing element to a first threshold temperature and a second temperature of a second computing element to a second threshold temperature. The example method may also include sending, based on a determination that the first temperature is below the first threshold temperature and the second temperature is above the second threshold temperature, a first signal to a switch to activate a data output corresponding to the second computing element. The example method may also include sending, to the second computing element, a second signal to cause a third computing element to increase heat dissipation from the third computing element to the first computing element.

Abstract: The concepts, systems and methods described herein are directed towards a method for secure booting. The method is provided to including: loading and executing a firmware in a Management Engine (ME) of a system; establishing, by the ME, a communication channel to a security device; receiving, by the ME, an encrypted boot image from the security device; decrypting, by the ME, the encrypted boot image; storing, by the ME, the decrypted boot image in a secured storage medium; and resetting the system using the decrypted boot image in the secured storage medium.

Abstract: An integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

Abstract: Embodiments of the present invention provide a terminal control method and apparatus, and a terminal. The method includes: when a screen of a terminal is switched from a screen-on state to a screen-off state, detecting whether an enabling condition of a power saving mode is satisfied; and if the enabling condition of the power saving mode is satisfied, performing a power saving operation, where the power saving operation is used to reduce power consumption that occurs when an application program in the terminal runs in a background. In the embodiments of the present invention, power consumption in a screen-off state is reduced as much as possible without affecting normal use of a user.

Abstract: A processor includes a plurality of cores, at least two of which may execute redundantly, a configuration register to store a first synchronization domain indicator to indicate that a first core and a second core are associated with a first synchronization domain, and a power controller having a synchronization circuit to cause a dynamic adjustment to a frequency of at least one of the first and second cores to cause these cores to operate at a common frequency, based at least in part on the first synchronization domain indicator.

Abstract: Embodiments are generally directed to enhanced power management for support of priority system events. An embodiment of a system includes a processing element; a memory including a registry for information regarding one or more system events that are designated as priority events; a mechanism to track operation of events that requires Turbo mode operation for execution; and a power control unit to implement a power management algorithm. The system is to maintain an first energy budget and a second residual energy budget for operation in a Turbo power mode, and wherein the power management algorithm is to determine whether to authorize execution of a detected system event in the Turbo power mode based on the second residual energy budget upon determining that the first energy budget is not sufficient for execution of the detected system event and that the detected system event is designated as a priority event.

Abstract: Obtaining a periodic test signal, sampling the periodic test signal using a sampling element according to a sampling clock to generate a sampled periodic output, the sampling element operating according to a supply voltage provided by a voltage regulator, the voltage regulator providing the supply voltage according to a supply voltage control signal, comparing the sampled periodic output to the sampling clock to generate a clock-to-Q measurement indicative of a delay value associated with the generation of the sampled periodic output in response to the sampling clock, generating the supply voltage control signal based at least in part on an average of the clock-to-Q measurement, and providing the supply voltage to a data sampling element connected to the voltage regulator, the data sampling element being a replica of the sampling element, the data sampling element sampling a stream of input data according to the sampling clock.

Abstract: A power-supply detection-circuit control method is a method for a first microcomputer to control operation of a power-supply detection circuit, the first microcomputer being connected to the power-supply detection circuit and controlling a fan motor, the power-supply detection circuit detecting a voltage to be applied from a power supply to the fan motor, wherein the first microcomputer switches the power-supply detection circuit between an operating state and a non-operating state on the basis of information indicating whether a predetermined condition is satisfied.

Abstract: A programmable semiconductor integrated circuit fabricated on a single microchip device capable of being selectively programmed to perform one or more logic functions provides a sleep mode using an intermittent power saving logic. The circuit includes configurable logic blocks (“LB”), memory, switch, and sleep controller. While LB can enter a power saving sleep mode (“PSSM”) in accordance with its power supply, the memory stores the configuration information for the LB. The switch is configured to manage the LB power supply based on a configurable sleep signal for facilitating the PSSM. The sleep controller facilitates generation of the configurable sleep signal in response to the signal from a power saving output port associated with the LB.