Abstract: An integrated circuit may include multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g., to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

Abstract: A processor includes a plurality of cores, at least two of which may execute redundantly, a configuration register to store a first synchronization domain indicator to indicate that a first core and a second core are associated with a first synchronization domain, and a power controller having a synchronization circuit to cause a dynamic adjustment to a frequency of at least one of the first and second cores to cause these cores to operate at a common frequency, based at least in part on the first synchronization domain indicator.

Abstract: A power control apparatus for an in-vehicle camera includes a temperature sensor which measures the temperature in a camera unit; a temperature data acquisition section which acquires periodically measured temperature data; a predicted temperature calculation section which calculates a temperature gradient from the acquired temperature data group and, based on the temperature gradient, calculates a future predicted camera unit temperature; a power supply section which supplies power to an image processing section; a temperature determination section which determines whether predicted temperature is within an operation guarantee temperature of camera unit component parts; and a power supply control section which, based on a determination result, issues a control command to start or stop power supply to the component parts from the power supply section, the power supply being started or stopped with appropriate timing using the predicted temperature, thereby enabling expeditious protection of the component part

Abstract: A device capable of self-detecting and self-allocating additional power and associated method are disclosed. The device includes a first module to route current from first power pins to a voltage rail having the first voltage level. The device includes a second module coupled to second power pins associated with a second voltage level. The second module routes current from the second power pins to the voltage rail having the first voltage level via a connecting voltage rail. The method includes determining, by the device, whether or not a presence of unused power pins is detected. Based on the detection, the method includes calculating a total amount of available additional power, repurposing the unused power pins as actively used power pins, and updating a power budget value based on the total amount of available additional power. The device may dynamically allocate power to accelerators based on a power allocation table and the power budget value.

Abstract: An information handling system includes a power supply unit having a power train configured to convert electrical energy received by the power supply unit into electrical energy usable by the information handling system and a microcontroller that includes non-volatile memory holding a line status register. The microcontroller is configured to set or reset the power supply unit for high line only operation, and the information handling system is configured to notify the power supply unit microcontroller to set or reset the power supply unit for high line only operation.

Abstract: Systems, methods, devices, and computer-implemented instructions for processor power management implemented in a compiler. In some implementations, a characteristic of code is determined. An instruction based on the determined characteristic is inserted into the code. The code and inserted instruction are compiled to generate compiled code. The compiled code is output.

Abstract: Power control and decoupling capacitance arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes a first circuit assembly comprising a first circuit board coupled to an integrated circuit device, wherein the first circuit board is coupled to first surface of a system circuit board. The assembly also includes a second circuit assembly comprising a second circuit board having one or more voltage adjustment units configured to supply at least one input voltage to the integrated circuit device, wherein the second circuit board is coupled to a second surface of the system circuit board and positioned at least partially under a footprint of the integrated circuit device with respect to the system circuit board.

Abstract: A method is for a first-time startup of a not fully personalized secure element, which serves for the use of services of a mobile communication network, in a mobile terminal. In the method, the secure element is started and requested to transmit a status message. The secure element transmits a status message in which it is stated whether the secure element: S1) contains only a bootloader but as yet no firmware image for the secure element; S2) contains a firmware image for the secure element but is not yet fully personalized; or S3) is fully personalized. The secure element is accepted in the cases S1), S2) and S3) and rejected in other cases. In the case S1), a download for a firmware image of the secure element is initiated for a first-time startup.

Abstract: A system and method for supporting an interconnection of processor cores, each core with functional state monitors for monitoring operations of each processor core, the processor cores interconnected using a resistive network connected between two-terminal regions being embedded in the resistive network such that each terminal of a region may be connected by controllable resistors to one or both fixed rails or by controllable resistors to one or more intermediate nodes. The resistor values are configurable to provide indirect control of the voltages across each two-terminal region, allowing full dynamic control of voltages of the two-terminal regions in a range up to the full voltage between the two voltage rails, and where a management unit accesses the functional state monitors and controls the resistor values. Feedback from functional state monitors allow the operating frequency to extend down to arbitrarily low values and up to the limits imposed by the technology.

Abstract: A system and a method for reconstructing an electronic data processing facility is provided. The method includes: accessing information that indicates a predetermined arrangement of hardware components included in the electronic data processing facility; verifying that the hardware components are operational based on the predetermined arrangement; accessing information that indicates a predetermined order of software modules to be installed in the electronic data processing facility; installing the software modules based on the predetermined order; accessing information that indicates a predetermined data set to be stored in a memory of the electronic data processing facility; and verifying that the installed software modules and the stored data set are operational based on a predetermined standard.

Abstract: A powered device electrical data modeling and intelligence system is used to monitor electrical data of powered devices to determine in-use activity thereof. A number of network-enabled electric plugs are deployed in a region, for example, within certain areas of a floor of a building or within certain floors of a building. Each of the network-enabled electric plugs is configured to deliver electricity from an electricity source to one or more powered devices located in the region. A server runs a web application used to monitor electrical data for the region based on electricity drawn by each of the one or more powered devices. The web application computes usage metrics for the powered devices by modeling electrical data for the powered devices into clusters representative of device operational states. The web application may then determine an operational state of a powered device according to the usage metrics.

Abstract: A distributed power control system is provided. The system can include a datacenter and a remote master control system. The datacenter can include (i) computing systems, (ii) a behind-the-meter power input system configured to receive power from a behind-the-meter power source and deliver power to the computing systems, and (iii) a datacenter control system configured to control the computing systems and the behind-the-meter power input system. The remote master control system can be configured to issue instructions to the datacenter that affect an amount of behind-the-meter power consumed by the datacenter. The datacenter control system can receive, from a local station control system configured to at least partially control the behind-the-meter power source, a directive for the datacenter to ramp-down power consumption, and in response to receiving the directive, cause the computing systems to perform a set of predetermined operations correlated with the directive.

Abstract: In one embodiment, a method for managing a dynamic total power level for an information handling system includes: identifying, by a power manager of the information handling system, a first power level associated with a processor subsystem of the information handling system, the first power level based on a cooling capacity associated with the information handling system; identifying, by the power manager, a second power level associated with a graphics processing unit of the information handling system, the second power level based on a performance associated with the processor subsystem; determining, by the power manager, the dynamic total power level based on the first power level and the second power level; and modifying, by the power manager, a fixed total power level based on the dynamic total power level, the dynamic total power level causing the processor subsystem and the GPU to operate within the dynamic total power level.

Abstract: The electronic device with power-off partition includes a signal transmitting module, two repeater modules, and a working module. Each of the repeater modules includes a first power domain, a second power domain, and a transceiver circuit. A transmission path between the first power domain and the second power domain is maintained at a logic state when the second power domain is in power off mode. The transceiver circuit of one of the two repeater modules encodes a standby signal obtained from the signal transmitting module and transmits an encoded standby signal. The transceiver circuit of the other of the repeater modules decodes the encoded standby signal and transmits a decoded standby signal. The working module transmits, according to the decoded standby signal, a power-off signal to the transceiver circuits of the two repeater modules, so that the second power domains enter the power-off mode in response to the power-off signal.

Abstract: The invention relates to a nanosecond-scale power resource allocation method and system for microservices. In order to eliminate the macro-control delays, it uses an auto power budgeting module to distribute the limited power resource to each microservice according to its unique power-performance model. On the other side, it deploys an agile power regulation module to bypass the slow power control procedures at the server system layer. By directly invoking the voltage regulation circuit on the processor, this can remove the micro-execution delays. It also leverages a transparent mapping mechanism to coordinate the work of the auto power budgeting module and the agile power regulation module to achieve the optimal allocation of power resources. The present invention can exploit the intra-application variability brought by microservices, thus further break the energy-saving limitation of traditional data centers.

Abstract: A computer may be provided on a mining machine comprising a mother board, a power supply in operable communication with the mother board, an input/output interface in communication with the mother board, and a plurality of hash boards each in communication with the mother board and comprising a plurality of mining chips. The computer may execute instructions that cause the computer to perform establishing communication with an external device, retrieving at least one profit variable from the external device, calculating an estimated profitability of a first mining chip based on the profit variable, and adjusting a chip voltage supplied to the first mining chip and adjusting a chip frequency of the first mining chip to maximize the estimated profitability. Alternatively, the instructions may cause the computer to adjust the chip voltage and the chip frequency to maintain a temperature within a predetermined range.

Abstract: An operational circuit of a virtual currency data processing device includes: at least two operational chip groups configured to operate within respective operating voltage threshold ranges of the operational chip groups to receive a communication signal which includes an issued task, perform calculations according to the issued task, and transmit a communication signal; a control module configured to operate within an operating voltage threshold range to transmit the communication signal which includes the issued task and receive the communication signal which includes the calculation result; at least two signal forwarding and electrical isolation modules, each of which is communicatively connected to and is configured to forward communication signals between the control module and the respective operational chip group, and isolate an operating voltage threshold of the operational chip groups to make the operational chip groups and the control module capable of identifying communication signals sent by each

Abstract: A memory device includes: a first clock receiver configured to receive a first clock signal; a second clock receiver configured to receive a second clock signal when data is input or output, wherein the second clock signal has a first clock frequency in a preamble period, and has a second clock frequency different from the first clock frequency after the preamble period; a command decoder configured to receive a clock synchronization command synchronized with the first clock signal and generate a clock synchronization signal, wherein the clock synchronization signal is generated during the preamble period; and a clock synchronizing circuit configured to generate a plurality of division clock signals in response to the second clock signal, latch the clock synchronization signal during the preamble period, and selectively provide the plurality of division clock signals as internal data clock signals according to a result of the latching.

Abstract: The present application describes a power management system for controlling delivery of power to a plurality of processing elements. The power management system includes a plurality of power management circuits arranged between terminals of a power supply. Each power management circuit is configured to connect to a processing element of the plurality of processing elements, and either supply sufficient power to power processing at the processing element, or prevent supply of sufficient power to power processing at the processing element. The power management system includes one or more power controllers arranged to determine whether or not to supply sufficient power to a processing element of the plurality of processing elements to perform processing.

Abstract: Provided is a control system, including: a power source control unit for controlling a power source included in a mobile object; a mobile object control unit for controlling the mobile object; and an update control unit for receiving an update program of the power source control unit and the mobile object control unit, and transmitting the update program to one of the power source control unit and the mobile object control unit to be updated by the update program, wherein the power source control unit includes a first storage area to be updated and a second storage area not to be updated by the update program, and the power source control unit includes, in the second storage area, first control information for causing the power source to supply power in a case where the first storage area is updated by the update program transmitted from the update control unit.