Patents Examined by Nitin C. Patel
  • Patent number: 10579132
    Abstract: Power consumption by a first host included in a plurality of hosts in a clustered computing system, where each of the hosts executes one or more applications, is managed by detecting that a utilization level of the first host falls below a threshold value and, responsive to the detecting, migrating one or more applications executing on the first host to a second host. After the migration is completed, the first host is caused to consume less power while remaining powered on.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: March 3, 2020
    Assignee: VMware, Inc.
    Inventors: Parth Shah, Madhuri Yechuri
  • Patent number: 10574077
    Abstract: A method and apparatus for charging an electronic device and a storage medium are provided. The electronic device includes a rechargeable battery; a charging port; and at least one processor configured to: if a supply power amount of power supplied from an outside through the charging port is smaller than a use power amount of power used by the electronic device and a remaining amount of the battery is smaller than or equal to a reference value, switch the electronic device to a power-saving mode. Also, other embodiments may be implemented.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: February 25, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dae-Han Choi
  • Patent number: 10553264
    Abstract: A memory device includes: a first clock receiver configured to receive a first clock signal; a second clock receiver configured to receive a second clock signal when data is input or output, wherein the second clock signal has a first clock frequency in a preamble period, and has a second clock frequency different from the first clock frequency after the preamble period; a command decoder configured to receive a clock synchronization command synchronized with the first clock signal and generate a clock synchronization signal, wherein the clock synchronization signal is generated during the preamble period; and a clock synchronizing circuit configured to generate a plurality of division clock signals in response to the second clock signal, latch the clock synchronization signal during the preamble period, and selectively provide the plurality of division clock signals as internal data clock signals according to a result of the latching.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye-Ran Kim, Seong-Hwan Jeon, Tae-Young Oh
  • Patent number: 10551903
    Abstract: A display apparatus includes a display panel and a power supply. The display panel displays an image at a first driving frequency in a normal mode and displays an image at a second driving frequency in a low power mode. The second driving frequency is lower than the first driving frequency. The power supply outputs a first initialization voltage at a first level to the display panel during an active period of the low power mode. The power supply outputs a second initialization voltage at a second level to the display panel during at least a portion of a blank period of the low power mode. The second level is higher than the first level.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: February 4, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Taehyeong An, Suhyeong Park, Soowan Yoon
  • Patent number: 10551892
    Abstract: Approaches, techniques, and mechanisms are disclosed for a centralized backup power support system that improves testability of non-volatile dual in-line memory modules (NVDIMM) on Automatic Test Equipment (ATE) testers and in-system tests. An NVDIMM includes both volatile memories and non-volatile memories. According to an embodiment, a compact backup power distribution board is powered with an external power supply with an individual protection circuit. The backup power distribution board has an unlimited energy capacity for any density of NVDIMM and zero charge waiting time. According to an embodiment, instead of using an electric double-layer capacitor (EDLC) to support backup power, a resistor is used instead of an EDLC on each backup power module. There is no charging time when the backup power module does not have EDLC cells, resulting in significant reduction in test time and production cost and increase in production output.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: February 4, 2020
    Assignee: SMART Modular Technologies, Inc.
    Inventor: Jinying Shen
  • Patent number: 10545551
    Abstract: A communication device for starting power supply before establishment of a link is provided. A device to be connected to a source device or a sink device includes a device information presenting unit for presenting device information on power supply of the device. The device information presenting unit presents a device type (no need power device, need power device, and provide power device). At the time when the device is connected to an MHL connector of the source device or the sink device, even when the link is not established, the source device or the sink device reads information from the device information presenting unit and appropriately starts to supply and demand electric power.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: January 28, 2020
    Assignee: SONY CORPORATION
    Inventor: Satoshi Teramoto
  • Patent number: 10545559
    Abstract: A data processing system comprising an arithmetic logic unit (ALU) configured to perform a data processing operation. The data processing system also includes a register arranged to receive an output of the data processing operation, the register comprising a plurality of single-bit storage devices arranged to store binary data of a predetermined data size. A control system is arranged to place a subset of the plurality of single-bit storage devices into a power saving state based on at least one parameter relating to the data processing operation, to limit an output data size of the output of the data processing operation to less than the predetermined data size.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 28, 2020
    Assignee: Apical Limited
    Inventor: Daren Croxford
  • Patent number: 10545556
    Abstract: An IC includes logic groups each including a launch and a capture FF with a logic cloud in between. A power switch is in series with a power supply node of the logic groups. The logic groups have a clock-gating and power control (PCGC) block for dynamically generating a power supply enable (PS_EN) signal output coupled to a control node of the power switch and a clock output (CLK_OUT) signal coupled to a clock input of the launch or capture FF for clocking the logic groups. The PCGC blocks receive an EN signal and a CLK_IN signal and dynamically generate the PS_EN signal and CLK_OUT signals. During clock cycles at least one logic group(s) does not contribute to an intended logic result for the IC the CLK_OUT signal disables switching of at least a portion of the logic group(s) while the PS_EN signal turns off power to the logic group(s).
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: January 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rama Venkatasubramanian, Jose Flores, Ivan Santos
  • Patent number: 10534412
    Abstract: A system to regulate the temperature of a Source Port that includes a Port Controller having a first source power capabilities list stored thereon in a non-transitory digital media, the source capabilities list identifying a plurality of first power delivery capabilities that, based on their power requirements, may be negotiated by the Port Controller, a temperature sensor that measures a temperature of the power system and communicates that measured temperature to a comparator. The comparator compares the measured temperature to predefined limit temperatures and when the measured temperature crosses a predefined limit temperature threshold, the first source capabilities list being replaced with a second source capabilities list identifying a plurality of second power capabilities that, based on their power requirements, may be connected to the Source Port.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: January 14, 2020
    Assignee: Astronics Advanced Electronic Systems Corp.
    Inventors: David Perchlik, Reid Adriance
  • Patent number: 10528115
    Abstract: Disclosed embodiments include a method performed by a computing device of a computer system having a hierarchical arrangement of power nodes including servers. The method includes determining power utilization patterns of the servers, calculating asynchrony scores for the servers based on the power utilization patterns, and clustering the servers into clusters based on the asynchrony scores, where each cluster has servers that have synchronous utilization patterns. The method also includes allocating the servers to the hierarchical arrangement of power nodes by selecting servers from the clusters to reduce synchronous power utilization patterns by the hierarchical arrangement of power nodes.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: January 7, 2020
    Assignee: Facebook, Inc.
    Inventors: Qingyuan Deng, Chang-Hong Hsu
  • Patent number: 10509458
    Abstract: An information processing device suppresses the entering of a state unintended by a user in a standby mode. The information processing device, which has a standby mode and a normal operation mode, has a mode control portion changing the mode to the standby mode of bringing the state into a first low power consumption state and configured to be switched to a first operating state in which background processing is executed in response to a stop of a display of a display portion, and a power setting processing portion configured to set a first upper limit power consumption in the first operating state and a second upper limit power consumption in a second operating state in the normal operation mode, and set the first upper limit power consumption so as to be lower than the second upper limit power consumption when the mode control portion changes the mode to the standby mode.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 17, 2019
    Assignee: LENOVO (SINGAPORE) PTE. LTD.
    Inventors: Kazuhiro Kosugi, Takuroh Kamimura, Hajime Yoshizawa, Yuhsaku Sugai
  • Patent number: 10506734
    Abstract: An information handling system includes multiple power supply units, and first and second chassis management controllers. The power supply units provide power to components within the information handling system. The first chassis management controller calculates a first number of power supply units needed to provide power to the components of the information handling system, and asserts a first chassis armed signal to servers in response to a detection that the first number of power supply units is greater than zero. The second chassis management controller receives the first number of power supply units from the first chassis management controller, and asserts a second chassis armed signal to the servers in response to a detection that the first number of power supply units being greater than zero.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: December 10, 2019
    Assignee: Dell Products, LP
    Inventors: Aaron M. Rhinehart, Dan Rao, Binay A. Kuruvila
  • Patent number: 10503234
    Abstract: An electromechanical relay switching system for reducing electromagnetic or radio interference. The system includes an electromechanical relay with an energizeable coil and a microcontroller configured to synchronize energizing the coil relative to a voltage zero crossing time based on a relay contact close time and relay contact bounce time measured particularly for the relay.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: December 10, 2019
    Assignee: Kortek Industries Pty Ltd
    Inventors: Barrie Davis, Benjamin Davis
  • Patent number: 10488903
    Abstract: An extended base of a mobile terminal and a power supply management method for the extended base is described herein. When a mobile terminal is inserted into an extended base, an enable circuit of the extended base is electrically connected to the mobile terminal and generates an enable signal, and a switch circuit outputs a voltage under control of the enable signal, so that a power supply of the extended base supplies power under control of the voltage. When the mobile terminal is removed from the extended base, the enable circuit stops generating the enable signal, and the switch circuit stops outputting the voltage, so that the power supply cannot supply power under the control of the voltage.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: November 26, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Huiyuan Wang, Chao Fu
  • Patent number: 10489166
    Abstract: A computer program product for dynamically reconfiguring time zones in real-time using plural time zone (TZ) libraries is provided. The method provides integrating a first time zone information data (TZID) version and a second TZID version into a TZ library in an operating system. A first configuration comprising the TZ library and the first TZID version is selected. Responsive to adjusting the first configuration to a second configuration comprising the TZ library and the second TZID version, the second configuration is used automatically without restarting the operating system and without restarting an application.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: November 26, 2019
    Assignee: International Business Machines Corporation
    Inventors: David N. Clissold, Su Liu, Michael Ow, Teerasit Tinnakul
  • Patent number: 10489165
    Abstract: A computer program product for dynamically reconfiguring time zones in real-time using plural time zone (TZ) libraries is provided. The method provides integrating a first time zone information data (TZID) version and a second TZID version into a TZ library in an operating system. A first configuration comprising the TZ library and the first TZID version is selected. Responsive to adjusting the first configuration to a second configuration comprising the TZ library and the second TZID version, the second configuration is used automatically without restarting the operating system and without restarting an application.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: November 26, 2019
    Assignee: International Business Machines Corporation
    Inventors: David N. Clissold, Su Liu, Michael Ow, Teerasit Tinnakul
  • Patent number: 10488907
    Abstract: According to one embodiment, an electronic device operable by a power supply voltage obtained from a commercial power supply, includes a capacitor charged with the power supply voltage, and a circuitry configured to write power failure occurrence time information to a nonvolatile memory using power of the capacitor after occurrence of power failure, read the power failure occurrence time information from the nonvolatile memory, and transmit the power failure occurrence time information to an external device.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: November 26, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tadashi Tsuji
  • Patent number: 10466760
    Abstract: An energy allocation system may include a group of agents, each agent corresponding to a device requesting an amount of energy. The energy allocation system may perform a comparison, such as a hybridized comparison, between a selected agent and each other agent included in the group. Based on the outcome of each comparison for the selected agent, an aggregated outcome for the selected agent is determined. The aggregated outcome for the selected agent is compared to a threshold for the energy allocation system. Based on the comparison of the aggregated outcome to the threshold, the selected agent either receives the requested amount of energy or receives an instruction to enter a low-power state.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: November 5, 2019
    Assignee: Landis+Gyr Innovations, Inc.
    Inventors: Mohit Srinivasan, David Decker
  • Patent number: 10467415
    Abstract: An unlockable bootloader of an electronic device may be unlocked by a user of the electronic device using a sanctioned bootloader unlocking process. An eligibility check may be performed through an interaction between the device and at least one network node(s) to determine whether a user of the electronic device is eligible to unlock the bootloader of the electronic device. If eligible, the user can provide user input to unlock the bootloader, causing the device to send an acknowledgement to the network, and, in response, the device receives a token from the network node. Upon receipt of the token, the electronic device can perform a first reboot, unlock the bootloader using the token, and perform a second reboot into the operating system with an unlocked bootloader. Due to the device-network interactions during the sanctioned bootloader unlocking process, one or more protection measures can be implemented, such as disabling software updates.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: November 5, 2019
    Assignee: T-Mobile USA, Inc.
    Inventor: Joshua Patrick Finger
  • Patent number: 10459867
    Abstract: A dynamic bus communication apparatus for an electrosurgical system includes a data wire, a clock wire, a first variable resistor coupled to the data wire, a second variable resistor coupled to the clock wire, an analog to digital converter (ADC), and a controller. The data wire is configured to transmit a data signal between a battery and an instrument powered by the battery. The clock wire is configured to transmit a clock signal between a battery and an instrument. The ADC is configured to sample the data signal and the clock signal at a substantially higher frequency than a frequency of the clock signal. The controller is configured to control a resistance of the first variable resistor and a resistance of the second variable resistor based on the digitally sampled data signal and the digitally sampled clock signal.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: October 29, 2019
    Assignee: COVIDIEN LP
    Inventor: Scott E. M. Frushour