Patents Examined by P. Hassanzadeh
  • Patent number: 6190458
    Abstract: In this impurity eliminating apparatus, a mounting stand on which a wafer is mounted and a casing which confronts the mounting stand are provided in a container. A lower face of the casing consists of. quartz glass. Inside the casing, an irradiating body for irradiating ultraviolet rays toward the wafer on the mounting stand is provided. The casing is full of inactive gas atmosphere supplied from an inactive gas supply pipe. The atmosphere above the wafer is exhausted from one side by an exhauster. Following the treatment by the impurity eliminating apparatus with the above structure, coating treatment with a treatment solution for forming a SOG film is performed. Thus, organic substances on the surface of the wafer is eliminated to form the SOG film.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: February 20, 2001
    Assignee: Tokyo Electron Limited
    Inventor: Koji Harada
  • Patent number: 6189484
    Abstract: A helicon wave, high density RF plasma reactor having improved plasma and contaminant control. The reactor contains a well defined anode electrode that is heated above a polymer condensation temperature to ensure that deposits of material that would otherwise alter the ground plane characteristics do not form on the anode. The reactor also contains a magnetic bucket for axially confining the plasma in the chamber using a plurality of vertically oriented magnetic strips or horizontally oriented magnetic toroids that circumscribe the chamber. The reactor may utilize a temperature control system to maintain a constant temperature on the surface of the chamber.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: February 20, 2001
    Assignee: Applied Materials Inc.
    Inventors: Gerald Zheyao Yin, Chii Guang Lee, Arnold Kholodenko, Peter K. Loewenhardt, Hongching Shan, Diana Xiaobing Ma, Dan Katz
  • Patent number: 6187211
    Abstract: A method of fabrication is provided for multi-step microlithographic structures including Fresnel lenses whereby the process includes the formation of intermediate etch stop layers that are embedded with the structure material. This is accomplished in one aspect of the invention by depositing Fresnel lens material using known techniques and the selectively altering the chemistry of the material being deposited to form the intermediate etch stop layers at suitable positions without interrupting the deposition process. In another aspect, etch stop layers are patterned on layers of the lens material and embedded between such layers. The structure, or lens, is then formed using masking, patterning and etching techniques.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: February 13, 2001
    Assignee: Xerox Corporation
    Inventors: Donald L. Smith, James C. Mikkelsen, Jr., Babur B. Hadimioglu, Martin G. Lim
  • Patent number: 6183565
    Abstract: A semiconductor wafer is processed while being supported without mechanical contact. Instead, the wafer is supported by gas streams emanating from a large number of passages in side sections positioned very close to the upper and lower surface of the wafer. The gas heated by the side sections and the heated side sections themselves quickly heat the wafer to a desired temperature. Process gas directed to the “device side” of the wafer can be kept at a temperature that will not cause deposition on that side section, but yet the desired wafer temperature can be obtained by heating non-process gas from the other side section to the desired temperature. A plurality of passages around the periphery of the wafer on the non-processed side can be employed to provide purge gas flow that prevents process gas from reaching the non-processed side of the wafer and the adjacent area of that side section.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: February 6, 2001
    Assignee: ASM International N.V
    Inventors: Ernst Hendrik August Granneman, Frank Huussen
  • Patent number: 6178919
    Abstract: The invention relates to a plasma processing reactor apparatus for semiconductor processing a substrate. The apparatus includes a chamber. The apparatus further includes a top electrode configured to be coupled to a first RF power source having a first RF frequency and a bottom electrode configured to be coupled to second RF power source having a second RF frequency that is lower than the first RF frequency. The apparatus additionally includes an insulating shroud that lines an interior of the chamber, the insulating shroud being configured to be electrically floating during the processing. The apparatus further includes a perforated plasma confinement ring disposed outside of an outer periphery of the bottom electrode, a top surface of the perforated plasma confinement ring being disposed below a top surface of the substrate and electrically grounded during the processing.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: January 30, 2001
    Assignee: Lam Research Corporation
    Inventors: Lumin Li, George Mueller
  • Patent number: 6181727
    Abstract: A component for use in a high-temperature environment such as the coating chamber of a PVD apparatus. A reflective coating on the component serves as a barrier to radiant heat transfer to the component by reflecting thermal radiation. The coating comprises at least one pair of reflective layers, each layer being formed of a material that is essentially transparent to electromagnetic wavelengths of between 500 and 3000 nanometers (nm). In addition, the material of the outermost layer of the pair has a higher index of refraction than the material of the other layer of the pair.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: January 30, 2001
    Assignee: General Electric Company
    Inventors: William R. Stowell, John F. Ackerman, Jeffrey A. Conner, John D. Evans, Sr., Antonio F. Maricocchi
  • Patent number: 6176930
    Abstract: An apparatus and method for controlling a flow of process material to a deposition chamber. The apparatus comprises an injector valve, disposed between the process material source and the deposition chamber. The injector valve controls the flow of precursor material by repeatedly opening and closing the injector valve with a predetermined duty cycle. The apparatus further comprises an evaporator coupled to the injector valve for evaporating the precursor.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: January 23, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Keith K. Koai, Tung-Ching Tseng, James J. Chen, Mark S. Johnson, John Schmitt, Sean Li
  • Patent number: 6176933
    Abstract: An end point window assembly in an etching apparatus includes an end point bracket having an inducing tube connected to an optic cable. The end point bracket is connected to a process chamber of the etching apparatus and a main window is provided to cut off a gap between the optic cable and the process chamber. The end point window assembly further includes at least a spare window insertion groove between the main window and the process chamber about the inner circumference of the inducing tube. A spare window guiding groove corresponding in location to the spare window insertion groove is connected to and tunnelled through an inside of a body of the end point bracket, a spare window is displacably movable between the spare window insertion groove and the window guiding groove wherein the spare quartz window selectively closes the inducing tube, and a moving mechanism for transferring the spare window along the spare window guiding groove in accordance with an extent of contamination of the spare window.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: January 23, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Dal-Seung Yang
  • Patent number: 6174373
    Abstract: An apparatus and process for limiting residue remaining after the etching of metal in a semiconductor manufacturing process, such as etching back a tungsten layer to form tungsten plugs, by passivating the surface of a wafer with a halogen-containing gas are disclosed. The wafer is exposed to the halogen-containing gas in a chamber before a metal layer is deposited on the wafer. The exposure can occur in the same chamber as the metal deposition, or a different chamber. The wafer can remain in the chamber or be moved to another chamber for etching after exposure and deposition.
    Type: Grant
    Filed: January 4, 2000
    Date of Patent: January 16, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Steve Ghanayem, Moris Kori, Maitreyee Mahajani, Ravi Rajagopalan
  • Patent number: 6170432
    Abstract: A showerhead electrode assembly for a plasma reactor for processing semiconductor wafers includes a gas plate having a plurality of through holes for passage of gas. The top face or side of the gas plate is of smaller diameter than the bottom side or face of the gas plate. An acutely angled peripheral groove is formed between the top face of the gas plate, and the lower portion thereof, with the groove terminating at a band-like ledge with the top face and lower portion. A locking ring is provided by two identical semicircular sections, each of which include in a lower portion of an inside sidewall, respectively, an acutely angled peripheral groove for mating with the groove of the gas plate. A unitary circular support collar is formed with a circular channel in a bottom portion thereof.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: January 9, 2001
    Assignee: M.E.C. Technology, Inc.
    Inventors: Matthew Peter Szapucki, Richard Kulkaski, Trevor J. Hadley, Mark Anthony Santorelli
  • Patent number: 6170430
    Abstract: A gas feedthrough in a semiconductor processing apparatus comprises a static-dissipative composite material. This material is characterized by good resistance to electromigration and is preferably made of a homogeneous material. This apparatus for preventing the transfer of energy to a gas flown through a gas line and comprises a gas feedthrough comprising a static-dissipative material, the feedthrough having a first end for abuttingly contacting an electrically energized member and a second end for contacting a grounded member, the feedthrough defining a void therein along its length to house a gas line.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: January 9, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Kuo-Shih Liu, Ernest Cheung, Prasanth Kumar, John Ferguson, Michael G. Friebe, Ashish Shrotriya, William Nixon Taylor, Jr.
  • Patent number: 6168669
    Abstract: Supporting members are provided at three places, for example, on a frame section of a pair of tweezers. Each supporting member has a tapered face as an inclined guide for allowing a rim portion of a substrate to slide down to be guided to a predetermined position. A vertical wall which is formed continuing from the tapered face and being nearly perpendicular to a supported face of a wafer is provided at an upper end of the tapered face. Even when the rim portion of the wafer rises along the tapered face with the movement of the tweezers, the rim portion stops by hitting against the vertical wall, thereby preventing the wafer from falling from the tweezers.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: January 2, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Kenji Yasuda, Naruaki Iida
  • Patent number: 6167837
    Abstract: A PECVD reactor for processing a single wafer. The reactor has a susceptor for holding a wafer horizontally, an apparatus for lifting the wafer from the susceptor for loading and unloading. The horizontally positioned thermal plate is positioned above the susceptor for uniform transfer of radiant heat energy from heat lamps to the wafer. The thermal plate also serves as an RF plate, being constructed of an electrically conductive material and connected to an RF transmission line and connector for receiving RF energy from an RF generator for the purpose of providing an RF field for plasma enhancement. The thermal plate is configured thinner near its edges, so as to space the plate further from the susceptor and thicker near the center, placing it closer to the susceptor.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: January 2, 2001
    Assignee: Torrex Equipment Corp.
    Inventor: Robert C. Cook
  • Patent number: 6159842
    Abstract: A method for fabricating a hybrid low dielectric constant intermetal dielectric layer with improved reliability for multilevel electrical interconnections on integrated circuits is achieved. After forming metal lines for interconnecting the semiconductor devices, a protective insulating layer composed of a low-k fluorine-doped oxide (k=3.5) is deposited. A porous low-k spin-on dielectric layer (k less than 3) is formed in the gaps between the metal lines to further minimize the intralevel capacitance. A more dense low-k dielectric layer, such as FSG, is deposited on the porous layer to provide improved structural mechanical strength and over the metal lines to provide reduced intralevel capacitance. Via holes are etched in the FSG and are filled with metal plugs and the method can be repeated for additional metal levels to complete the multilevel interconnections on the integrated circuit.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: December 12, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Weng Chang, Yao-Yi Cheng
  • Patent number: 6155200
    Abstract: In an ECR plasma generator, radio frequency ranging from 3 to 300 MHz is applied from a radio frequency power supply to an electrode which is provided in a chamber having an exhaust system and which serves as a shower head for gas introduction, and power is supplied to a coil provided at the outer periphery of the chamber, so as to form a magnetic field an integer number of times as large as a resonant magnetic field corresponding to the applied radio frequency, parallel with the direction of an electric field and to generate ECR plasma in an atmosphere of the supplied process gas.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: December 5, 2000
    Assignees: Tokyo Electron Limited, Yasuhiro Horiike
    Inventors: Yasuhiro Horiike, Kohei Kawamura
  • Patent number: 6123791
    Abstract: A ceramic composition of matter for a process kit and a dielectric window of a reactor chamber wherein substrates are processed in a plasma of a processing gas. The ceramic composition of matter contains a ceramic compound (e.g. Al.sub.2 O.sub.3) and an oxide of a Group IIIB metal (e.g., Y.sub.2 O.sub.3). A method for processing (e.g. etching) a substrate in a chamber containing a plasma of a processing gas. The method includes passing processing power through a dielectric window which is formed from the ceramic composition of matter.
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: September 26, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Nianci Han, Hong Shih, Jie Yuan, Danny Lu, Diana Ma
  • Patent number: 6120611
    Abstract: An apparatus and a method for hermetically sealing a vacuum process chamber substantially without frictional force are provided. In the apparatus, a ball bearing is used between a door and a loader stage for facilitating the mounting of the former to the latter. A photosensing element is used which consists of a traversing flag mounted on a loader stage onto which a door is mounted, and a stationary photo transmitter/receiver mounted on the structure onto which a furnace tube is installed. The photosensing device enables the determination of the state of engagement between the door on the cantilever loader assembly and the flange on the furnace tube without any mechanical contact or frictional force occurring in the sensing device. A poorly mated interface between the door and the flange can thus be avoided and a substantially more reliable seal can be achieved between the sealing members.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: September 19, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuen Lin Guan, Huang Wen Chen, Wen Shing Liang
  • Patent number: 6113733
    Abstract: A top surface of a wafer is provided with an n-type source region, an n-type drain region, and an n-type semiconductor region. Dry etching using a plasma is performed with respect to an interlayer insulating film deposited on the wafer to form openings reaching the respective regions, followed by light etching for removing a damaged layer. In this case, exciting light is supplied intermittently to the n-type semiconductor region. The progression of the removal of the damaged layer and the stage of development of a newly damaged layer are sensed by monitoring the change rate of the intensity of reflected probe light in the presence and absence of the exciting light, resulting in the formation of a semiconductor device having low and equal contact resistance. In-line control using optical evaluation enables the implementation of semiconductor devices with excellent and consistent properties.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: September 5, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Eriguchi, Takayuki Yamada, Masanori Okuyama
  • Patent number: 6112697
    Abstract: Plasma enhanced chemical vapor deposition (PECVD) reactors and methods of effecting the same are described. In a preferred implementation, a PECVD reactor includes a processing chamber having a first electrode therewithin. A second electrode is disposed within the chamber and is configured for supporting at least one semiconductor workpiece for processing. A first RF power source delivers RF power of a first frequency to the first electrode. A second RF power source delivers RF power of a second frequency to the second electrode. Preferably the first and second frequencies are different from one another, and even more preferably, the first frequency is greater than the second frequency. The preferred reactor includes a thermocouple which provides temperature information relative to one of the electrodes.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: September 5, 2000
    Assignees: Micron Technology, Inc., Applied Materials, Inc.
    Inventors: Sujit Sharan, Gurtej S. Sandhu, Paul Smith
  • Patent number: 6113703
    Abstract: A method and apparatus for processing opposing surfaces of a wafer. In one embodiment a semiconductor processing chamber is provided having an opening which allows for insertion of a wafer. A wafer holder is located within the semiconductor processing chamber for receiving the wafer. An inlet port allows flow of gas into the semiconductor processing chamber. An outlet port allows flow of gas from the semiconductor processing chamber. A first heat plate is mounted within the semiconductor processing chamber so that a first face of a wafer, when held by the wafer holder, faces towards the first heat plate. A first heat source is located to heat the first heat plate. A second heat plate is mounted in position within the semiconductor processing chamber so that a second face of the wafer, opposing the first face, faces towards the second heat plate. A second heat source is located to heat the second heat plate.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: September 5, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Roger N. Anderson, Seiji Arima, Mahalingam Venkatesan, Kunio Kurihara