Abstract: A mobile communication terminal includes a receiver (2) receiving a radio wave from base stations, a detector (5, 6, 7) detecting spread codes from the signal received by the receiver (2), a demodulator (8) demodulating the received signal with the spread codes detected by the detector (5, 6, 7), a decoder (9) decoding data demodulated by the demodulator (8), and a control unit (4) controlling processing during cell search, and stopping processing of the data in response to reception of invalid data. Since the control unit (4) stops the processing of the data if it receives the invalid data, the cell search can be performed fast.

Abstract: A method for reducing multiple access interference (MAI) in a code division multiple access (CDMA) spread spectrum receiver assigned a number of codes which also despreads the received signal with the remaining codes of the same spreading factor. For forward link transmission with orthogonal codes, as in 3GPP and 3GPP2, interferers using larger spreading factors than the one used by the referenced mobile will have codes that are formed from the orthogonal codes of the same spreading factor as the multicodes corresponding to the referenced mobile. As a consequence, in a multipath environment, the output of a despreader using any of these remaining orthogonal codes will provide an estimate of the composite interference attributed to signals, if any, using codes that partly comprise the corresponding orthogonal code. No decisions are made for the previous despreader's output because it corresponds to a sum of interferers with unknown powers.

Abstract: An apparatus and method for estimating phase information, including a matched filter that outputs converted synchronization signals, based on received data, and converted information of the received data; a phase estimator, having a plurality of averagers, that outputs the phase information based on the received data, a code generated from a code generator, and the converted synchronization signals outputted from the matched filter; and a CPU that inputs the converted synchronization signals outputted from the matched filter into the plurality of averagers and initializes the averagers.

Abstract: A synchronization establishing apparatus in a spectrum spread communication system, includes a search section that calculates correlation values from a received spectrum spread signal, and calculates power values and power addition values of the power values. Also, the search section selects larger ones of the power addition values to output together with timing data corresponding to the selected larger power addition values. One of the symbols and the power values is corrected in phase based on phase change quantities. A frequency offset estimating section estimates frequency offsets from one of the correlation values and the power values and demodulation timing data and calculates the phase change quantities from the estimated frequency offsets. A demodulation path selecting section selects path timings based on the selected larger power addition values and outputs the demodulation timing data to the frequency offset estimating section.

Abstract: A changeover arrangement for the clock signals of parallel transmission connections of an assured data transmission link, wherein a clock signal is sent for the transmission paths by parallel outdoor units (OU) located in succession to a common indoor unit (IU), the clock signal is received by a corresponding set of second outdoor units, where phase locked loop signals are used to achieve the lock to the signal, and subsequent to which a second IU receives information of the mode of the phase lock. In addition, when errors are caused in the employed connection, the receiving unit selects a transmission path that has fewer errors based on mode information obtained from the outdoor unit.

Abstract: The invention provides methods and apparatus for multiple user detection (MUD) processing that have application, for example, in improving the capacity CDMA and other wireless base stations. One aspect of the invention provides a multiprocessor, multiuser detection system for detecting user transmitted symbols in CDMA short-code spectrum waveforms. A first processing element generates a matrix (hereinafter, “gamma matrix”) that represents a correlation between a short-code associated with one user and those associated with one or more other users. A set of second processing elements generates, e.g., from the gamma matrix, a matrix (hereinafter, “R-matrix”) that represents cross-correlations among user waveforms based on their amplitudes and time lags. A third procesing element produces estimates of the user transmitted symbols as a function of the R-matrix.

Abstract: A beam formation circuit and an apparatus and a method of receiving radio frequency signals making use of a smart antenna are described in which the amount of computation tasks required for the weight calculation is significantly reduced. In realizing the directivity of the smart antenna, the output signals corresponding to a plurality of sub-carriers are weighted with a common antenna weight for each of the antenna elements.

Abstract: A technique of decoding erroneous biphase signals is disclosed comprising the following steps. First, phase and magnitude sample values (ps, bs) are formed, from which a first digital signal (d1) is derived. From this, associated bit combinations (St1, St2; Stp) are determined, and a decision is made as to whether the respective bit combination (St1, St2; Stp) is a valid combination (Sg1, Sg2; Sgp) or an erroneous one (Sf1, Sf2; Sfp). Probability values (Sw1, Sw2; Swp) are determined that decide which parts of the erroneous bit combination (Sf1, Sf2; Sfp) are probably true and/or which are probably false. Next, a corrected bit combination (Sk1, Sk2; Skp) is formed from the existing information. Finally, a second digital signal (d2) is generated as an output signal, whose data states are formed either from the valid bit combination (Sg1, Sg2; Sgp) or from the corrected bit combination (Sk1, Sk2; Skp).

Abstract: An exemplary signal processing system determines vector mismatch between a plurality of signal paths. Advantageously, the system can determine mismatch across a range of frequencies. A signal generator of the system can provide a periodic calibration signal having a plurality of frequency components. The system frequency can translate the calibration signal to provide a first set of observed samples. The first sample set can be compared to a second set of samples, which can be modeled by a function of parameters including an estimated vector mismatch and a plurality of basis functions. A value of vector mismatch can then be determined (at least to an estimate) that minimizes the difference between the first sample set and the second sample set. Methods and other systems with different advantageous configurations are also described.

Abstract: A phase lock loop lock detect circuit determines whether an output signal of the phase lock loop is in phase-frequency synchronization with an input reference timing signal and provides an unlock alarm signal indicating that the output signal of a phase lock loop is no longer in phase-frequency synchronization with an input reference timing signal. The lock detection circuit has a first logic function circuit to combine a frequency increase signal and a frequency decrease signal of said phase lock loop to provide a frequency deviation signal. The first logic function in the preferred embodiment of this invention is an OR gate. The output of the first logic function circuit is an input to a second logic function circuit.

Abstract: The method determines the position of a predetermined known signal segment in a transmitted signal received in a receiver by means of a correlation between the received signal and a representation of the known signal segment stored in the receiver. The known signal segment is stored in the receiver as an erroned hierarchical sequence that is the sum of a hierarchical sequence and an error sequence. The correlation is formed as a sum of a correlation between the received signal and the stored hierarchical sequence and a correlation between the received signal end the stored error sequence.

Abstract: A communication system is designed that reduces co-channel interference when heterogeneous users are sharing spectrum. The system design enables a plurality of pairs of users to communicate their channel utilization time periods by using the durations and start or stop times of certain transmissions to signal the start times and durations of later transmissions. Other system users using possibly different communications protocols and different modulation technologies can measure the durations of received transmissions and to infer channel usage based on these durations.

Abstract: A receiver of a spread spectrum communication system comprises a plurality of despreading circuits, a rake circuit, and a path searcher. The plurality of despreading circuits despreads received signals having multipath components at predetermined timing allocated thereto. The rake circuit performs rake combining of the signals despread by despreading circuits. The path searcher forms a first window showing a part of a search range and calculates delay profile data of said received signals in said first window to search an effective path, forms at least one second window in the search range except said first window and calculates delay profile data of said received signals in said second window, and detects timing at which said received signals are despread based on calculated delay profile data to allocate the detected timing to said despreading circuits.

Abstract: New version packet data devices support a backwards-compatible signal format. New version devices operate within a first frequency band while old version devices operate within a second frequency band. The first frequency band differs from but overlaps with the second frequency band. The new version devices may operate on a first carrier frequency (within the first frequency band) while old version devices may operate at a second carrier frequency (within the second frequency band). The new version devices and/or the old version devices may also support carrier-less modulations. Preamble, header, and trailer portions of a new version signal include a plurality of spectral copies of a baseband modulated signal. One or more of these spectral copies of the baseband modulated signal is/are indistinguishable from corresponding components of an old version signal. The payload of the new version signal may be formed in the same manner or may be formed in have a wider bandwidth, higher data rate format.

Abstract: A method for synchronizing communications in a wireless communications network wherein time synchronization is performed between a clock master and a clock slave. To achieve synchronization between the clock master and the clock slave, several time synchronization passes are initiated by the clock slave to the clock master. For every pass, each clock slave component generates and transmits a first timing cell containing a transmission time based on the clock slave's component clock, to the clock master. Upon receipt of the first timing cell, the clock master generates and transmits to the clock slave component a second timing cell containing the time the clock master received the first timing cell and the time the clock master transmitted the second timing cell. Upon receipt of the second timing cell, the clock slave component will obtain its reception time and calculate a transmission delay based on the reception time and the timing information contained in the timing cells.

Abstract: A channel equalizer includes an equalizer filter for correcting an error upon receipt of a signal transmitted by a sending end, a DD slicer for calculating a first error upon receipt of the corrected signal from the equalizer filter, a Sato slicer for calculating a second error upon receipt of the corrected signal from the equalizer filter, and a DD error size calculation unit for taking the absolute value of the real part and imaginary part of the first error calculated from the DD slicer and summing these absolute values.

Abstract: An apparatus and method is disclosed for using adaptive algorithms to exploit sparsity in target weight vectors in an adaptive channel equalizer. An adaptive algorithm comprises a selected value of a prior and a selected value of a cost function. The present invention comprises algorithms adapted for calculating adaptive equalizer coefficients for sparse transmission channels. The present invention provides sparse algorithms in the form of a Sparse Least Mean Squares (LMS) algorithm and a Sparse Constant Modulus Algorithm (CMA) and a Sparse Decision Directed (DD) algorithm.

Abstract: The present invention refers to a method and an apparatus for synchronizing operation at a node of a communication network. According to the invention a phase relationship between an output frame synchronization signal and an input frame synchronization signal is controlled by the adjustment of a phase difference between the output frame synchronization signal and a node synchronization signal.

Abstract: A power back-off system and method to mitigate far-end crosstalk interference between channels in a communication system through a generalization of the reference length and equalized FEXT methods, a power back-off method is provided that allows for control over the SNR of the channels by trading SNR on shorter channels against SNR on the longer channels. The generalization also provides for a power back-off method that can provide for two or more data rate service areas.

Abstract: The present invention discloses a multiple-stage FIFO mechanism capable of receiving data signals correctly. The circuit includes a write-enable pulse sequencer for sequentially generating a plurality of write-enable signals. An N-stage FIFO sequentially stores an input data and outputs the input data. An output stage selector sequentially generates a control signal. And a multiplexer selectively outputs the input data from the N-stage FIFO.