Abstract: A panel board has a first voltage layer sandwiched between two ground layers at a close spacing to produce a large distributed capacitance; the two ground layers are connected by plated-through conductive holes spaced regularly across the board; a second (exposed) voltage layer is connected by regularly spaced plated-through holes to the first voltage layer, increasing the current carrying capacity of, and reducing the resistance across, the board; the plated-through holes are arranged in rows and columns in a pattern permitting the mounting of decoupling capacitors, at any point on the board, in a position parallel to the rows or parallel to the columns; and a socket terminal can be electrically connected directly to the exposed voltage layer or to the exposed ground layer using a ring connector.

Abstract: A universal, programmable interface for interconnecting printed circuit boards and discrete wires. Standard card-edge connectors and standard cables interconnect one or two bytes of i/o signals between the pc boards and the programmable interface, with the interface being programmed by jumpers to interconnect the desired contact fingers of the interface with screw-type terminations for receiving discrete wires.

Abstract: A chip carrying module includes a number of engineering change lines buried below the surface of the module. The engineering change lines are interrupted periodically to provide a set of vias extending up to the upper surface of the module between each set of chips where the vias are connected by dumbbell-shaped pads including a narrow link which permits laser deletion or the like. In addition, the dumbbell-shaped pads are located adjacent to the fan-out pads for the chips. Thus, the fan-out pads can be connected to the dumbbell-shaped pads by means of fly-wires. In addition, individual engineering change lines can be connected together to reach every region of the module by connecting a fly-wire from one dumbbell-shaped pad to another. In addition, by deleting the links at such dumbbell-shaped pads, the engineering change connections are limited to the particular path required.

Abstract: The present disclosure describes a universal leadless chip carrier mounting pad layout for an interconnection medium such as a printed circuit board, which accommodates a wide range of chip carrier sizes. Thus, there is eliminated the traditional method of providing custom pad layouts homologously configured as to numbers of pads and their arrangement, in specific chip carriers. The universality of the present pad layout makes it especially desirable for prototype designs, and integrated circuit chip "burn in" and test procedures.

Abstract: Electronics circuits having a relatively high density of relatively narrow conductors therein, are fabricated by cutting a groove into the surface of an insulating layer, as by use of laser machining apparatus and the like, for each conductor. Conductive material is placed into each groove to form each of at least one conductor on each of at least one level of the circuit. A thick film dielectric material is applied, over each insulative layer having at least one conductor embedded therein, to form insulative planes between different planes of conductor. Via interconnects are formed between conductor planes by filling a hole therebetween with conductive material.

Abstract: A board to board interconnect assembly is installed between a first multilayer circuit board and a second multilayer circuit board. The assembly is comprised of a first housing member carrying electrical contacts and a second housing member carrying electrical contacts which mateably engage with the contacts of the first housing member. The first and second circuit boards have corresponding arrays of plated through apertures selectively connected to the circuit layers of the respective boards. Socket carrying contacts are frictionally engaged in certain of the plated through conductive apertures of the first and second circuit boards to secure the first housing member to the first circuit board and the second housing member to the second circuit board. Flex contacts are installed in conductive plated through apertures of the boards opposite each of the socket contacts and are frictionally engaged with the socket contacts.

Abstract: A conductive connection between a metallized outer surface of a film of plastics material, such as a polyimide film and a metal or metallized surface of a substrate to which the film is attached. The connection comprises a flexible conductor secured to the substrate and a second film of plastics material which is bonded to the metallized surface of the first film material and to the flexible conductor to effect a conductive connection between the metallized surface of the first film and the substrate. The second film may be so arranged that it holds the flexible conductor in close contact with the metallized layer on the first film to effect an electrical connection but is preferably metallized whereby an additional electrical connection is effected by way of its metallized surface and the flexible conductor.

Abstract: An electronic circuit interconnection system provides high density mounting on ceramic chip-carrier integrated circuit devices or other beam-lead, dual-in-line (DIP), tape-automated-bonded (TAB), flip-chip, or direct-mounted i.c. devices with wire-bonded interconnects or the like on an economical, dimensionally-stable, interconnection substrate which has high heat dissipating properties. The substrate has glass components which are fused onto etched metal patterns and which are proportioned relative to the metal patterns so that the heat-expansion properties of the substrate correspond to those of the i.c. devices to maintain bond integrity between the i.c. leads and circuit paths on the substrate and so that the substrate has sufficient heat-dissipating properties to permit the high density i.c. mounting.

Abstract: A three-dimensional circuit structure suited for a routing type electronic switcher matrix, for analog or digital signals, in which internal wire interconnections are not required.Plural parallel-disposed zero-insertion-force connectors are orthogonally related on opposite sides of mother-boards that divide tiers in the structure.Selected conductive pins of the connectors are electrically connected to make necessary interconnections.Printed circuit cards are inserted in the zero-insertion-force connectors for carrying a large plurality of solid-state, or equivalent, cross points, and are inter-connected by the selected conductive pins.

Abstract: A piggyback code switch which provides a unique digital code for various types of circuits, for example, garage door openers, load management control receivers, etc., is used with dual-in-line packaging diodes or resistor arrays in such a manner as to enable any combination of resistors or diodes to be pulled to a preselected voltage level and thus provide such circuits with a common starting code. A switch comprising an array of pins extending from a conductive base is placed atop a DIP network. Specific DIP resistors are shorted together by selectively removing the pins of the switch in accordance with a prearranged coding plan. This provides each circuit with a unique digital identification code.

Abstract: A programmable header constructed from an integral lamina circuit arrangement comprising a plurality of electrically conductive pins in fixed spaced relationship, at least one electrically conductive highway, an electrically conductive lowway, a plurality of electrically conductive cross-links each connecting a separate one of said pins to said lowway and a plurality of electrically conductive side-links each connecting a separate one of said pins to a said highway, wherein said highway or highways lie in a plane or planes spaced from and parallel to a plane in which lies said lowway and are superimposed on but spaced from said cross-links, and wherein said pins project normal to said planes in spaced parallel relationship, said lowway and portions of said links being free from said superimposition thereby to facilitate selective removal of desired portions of said links and lowway to break electrical continuity thereof so as to program interconnection between said pins in a desired manner.

Abstract: An apparatus for mounting a plurality of electrical circuit boards in a spaced-apart coaxial relationship while yet permitting the circuit boards to be eccentrically moved out of the coaxial relationship during manufacture and/or maintenance. A first elongated, preferably hollow, mounting member transverse to the circuit boards mounts them for pivotable movement about a transverse axis defined by the first member. A second mounting member may be employed so as to effect rigid union between the circuit boards in an engaged position and which pivots to a disengaged position to permit eccentric pivotable movement of the circuit boards about the transverse axis defined by the first mounting member.

Abstract: An enclosure and mounting member for printed circuit boards has a first housing member defining the outer front of the enclosure and may have an aperture therein for exposing a front control panel. A second housing member defines the outer rear surface of the enclosure. A front control panel and each of the printed circuit boards held within the enclosure have irregularities such as shallow recesses in opposite outer edges. At least two mounting members are provided, each having a stem portion connectable to the first housing member and a flange portion extending perpendicularly from the stem portion connectable to the second housing member. The stem portions each have spaced irregularities such as pairs of notches which are congruent with and/or otherwise mated to respectively corresponding irregularities of the front panel and each of the printed circuit boards.

Abstract: Disclosed is a substrate for an array of integrated circuit dice 10' disposed in a regular array on the monolithic wafer substrate 1. Also disposed on the wafer substrate 1 is a network 11' interconnecting various circuits 10', with other integrated circuits, disposed in the array formed on the wafer for data transfer therebetween. Terminals 12' exist in the network 11' for connection of the connections of the network with the various integrated circuits 10'. The networks are connected to a contact pad by one or more connection pads 13', for power and for data entry, and there is provided an auxiliary lead and contact pad for each network for testing each network for operability, also disclosed in the testing method.

Abstract: A method of fabricating a "hybrid" multilayer printed circuit board combining two dissimilar plastic layers of polyimide resin/glass and of epoxy resin/glass laminates. The finished hybrid multilayer printed circuit board is for, e.g., the support of and electrical interconnection to a plurality of magnetizable memory cores. The method includes sandwiching a plurality of epoxy-glass printed circuit boards having the desired copper patterns on both sides between two polyimide-glass printed circuit boards, each having the desired copper pattern on only one side. All the printed circuit boards are laminated with epoxy-glass prepreg to form a single hybrid multilayer printed circuit board consisting of the sandwiched epoxy-glass printed circuit boards and the sandwiching polyimide-glass printed circuit boards. Interconnections between patterned layers are formed by copper-plated through-holes.

Abstract: A circuit board, for an electronic timepiece, having a switching electrode formed on a narrow peripheral surface of the circuit board. The narrow peripheral surface has a pair of spaced indentations, and the switching electrode is comprised of a metallic layer disposed on the indentation surfaces and on the portion of the narrow peripheral surface between the indentations. The switching electrode is fabricated by forming a pair of spaced small holes through a circuit board base plate, and by forming a large hole having a diameter greater than a distance between the pair of small holes and positioned for intersecting the pair of small holes. A conductive layer is plated on the surfaces defining the pair of small holes and on that portion of the surface which defines the large hole that is between the pair of small holes.

Abstract: A condenser including a dielectric material exhibiting a ferroelectric phase wherein the dielectric constant-temperature characteristic of the condenser exhibits hysteresis loss of not more than 5% is provided. The dielectric constant-temperature characteristics are varied by regulating the particle diameter of the crystal and by providing an electrode material which reduces the loss. Hysteresis loss may also be reduced by including an oxide of a rare earth element or a metallic element of Group Va of the Periodic Table into a barium titanate dielectric component system.

Abstract: A visual display mounting assembly is provided wherein a substantially rectangular parallelopiped central body 18 of a display module 17 is sandwiched between a planar surface 29 of a printed circuit board 23 and a substantially planar chassis wall 15 having a rectangular opening 16 therein for a front viewing surface 19 of the display module. The chassis wall opening 16 is formed with two opposing planar edge portions 32 of the chassis wall and two opposing nonplanar edge portions 33 of the wall comprising bent portions of the wall projecting towards the module. Peripheral portions 34 of the front surface 19 of the display module are positioned in pressure contact with the planar edge portions 32, and the front surface 19 is positioned between the non-planar edge portions 33 of the chassis wall. The display module 17 is held in place by retaining twist tabs 24 fixing the circuit board to the chassis wall and thereby having the circuit board press the display module body against the chassis wall.

Abstract: A flexible printed circuit is secured with adhesive to a glass or plastics substrate. Electrical connection between the tracks of the printed circuit and co-operating tracks on the substrate is made by way of conductive fibers with which the adhesive is loaded in such a proportion that no bridging electrical contact is established between laterally adjacent tracks.

Abstract: Disclosed is a wafer substrate for integrated circuits (1) which by itself may be made either of conductive or non-conductive material. This substrate carries two planes or layers of patterned metal (19, 20), thus providing two principal levels of interconnection. An insulation layer (21) is placed between the metal layers and also between the lower metal layer and the substrate if the latter is conductive. Connections between the metal layers or between the metal layer and the substrate can be made through via holes in the insulator layer or layers, respectively.The real estate provided by the substrate (1) is divided up into special areas used for inner cells (2) outer cells (3) signal hookup areas (4) and power hookup areas (5). The cells are intended to host the integrated circuit chips (24, 25) and to provide the bonding pads (8) for the signal connections between the chips and the substrate.