Abstract: The present disclosure provides a photoelectric detection device and a photoelectric detection apparatus. The photoelectric detection device includes a substrate, a reflective structure provided on the substrate and a photoelectric conversion layer provided on the reflective structure, and has a plurality of pixel regions and a plurality of interval regions each provided between two adjacent pixel regions. The photoelectric conversion layer includes a pixel photoelectric conversion portion in the pixel region; the reflective structure includes a pixel reflective portion in the pixel region and an interval reflective portion in the interval region, and the interval reflective portion is configured to reflect light directed to the interval reflective portion from the pixel photoelectric conversion portion back to the pixel photoelectric conversion portion.

Abstract: GaN-based nanowire heterostructures have been intensively studied for applications in light emitting diodes (LEDs), lasers, solar cells and solar fuel devices. Surface charge properties play a dominant role on the device performance and have been addressed within the prior art by use of a relatively thick large bandgap AlGaN shell covering the surfaces of axial InGaN nanowire LED heterostructures has been explored and shown substantial promise in reducing surface recombination leading to improved carrier injection efficiency and output power. However, these lead to increased complexity in device design, growth and fabrication processes thereby reducing yield/performance and increasing costs for devices. Accordingly, there are taught self-organising InGaN/AlGaN core-shell quaternary nanowire heterostructures wherein the In-rich core and Al-rich shell spontaneously form during the growth process.

Abstract: A cantilever section as a substrate for a sensor includes: a base section; a movable section connected to the base section; an arm portion as a support portion extending along the movable section from the base section when viewed in a planar view as viewed from a thickness direction of the movable section; and a gap portion formed to have a predetermined gap between the movable section and the arm portion when viewed in the planar view, in which a ridge portion formed as an etching residue having a top portion on the side facing the gap portion is provided on each of facing surfaces of the movable section and the arm portion in the gap portion, and the predetermined gap is a gap between a top portion of a first ridge portion which is the ridge portion formed at one of the movable section and the arm portion, and a top portion of a second ridge portion which is the ridge portion formed at the other of the movable section and the arm portion.

Abstract: There is provided a technique that includes (a) pre-etching a surface of a substrate made of single crystal silicon by supplying a first etching gas to the substrate; (b) forming a silicon film on the substrate with the pre-etched surface, by supplying a first silicon-containing gas to the substrate; (c) etching a portion of the silicon film by supplying a second etching gas, which has a different molecular structure from a molecular structure of the first etching gas, to the substrate; and (d) forming an additional silicon film on the etched silicon film by supplying a second silicon-containing gas to the substrate.

Abstract: A photoresist film is patterned into an array of island shapes with improved critical dimension uniformity and no phase edges by using two alternating phase shifting masks (AltPSMs) and one post expose bake (PEB). The photoresist layer is exposed with a first AltPSM having a line/space (L/S) pattern where light through alternating clear regions on each side of an opaque line is 180° phase shifted. Thereafter, there is a second exposure with a second AltPSM having a L/S pattern where opaque lines are aligned orthogonal to the lengthwise dimension of opaque lines in the first exposure, and with alternating 0° and 180° clear regions. Then, a PEB and subsequent development process are used to form an array of island shapes. The double exposure method enables smaller island shapes than conventional photolithography and uses relatively simple AltPSM designs that are easier to implement in production than other optical enhancement techniques.

Abstract: There is provided a technique that includes: a reaction chamber that processes a substrate on a substrate support; a transfer chamber; a gate that opens and closes an opening and is formed in the transfer chamber; a transfer device; a clean unit supplying a clean atmosphere to the transfer chamber; an inert gas supplier supplying an inert gas to the transfer chamber; and a controller controlling the inert gas supplier such that, after the loading of the substrate from a substrate container to the substrate support by the transfer device is completed and the gate is closed, the inert gas supplier supplies the inert gas during a time period until the gate is opened again and does not supply the inert gas in another time period, and control the transfer chamber to be kept at a positive pressure by an air atmosphere.

Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber. The method also includes introducing a plasma-forming gas into the PVD chamber, and the plasma-forming gas contains an oxygen-containing gas. The method further includes applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. In addition, the method includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.

Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (FL) interfaces with a first metal oxide (Mox) layer and second metal oxide (tunnel barrier) to produce perpendicular magnetic anisotropy (PMA) in the FL. In some embodiments, conductive metal channels made of a noble metal are formed in the Mox that is MgO to reduce parasitic resistance. In a second embodiment, a discontinuous MgO layer with a plurality of islands is formed as the Mox layer and a non-magnetic hard mask layer is deposited to fill spaces between adjacent islands and form shorting pathways through the Mox. In another embodiment, end portions between the sides of a center Mox portion and the MTJ sidewall are reduced to form shorting pathways by depositing a reducing metal layer on Mox sidewalls, or performing a reduction process with forming gas, H2, or a reducing species.

Abstract: A method of fabricating a P-N junction in a semiconductor structure, e.g. silicon (Si) structure, is presented. The method may include several implantation steps performed at a single implantation angle with respect to the Si structure. In a first implantation step, a first dopant species is implanted over a first portion of the Si structure including a first edge of the Si structure. In a second implantation step, a second dopant species is implanted over a second portion of the Si structure including a second edge of the Si structure opposed to the first edge but excluding the first edge. The first portion and the second portion may overlap in a central portion of the Si structure between the first edge and the second edge, such that the second dopant species may be implanted below the first dopant species.

Abstract: A semiconductor device is provided. The semiconductor device includes a source/drain region, a silicide layer on the source/drain region, an interlayer dielectric (ILD) layer over the silicide layer, and a source drain contact. The source/drain contact has a top portion extending through the ILD layer and a bottom portion embedded in the silicide layer.

Abstract: A silicon carbide semiconductor device includes: a main cell region; a sense cell region; a MOSFET arranged in each of the main cell region and the sense cell region and disposed in a semiconductor substrate having a high impurity concentration layer and a drift layer; an element isolation layer arranged between the main cell region and the sense cell region, and surrounding the sense cell region; and a plurality of electric field relaxation layers arranged between the main cell region and the sense cell region. The MOSFET includes: a base region; a source region; a plurality of deep layers; a trench gate structure; a source electrode; and a drain electrode. The deep layers and the electric field relaxation layers are arranged in a stripe pattern at a predetermined interval.

Abstract: A laser processing apparatus includes a laser beam generating unit which emits a laser beam, a lens unit which divides the laser beam into a plurality of laser beams, and a light condensing unit which condenses the plurality of laser beams. The lens unit includes a first lens array having a first central axis and a second lens array having a second central axis, and wherein at least one of the first lens array and the second lens array reciprocates such that the first central axis and the second central axis are deviated from each other.

Abstract: The present invention provides a memory device in which lower electrodes, a buffer layer, a seed layer, a magnetic tunnel junction, a capping layer, synthetic exchange diamagnetic layers, and an upper electrode are formed on a substrate in a laminated manner. According to the present invention, the lower electrodes and the seed layer are formed of a polycrystalline conductive material, and the perpendicular magnetic anisotropy of the magnetic tunnel junction is maintained upon heat treatment at a high temperature of 400° C. or more.

Abstract: Provided are an organic light-emitting display apparatus and a method of manufacturing the same. The organic light-emitting display apparatus includes a first substrate; an organic light-emitting device provided on the first substrate and including a first electrode, a second electrode, and an intermediate layer positioned between the first electrode and the second electrode; a second substrate covering the organic light-emitting device and disposed to face the first substrate; and a sealant bonding the first substrate and the second substrate, wherein at least a portion of the sealant is a intermixing region which is formed as an inorganic material permeates an organic material.

Abstract: A protective film forming film 1 is provided in which the product of the breaking stress (MPa) measured at a measurement temperature of 0° C. and the breaking strain (unit: %) measured at a measurement temperature of 0° C. in at least one of the protective film forming film 1 and a protective film formed from the protective film forming film 1 is in a range of 1 MPa·% to 250 MPa·%. According to such a protective film forming film 1, the protective film forming film 1 or the protective film formed from the protective film forming film 1 can be suitably divided in an expanding process performed on a workpiece when the workpiece is divided to obtain a work product.

Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.

Abstract: A method of manufacturing a light emitting device includes placing a light emitting element in a first recess; covering with a first cover member the second to fourth element lateral faces of the light emitting element exposed in the first recess; extracting from the first recess the light emitting element equipped with the first cover member; placing the light emitting element in the second recess by bringing the first element lateral face of the light emitting element extracted from the first recess into contact with the second recess first inner lateral face of the second recess and spacing the substrate face of the light emitting element apart from the second recess bottom face of the second recess; covering the substrate face with a second cover member in the second recess; and extracting from the second recess the light emitting element equipped with the second cover member formed thereon.

Abstract: A manufacturing method of a semiconductor structure includes the following steps. A first trench isolation is formed in a substrate. A second trench isolation is formed in the substrate after the step of forming the first trench isolation. The second trench isolation is formed at a side of the first trench isolation, and the second trench isolation is directly connected with the first trench isolation. The semiconductor structure includes the substrate, the first trench isolation, and the second trench isolation. A material of the second trench isolation is different from a material of the first trench isolation. The first trench isolation is disposed at one side of the second trench isolation, and the second trench isolation is directly connected with the first trench isolation.

Abstract: A method of manufacturing a light emitting device includes providing an element-structure wafer that includes a first substrate and a laser element structure on the first substrate, bonding a laser element structure side of the element-structure wafer to a second substrate to obtain a bonded wafer, removing at least a portion of the first substrate to obtain a thinned bonded wafer, singulating the thinned bonded wafer to obtain a laser element with the second substrate, mounting the laser element with the second substrate on a heat dissipating member such that a laser element structure side of the laser element with the second substrate faces the heat dissipating member, and removing the second substrate from the laser element.

Abstract: A method for fabricating an electronic device is provided to include: forming a hard mask pattern over a substrate to expose a gate formation region; forming a gate trench by etching the substrate using the hard mask pattern; forming a gate insulating layer over an inner wall of the gate trench; forming a gate electrode filling a lower portion of the gate trench in which the gate insulating layer is formed; forming an insulating material covering a resultant structure in which the gate electrode is formed; forming a gate protective layer having a top surface lower than a bottom surface of the hard mask pattern; removing the hard mask pattern; recessing the substrate so that a top surface of the substrate is lower than the top surface of the gate protective layer; and forming a conductive pattern filling a space formed by the recessing of the substrate.