Abstract: An interposer-type component carrier includes a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; a cavity formed in an upper portion of the stack; an active component embedded in the cavity and having at least one terminal facing upwards; and a redistribution structure having only one electrically insulating layer structure above the component. A method of manufacturing an interposer-type component carrier is also disclosed.

Abstract: A method for manufacturing a light-emitting element comprises: forming a mask comprising a first film and a second film such that the mask covers a first active layer and a second nitride semiconductor layer, which comprises: forming the first film covering at least an upper surface of the second nitride semiconductor layer, and forming the second film covering the first film; while the first active layer and the second nitride semiconductor layer are covered with the mask, forming a third nitride semiconductor layer at an exposed portion of a first nitride semiconductor layer, wherein a temperature at which the third nitride semiconductor layer is formed is less than a melting point of the second film; and after the forming of the third nitride semiconductor layer, removing the mask, during which lift-off of the mask is performed by removing the first film, which also removes the second film.

Abstract: A method includes forming a gate cut opening by removing a sacrificial material from a portion of a dummy gate in a first dielectric over a substrate. The gate cut opening includes a lower portion in which the sacrificial material was located and an upper portion extending laterally over the first dielectric. Filling the gate cut opening with a second dielectric creates a gate cut isolation. Recessing the second dielectric creates a cap opening in the second dielectric; and filling the cap opening with a third dielectric creates a dielectric cap. The third dielectric is different than the second dielectric, e.g., oxide versus nitride, allowing forming of an interconnect in at least a portion of the third dielectric without the second, harder dielectric acting as an etch stop.

Abstract: Disclosed herein is a sensor package substrate that includes a first mounting area for mounting a sensor chip. The sensor package substrate has a through hole formed at a position overlapping the first mounting area in a plan view so as to penetrate the sensor package substrate from one surface to the other surface. The through hole includes a first section having a first diameter and a second section having a second diameter smaller than the first diameter. A step part inside the through hole positioned at a boundary between the first and second sections constitutes a second mounting area for mounting an anti-dust filter.

Abstract: An optoelectronic device with a semiconductor body that includes: a bottom cathode structure, formed by a bottom semiconductor material, and having a first type of conductivity; and a buffer region, arranged on the bottom cathode structure and formed by a buffer semiconductor material different from the bottom semiconductor material. The optoelectronic device further includes: a receiver comprising a receiver anode region, which is formed by the bottom semiconductor material, has a second type of conductivity, and extends in the bottom cathode structure; and an emitter, which is arranged on the buffer region and includes a semiconductor junction formed at least in part by a top semiconductor material, different from the bottom semiconductor material.

Abstract: A photo detection device comprising a contact layer through which light enters; an absorbing region positioned such that light admitted through the contact layer passes into the absorbing region; at least one diffractive element operatively associated with the absorbing region operating to diffract light into the absorbing region; the configuration of the at least one diffractive element being determined by computer simulation to determine an optimal diffractive element (or elements) and absorbing region configuration for optimal quantum efficiency for at least one predetermined wavelength detection range, the at least one diffractive element operating to diffract light entering through the contact layer such that phases of diffracted waves from locations within the photo detection device or waves reflected by sidewalls and waves reflected by the at least one diffractive element form a constructive interference pattern inside the absorbing region.

Abstract: The present application relates to an encapsulating composition, a method for preparing the same and an organic electronic device comprising the same, and provides an encapsulating composition which can effectively block moisture or oxygen introduced into an organic electronic device from the outside to secure the lifetime of the organic electronic device, is possible to realize a top emission type organic electronic device, is applicable to an inkjet method, can provide a thin display and can control moisture content to prevent damage to the element.

Abstract: The invention relates to a method for electrically contacting a component (10) (for example a power component and/or a (semiconductor) component having at least one transistor, preferably an IGBT (insulated-gate bipolar transistor)) having at least one contact (40, 50), at least one open-pored contact piece (60, 70) is galvanically (electrochemically or free of external current) connected to at least one contact (40, 50). In this way, a component module is achieved. The contact (40, 50) is preferably a flat part or has a contact surface, the largest planar extent thereof being greater than an extension of the contact (40, 50) perpendicular to said contact surface. The temperature of the galvanic connection is at most 100° C., preferably at most 60° C., advantageously at most 20° C. and ideally at most 5° C. and/or deviates from the operating temperature of the component by at most 50° C., preferably by at most 20° C., in particular by at most 10° C. and ideally by at most 5° C., preferably by at most 2° C.

Abstract: A memory device includes a first electrode, a resistive switching layer, a cap layer, a protective layer, and a second electrode. The resistive switching layer is disposed over the first electrode. The cap layer is disposed over the resistive switching layer, wherein the bottom surface of the cap layer is smaller than the top surface of the resistive switching layer. The protective layer is disposed over the resistive switching layer and surrounds the cap layer. At least a portion of the second electrode is disposed over the cap layer and covers the protective layer.

Abstract: The present invention generally relates to doped, metal oxide-based sensors, wherein the doped-metal oxide is a monolayer, and platforms and integrated chemical sensors incorporating the same, methods of making the same, and methods of using the same.

Abstract: A transferring method of transferring a plurality of optical device layers includes a transfer member bonding step, a buffer layer breaking step, a first optical device layer transferring step, an adhesive removing step, and a second optical device layer transferring step. In the transfer member bonding step, an optical device wafer and a transfer member are bonded to each other through an adhesive, and each spacing between adjacent ones of the optical device layers of the optical device wafer which each have been divided in a chip size is filled with the adhesive. In the adhesive removing step, at least part of the adhesive with which each spacing between the adjacent ones of the optical device layers has been filled is removed such that the optical device layers which have been embedded in an adhesive layer in the transfer member bonding step project from the adhesive layer.

Abstract: An LED unit comprises a substrate and a first LED chip. The first LED chip may include a first light-emitting surface arranged on the substrate in such a way that light emitted from the first LED chip radiates in a direction of radiation of the LED unit. The LED unit includes a second LED chip comprising a second light-emitting surface and arranged above the first LED chip in such a way that the second LED chip at least partially covers the first LED chip and radiates light emitted from the second LED chip in the direction of radiation of the LED unit. The LED unit comprises a first conversion layer at least partially covering the first light-emitting surface and/or at least partially laterally surrounding the first LED chip. A second conversion layer at least partially covers the second LED chip.

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.

Abstract: A method of manufacturing a semiconductor substrate structure for use in a semiconductor substrate stack system is presented. The method includes a semiconductor substrate which includes a front-face, a backside, a bulk layer, an interconnect layer that includes a plurality of inter-metal dielectric layers sandwiched between conductive layers, a contact layer that is between the bulk layer and the interconnect layer, and a TSV structure commencing between the bulk layer and the contact layer and terminating at the backside of the substrate. The TSV structure is electrically coupled to the interconnect layer and the TSV structure is electrically coupled to a bonding pad on the backside.

Abstract: A semiconductor device includes a substrate, a main circuit disposed over a front surface of the substrate, and a backside power delivery circuit disposed over a back surface of the substrate. The backside power delivery circuit includes a first main power supply wiring for supplying a first voltage, a second main power supply wiring for supplying a second voltage, a first local power supply wiring, and a first switch coupled to the first main power supply wiring and the first local power supply wiring. The first main power supply wiring, the second main power supply wiring and the first local power supply wiring are embedded in a first back side insulating layer disposed over the back surface of the substrate. The first local power supply wiring is coupled to the main circuit via a first through-silicon via (TSV) passing through the substrate for supplying the first voltage.

Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

Abstract: A system and method of authenticating a replaceable product reservoir for use in a product dispenser includes incorporating a data storage device into the replaceable product reservoir where the dispenser control reads data from the storage device to verify that the correct replaceable product reservoir has been installed in the product dispenser.

Abstract: An organic light emitting display device includes a base substrate, pixels disposed on the base board, panel terminals disposed on the base board to be electrically connected to the pixels, and an encapsulation structure coupled to the base board to cover the pixels. The encapsulation structure includes a base part, a metal encapsulation film, first terminals, and second terminals. The metal encapsulation film is disposed in an encapsulation area of the base part, the first terminals are disposed on a first surface of the base part corresponding to a connection area of the base part, and the first terminals are electrically connected to the panel terminals. The second terminals are disposed on a second surface of the base part corresponding to the connection area, and the second terminals are electrically connected to the first terminals.

Abstract: A photodetector array of a stacked film comprises, a plurality of first electrodes formed on a substrate and extending in parallel in a first direction, a plurality of second electrodes extending in parallel in a second direction crossing the first electrodes, a first organic thin film diode and a second organic thin film diode disposed between each of the first electrodes and each of the second electrodes, and an intermediate connection electrode layer serving as a common anode or a common cathode. The intermediate connection electrode layer connects the first organic thin film diode and the second organic thin film diode by backward-diode connection. At least either the first electrodes or the second electrodes are transparent with light passing therethrough, the first organic thin film diode is a photoresponsive organic diode, and the second organic thin film diode is an organic rectifier diode.

Abstract: A device includes a first element having rectification characteristics that allow electric current to flow from an upper electrode to a lower electrode, an n-channel thin film transistor, and a control electrode. The n-channel thin film transistor includes a semiconductor film, a gate electrode, a first signal electrode, and a second signal electrode. The control electrode faces the gate electrode with the semiconductor film interposed therebetween. The second signal electrode is connected with the lower electrode. The control electrode is connected with the lower electrode. At least a part of a first channel end on the first signal electrode side of the semiconductor film is located within a region of the control electrode, when viewed planarly. A second channel end on the second signal electrode side of the semiconductor film is distant from the control electrode, when viewed planarly.