Patents Examined by Robert Pascal
  • Patent number: 9601816
    Abstract: A dielectric line includes a line portion and a surrounding dielectric portion. The line portion is formed of a first dielectric having a first relative permittivity. The surrounding dielectric portion is formed of a second dielectric having a second relative permittivity. The line portion propagates one or more electromagnetic waves of one or more frequencies within the range of 1 to 10 GHz. In a cross section orthogonal to the direction of propagation of the one or more electromagnetic waves through the line portion, the surrounding dielectric portion is present around the line portion. The first relative permittivity is 1,000 or higher. The second relative permittivity is lower than the first relative permittivity.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: March 21, 2017
    Assignee: TDK CORPORATION
    Inventors: Shigemitsu Tomaki, Tomoaki Kawata, Kiyoshi Hatanaka, Toshio Sakurai, Yasunori Sakisaka
  • Patent number: 9603293
    Abstract: As a noise-reducing shielded cable according to the present invention, provided is a shielded cable having an inverter (10), a motor (30), a cable (20) connecting the inverter and the motor with each other, a shield layer (40) covering the cable, and two ground wires (50) grounding both ends of the shield layer.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: March 21, 2017
    Assignee: YAZAKI CORPORATION
    Inventor: Daisuke Yagi
  • Patent number: 9601821
    Abstract: The present invention relates to a load cell topology network comprising at least one multi-branch cable and a plurality of load cells. Each multi-branch cable comprises at least three connectors and one or more groups of signal lines; each group of signal lines comprise at least three branch signal lines, with one end of each branch signal line connected to at least three connectors described respectively and correspondingly, and the other end of each branch signal line connected to a common node, thereby realizing the interconnection of the same kinds of electrical signals between respective connectors; each connector is adapted to be connected to another multi-branch cable or a load cell. The plurality of load cells are electrically connected by the multi-branch cable to form a topology network.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: March 21, 2017
    Assignees: Mettler Toledo (Changzhou) Measurement Technology Ltd., Mettler Toledo (Changzhou) Precision Instrument Ltd., Mettler Toledo (Changzhou) Scale & System Ltd.
    Inventors: Ying Zhang, Zijian Zhu, Xiuzhu Xu
  • Patent number: 9595939
    Abstract: A reactance filter includes a series branch that connects a signal input to a signal output. At least one parallel branch branches off from the series branch with respect to ground. A parallel resonator is arranged in each parallel branch. Two or more series resonators are connected in series in the series branch. A capacitor is connected in parallel with one of the series resonators in the series branch.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: March 14, 2017
    Assignee: EPCOS AG
    Inventors: Andreas Link, Stephan Marksteiner
  • Patent number: 9595936
    Abstract: A reconfigurable bandstop filter and methods of designing and reconfiguring the bandstop filter are disclosed. The reconfigurable bandstop filter includes a plurality of transmission lines each including a phase shifter. The reconfigurable bandstop filter further includes a signal input port having a phase shifter and a signal output port having a phase shifter. The signal input port and the signal output port is coupled to the plurality of transmission lines.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 14, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Hanyi Ding, Alberto Valdes Garcia, Wayne H. Woods, Jr.
  • Patent number: 9595935
    Abstract: A method and apparatus are disclosed for filtering a signal, such as a transmit communication signal with a configurable notch filter. The configurable notch filter may attenuate a set of frequencies near a selected notch frequency. In some embodiments, the configurable notch filter may include a variable resistor, a variable capacitor, a first inductor, and a second inductor. The variable resistor may be configured to compensate for resistive losses within the configurable notch filter. The variable capacitor may be configured to determine the set of frequencies to be attenuated.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: March 14, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Amirpouya Kavousian, Yashar Rajavi, Alireza Khalili, Mohammad Bagher Vahid Far
  • Patent number: 9590286
    Abstract: A printed diplexer is printed on a PCB, having at least two input terminals respectively connected to at least two end portions thereof, having the output terminal connected at a center portion thereof, and configured to output a signal inputted from the at least two input terminals to the output terminal.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: March 7, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Young Hun Park
  • Patent number: 9570222
    Abstract: An inductor component includes a plurality of conductive elements, each formed as an individual patch of conductive material, with the conductive elements arranged in a vertical stack and tightly coupled to one another. Dielectric is disposed between more adjacent conductive elements, the dielectric has a permittivity and is sufficiently thin so as to provide a mutual inductance factor of at least one-half or greater between adjacent ones of the conductive elements. The dielectric is typically thinner than the adjacent conductors.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: February 14, 2017
    Assignee: TDK Corporation
    Inventors: Dev V. Gupta, Mehdi Si Moussa
  • Patent number: 9571062
    Abstract: A module includes: a duplexer including an antenna terminal; a first wiring connecting the antenna terminal to an antenna; a second wiring coupled to the antenna terminal without the first wiring; and an inductor coupled to the second wiring.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: February 14, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Hiroshi Hara
  • Patent number: 9571065
    Abstract: A described surface acoustic wave device includes a piezoelectric substrate and a configurable electrode assembly. The assembly includes: an array of N rows of M electrically isolated elongated electrode sub-elements arranged end-to-end in columns; a first signal bus proximate to the first row of the N rows; a first matrix of row addressable switches configured to electrically couple the first signal bus with a respective electrode sub-element of the first row of electrode sub-elements; a second signal bus proximate to the Nth row of the N rows; a second matrix of addressable row switches configured to electrically couple the second signal bus with a respective electrode sub-element of the Nth row of electrode sub-elements; and a plurality of addressable column switches, each addressable column switch respectively configured to electrically couple an electrode of a column of the M columns with an end-to-end adjacent electrode of the same column.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: February 14, 2017
    Inventor: Jordin T. Kare
  • Patent number: 9571063
    Abstract: An acoustic resonator device includes a bottom electrode disposed on a substrate over an acoustic reflecting feature, a piezoelectric layer disposed on the bottom electrode and a top electrode disposed on the piezoelectric layer, where an overlap between the top electrode, the piezoelectric layer and the bottom electrode over the acoustic reflecting feature define an active region of the acoustic resonator device. The acoustic resonator device further includes at least one of a wing having an outer edge extending beyond at least a portion of an outer edge of the top electrode, and a first frame formed in one of an outer region or a center region of the top electrode. The at least one of the wing and the first frame has an apodized shape, such that no edges are parallel to one another, the apodized shape of the at least one of the wing and the first frame being different from an electrode shape defined by an outer edge of the top electrode.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: February 14, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Dariusz Burak, John Choy, Chris Feng
  • Patent number: 9571059
    Abstract: A parallel via design is disclosed to improve the impedance match for embedded common mode choke filter designs. Particularly suited to such designs on four-layer printed circuit boards, the parallel via design effectively suppresses the reflection of the differential pair. By connecting the vias in parallel, the inductance of the entire via structure is reduced while its capacitance is simultaneously increased. By properly choosing the number of parallel vias and the spacing between them, the impedance of the parallel vias can be well controlled within the frequency range of interest. Consequently, the impedance match can be improved and the return loss of a four-layer printed circuit board common mode choke filter design is reduced.
    Type: Grant
    Filed: March 28, 2015
    Date of Patent: February 14, 2017
    Assignee: INTEL CORPORATION
    Inventors: Jianfang Olena Zhu, Chung-Hao Joseph Chen, Ana M. Yepes
  • Patent number: 9564870
    Abstract: A second conductor plane (102) is formed in a layer different from a layer in which a first conductor plane (101) is formed, and faces the first conductor plane (101). A first transmission line (104) is formed in a layer different from the layers in which the first conductor plane (101) and the second conductor plane (102) are formed, and faces the second conductor plane (102), and one end thereof is an open end. A conductor via (106) connects the other end of the first transmission line (104) and the first conductor plane (101). An insular conductor (112) is connected to a portion of the first transmission line (104) other than a portion thereof at which the transmission line (104) is attached to the conductor via (106), is located in a layer different from the layer in which the second conductor plane (102) is located, and faces the second conductor plane (102).
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: February 7, 2017
    Assignee: NEC CORPORATION
    Inventors: Yoshiaki Kasahara, Hiroshi Toyao
  • Patent number: 9564872
    Abstract: A splitter circuit includes a first branch circuit and a second branch circuit. Each branch circuit includes a capacitor, an inductor and a resistor. A first end of the capacitor is configured to receive RF signals. A first end of the inductor is coupled to a second end of the capacitor. The second end of the inductor is coupled to ground. The resistor is coupled to the second end of the capacitor to output RF signals. The resistor in the first branch circuit and the resistor of the second branch circuit respectively output RF signals to different devices.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: February 7, 2017
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chao-Ho Lin
  • Patent number: 9559402
    Abstract: The combiner includes a printed board, first and second conductor plates, and first and second conductor parts. The printed board includes a hole passing from a first surface to a second surface opposite to the first surface. The first conductor plate is made of a copper plate and mounted on the first surface of the printed board to close the hole. The second conductor plate is made of a copper plate and mounted on the second surface of the printed board to close the hole. The first conductor part is opposed to the first conductor plate with a predetermined space between the first conductor part and the first conductor plate. The second conductor part is opposed to the second conductor plate with a predetermined space between the second conductor part and the second conductor plate.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: January 31, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunya Otsuki, Hiromu Itagaki
  • Patent number: 9537463
    Abstract: A choke for an EMI filter is provided. The EMI filter includes a first filtering circuit and a second filtering circuit. The choke includes a magnetic core assembly and four winding coils. The magnetic core assembly includes a first magnetic core and a second magnetic core. The first winding coil and the second winding coil are directly wound around the first magnetic core. The third winding coil and the fourth winding coil are directly wound around the second magnetic core. The first winding coil is serially connected with a first positive path of the first filtering circuit. The second winding coil is serially connected with a second positive path of the second filtering circuit. The third winding coil is serially connected with a first negative path of the first filtering circuit. The fourth winding coil is serially connected with a second negative path of the second filtering circuit.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: January 3, 2017
    Assignee: DET INTERNATIONAL HOLDING LIMITED
    Inventors: Adisak Peapoot, Chana Duangpitak, Chin Huat Lim
  • Patent number: 9525198
    Abstract: A cavity filter includes a first layer circuit board, a second layer circuit board and a middle layer circuit board locates between the first layer circuit board and the second layer circuit board. A plurality of resonators locates on the first layer circuit board. A plurality of resonating cavities is located on the second layer circuit board one-to-one corresponding to the resonators. A slot is defined on the middle layer circuit board. The resonators traverse through the slot and are placed in the resonating cavities to form a plurality of resonating units, and the plurality of resonating couple with the slot of the middle layer circuit board.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: December 20, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Mu-Jung Chiu, Jane-Yi Pieh, Ruei-Yun Hung
  • Patent number: 9520858
    Abstract: A communication device is provided with a band elimination filter that has one end connected to an antenna terminal, and a first multiplexer that is connected to the other end of the band elimination filter. The band elimination filter is configured to eliminate signals of a frequency band that is different from the frequencies of signals transmitted and received in the first multiplexer, and is configured from a filter circuit that includes a bulk wave element.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: December 13, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takashi Miyake, Koji Nosaka, Ryo Nakagawa, Haruki Kyouya
  • Patent number: 9520634
    Abstract: A resonance device is disclosed. The resonance device in accordance with an embodiment of the present invention includes: a case including a first ground surface and a second ground surface which face each other; a stacked part formed inside the case by stacking a first conductive layer and a second conductive layer, wherein the first conductive layer is grounded to the first ground surface and the second conductive layer is separated from the first conductive layer without being grounded to the first ground surface; and a transmission layer connecting the second conductive layer to the second ground surface.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: December 13, 2016
    Assignee: Innertron, Inc.
    Inventors: Hak-Rae Cho, Soo-Duk Seo, Jeong-Pyo Kim
  • Patent number: 9520852
    Abstract: A multilayer chip electronic component may include: a ceramic body including a plurality of dielectric layers; an inductor part disposed within the ceramic body; a capacitor part disposed within the ceramic body; a first dummy electrode disposed within the ceramic body and a second dummy electrode disposed within the ceramic body; and first to sixth external electrodes disposed on first and second main surfaces of the ceramic body, a first connection terminal disposed on the second main surface and first end surface of the ceramic body, and a second connection terminal disposed on the second main surface and second end surface of the ceramic body. The inductor part may include first and second inductor parts, and the inductor part and the capacitor part are connected to each other.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: December 13, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Cheol Park, Sang Soo Park