Abstract: Provided are an etching composition and a method for manufacturing a semiconductor device using the same. According to embodiments, the etching composition may comprise from about 15 wt % to about 75 wt % of peracetic acid; a fluorine compound; an amine compound; and an organic solvent.

Abstract: Provided are an etching composition and an etching method using the same, and more particularly, an etching composition for selectively etching a metal nitride film, an etching method of the metal nitride film using the same, and a method of manufacturing a microelectronic device including a process performed using the same.

Abstract: A method for improving the properties of resistance to laser flux of an optical component, comprising a step consisting in bringing the component into contact with an aqueous solution comprising at least one hydroxide of an alkaline metal or an alkaline earth metal in a quantity of between 5 and 30 mass % and having a temperature T of between 50 and 100° C.

Abstract: In an embodiment, in the method for processing a workpiece including an etching target layer containing silicon oxide, a mask provided on the etching target layer, and an opening provided in the mask and exposing the etching target layer, according to the embodiment, the etching target layer is etched by removing the etching target layer for each atomic layer through repetitive execution of a sequence of generating plasma of a first processing gas containing nitrogen, forming a mixed layer containing ions included in the plasma on an atomic layer on an exposed surface of the etching target layer, generating plasma of a second processing gas containing fluorine, and removing the mixed layer by radicals included in the plasma. The plasma of the second processing gas contains the radicals that remove the mixed layer containing silicon nitride.

Abstract: Methods are provided herein for patterning extreme ultraviolet (EUV) (or lower wavelength) photoresists, such metal-oxide photoresists. A patterning layer comprising a metal-oxide photoresist is formed on one or more underlying layers provided on a substrate, and portions of the patterning layer not covered by a mask overlying the patterning layer are exposed to EUV or lower wavelengths light. A cyclic dry process is subsequently performed to remove portions of the patterning layer exposed to the EUV or lower wavelength light (i.e., the exposed portions) and develop the metal-oxide photoresist pattern. The cyclic dry process generally includes a plurality of deposition and etch steps, wherein the deposition step selectively deposits a protective layer onto unexposed portions of the patterning layer by exposing the substrate to a first plasma, and the etch step selectively etches the exposed portions of the patterning layer by exposing the substrate to a second plasma.

Abstract: Chemical mechanical planarization (CMP) polishing compositions, methods and systems are provided to reduce oxide trench dishing and improve over-polishing window stability. High and tunable silicon oxide removal rates, low silicon nitride removal rates, and tunable SiO2: SiN selectivity are also provided. The compositions use unique chemical additives, such as maltitol, lactitol, maltotritol, ribitol, D-sorbitol, mannitol, dulcitol, iditol, D-(?)-Fructose, sorbitan, sucrose, ribose, Inositol, glucose, D-arabinose, L-arabinose, D-mannose, L-mannose, meso-erythritol, beta-lactose, arabinose, or combinations thereof as oxide trench dishing reducing additives.

Abstract: A disclosed method of processing a substrate includes (a) providing a substrate in a chamber of a plasma processing apparatus. The substrate has a patterned organic mask. The method further includes (b) generating plasma from a processing gas in the chamber in a state where the substrate is accommodated in the chamber. The method further includes (c) periodically applying a pulsed negative direct-current voltage to an upper electrode of the plasma processing apparatus, during execution of the generating plasma (that is, the above (b)). In the applying a pulsed negative direct-current voltage, ions from the plasma are supplied to the upper electrode, so that a silicon-containing material which is released from the upper electrode is deposited on the substrate.

Abstract: A method for producing a technical mask includes: providing a technical mask including at least one plate-shaped substrate, the plate-shaped substrate being transparent to at least one laser wavelength; and producing at least one opening in the mask by laser-induced deep etching. In an embodiment, an etching attack takes place at least temporarily on one side during laser-induced deep etching.

Abstract: Chemical mechanical planarization (CMP) polishing compositions, methods and systems are provided to reduce oxide trench dishing and improve over-polishing window stability. High and tunable silicon oxide removal rates, low silicon nitride removal rates, and tunable SiO2: SiN selectivity are also provided. The compositions use a unique combination of abrasives such as ceria coated silica particles and chemical additives such as maltitol, lactitol, maltotritol or combinations as oxide trench dishing reducing additives.

Abstract: An etching composition contains phosphoric acid, phosphoric anhydride, a compound represented by the following Formula 1, and a silane compound comprising at least one silicon (Si) atom, excluding the compound represented by Formula 1: wherein, in Formula 1, A is an n-valent radical, where n is an integer of 1 to 6, L is a direct bond or hydrocarbylene, Y is selected from NR1, O, PR2 and S, where R1 to R2 are independently hydrogen, halogen, a substituted or unsubstituted hydrocarbyl group, or non-hydrocarbyl group, X and Z are independently selected from N, O, P and S, and Ra to Rc are independently an unshared electron pair, hydrogen, or a substituted or unsubstituted hydrocarbyl group.

Abstract: Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The halogen-containing precursor may be characterized by a gas density greater than or about 5 g/L. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of an aluminum-containing material. The contacting may produce an aluminum halide material. The methods may include flowing an etchant precursor into the substrate processing region. The methods may include contacting the aluminum halide material with the etchant precursor. The methods may include removing the aluminum halide material.

Abstract: A method for processing a transparent workpiece includes directing a pulsed laser beam into the transparent workpiece such that a portion of the pulsed laser beam directed into the transparent workpiece generates an induced absorption within the transparent workpiece, thereby forming a damage line within the transparent workpiece, and the portion of the pulsed laser beam directed into the transparent workpiece includes a wavelength ?, a spot size w0, and a Rayleigh range ZR that is greater than F D ? ? ? w 0 2 ? , where FD is a dimensionless divergence factor comprising a value of 10 or greater. Further, the method for processing the transparent workpiece includes etching the transparent workpiece with an etching vapor to remove at least a portion of the transparent workpiece along the damage line, thereby forming an aperture extending through the at least a portion of the thickness of the transparent workpiece.

Abstract: There is provided a wafer processing method for reducing a thickness of a wafer. The wafer has a front side and a back side opposite to the front side. The wafer has a device area where a plurality of devices are formed on the front side and a peripheral marginal area including a curved peripheral edge. A protective layer for covering the plural devices are formed on the front side in the device area. The wafer processing method includes a plasma etching step of supplying an etching gas in a plasma condition to the front side of the wafer by using the protective layer as a mask, thereby removing the peripheral marginal area including the curved peripheral edge, a protective member attaching step of attaching a protective member to the front side of the wafer, and a grinding step of grinding the back side of the wafer.

Abstract: Processing methods may be performed to form semiconductor structures that may include three-dimensional memory structures. The methods may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a processing chamber. The methods may include contacting a semiconductor substrate with effluents of the plasma. The semiconductor substrate may be housed in a processing region of the processing chamber. The methods may include selectively cleaning exposed nitride materials with the effluents of the plasma. The methods may also include subsequently depositing a cap material over the cleaned nitride material. The cap material may be selectively deposited on the nitride material relative to exposed regions of a dielectric material.

Abstract: This mask blank has a structure wherein a phase shift film and a light shielding film are sequentially formed as layers in this order on a transparent substrate. The optical density of the layered structure composed of the phase shift film and the light shielding film with respect to exposure light, which is an ArF excimer laser, is 3.5 or more; and the light shielding film has a structure wherein a lower layer and an upper layer are formed as layers sequentially from the transparent substrate side. The lower layer is formed from a material wherein the total content of chromium, oxygen, nitrogen and carbon is 90 atomic % or more; and the upper layer is formed from a material wherein the total content of metals and silicon is 80 atomic % or more. The extinction coefficient kU of the upper layer for the exposure light is higher than the extinction coefficient kL of the lower layer for the exposure light.

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate includes applying at least one of low frequency RF power or DC power to an upper electrode formed from a high secondary electron emission coefficient material disposed adjacent to a process volume; generating a plasma comprising ions in the process volume; bombarding the upper electrode with the ions to cause the upper electrode to emit electrons and form an electron beam; and applying a bias power comprising at least one of low frequency RF power or high frequency RF power to a lower electrode disposed in the process volume to accelerate electrons of the electron beam toward the lower electrode.

Abstract: The present disclosure relates to a method of performing a semiconductor fabrication process. The method may be performed by forming a spacer material over an underlying layer. The spacer material has sidewalls defining a first trench. A cut material is formed over the spacer material and within the first trench. The cut material separates the trench into a pair of trench segments having ends separated by the cut material. The underlying layer is patterned according to the spacer material and the cut material.

Abstract: A method for opening an amorphous carbon layer mask below a hardmask is provided. The opening an amorphous carbon layer mask comprises performing one or more cycles, where each cycle comprises an amorphous carbon layer mask opening phase and a cleaning phase. The amorphous carbon layer mask opening phase comprises flowing an opening gas into a plasma processing chamber, wherein the opening gas comprises an oxygen containing component, creating a plasma from the opening gas, which etches features in the amorphous carbon layer mask, and stopping the flow of the opening gas. The cleaning phase comprises flowing a cleaning gas into the plasma processing chamber, wherein the cleaning gas comprises a hydrogen containing component, a carbon containing component, and a halogen containing component, creating a plasma from the cleaning gas; and stopping the flow of the cleaning gas into the plasma processing chamber.

Abstract: Polishing compositions that can selectively and preferentially polish certain dielectric films over other dielectric films are provided herein. These polishing compositions include either cationic or anionic abrasives based on the target dielectric film to be removed and preserved. The polishing compositions utilize a novel electrostatic charge based design, where based on the charge of the abrasives and their electrostatic interaction (forces of attraction or repulsion) with the charge on the dielectric film, various material removal rates and polishing selectivities can be achieved.

Abstract: At least one embodiment relates to a method fabricating a solid-state battery cell. The method includes forming a plurality of spaced electrically conductive structures on a substrate. Forming the plurality of spaced electrically conductive structures on the substrate includes transforming at least part of a valve metal layer into a template that includes a plurality of spaced channels aligned longitudinally along a first direction. Transforming at least part of the valve metal layer into the template includes a first anodization step, a second anodization step, an etching step in an etching solution, and a deposition step. The method also includes forming a first layer of active electrode material on the plurality of spaced electrically conductive structures, depositing an electrolyte layer over the first layer of active electrode material, and forming a second layer of active electrode material over the electrolyte later.