Abstract: Methods and apparatus for producing high aspect ratio features in a substrate using reactive ion etching (RIE). In some embodiments, a method comprises flowing a gas mixture of C3H2F4 and a companion gas into a process chamber, forming a plasma from the gas mixture using an RF power source connected to an upper electrode above the substrate and at least one RF bias power source connected to a lower electrode under the substrate, performing an anisotropic etch, via the plasma, of at least one layer of oxide or nitride on the substrate using a pattern mask, reducing power of the at least one RF bias power source to produce deposition of a passivation layer on the at least one layer of oxide or nitride on the substrate, and evacuating the process chamber while interrupting the RF power source to stop plasma formation.

Abstract: The present invention relates to a method for selective etching of a nanostructure (10). The method comprising: providing the nanostructure (10) having a main surface (12) delimited by, in relation to the main surface (12), inclined surfaces (14); and subjecting the nanostructure (10) for a dry etching, wherein the dry etching comprises: subjecting the nanostructure (10) for a low energy particle beam (20) having a direction perpendicular to the main surface (12); whereby a recess (16) in the nanostructure (10) is formed, the recess (16) having its opening at the main surface (12) of the nanostructure (10).

Abstract: Provided are a polysiloxane-based compound, a selective etching composition with respect to a silicon nitride layer including the polysiloxane-based compound, and a method of manufacturing a semiconductor device including the etching composition. The silicon nitride layer etching composition including the polysiloxane-based compound may selectively etch the silicon nitride layer relative to a silicon oxide layer, and have a significantly excellent etch selectivity ratio, and a small change in etch rate and a small change in etch selectivity ratio with respect to the silicon nitride layer even when time for using the composition increases or the composition is repeatedly used.

Abstract: Provided are Chemical Mechanical Planarization (CMP) formulations that offer high and tunable Cu removal rates and low copper dishing for the broad or advanced node copper or Through Silica Via (TSV). The CMP compositions provide high selectivity of Cu film vs. other barrier layers, such as Ta, TaN, Ti, and TiN, and dielectric films, such as TEOS, low-k, and ultra low-k films. The CMP polishing formulations comprise water; abrasive; single chelator, dual chelators or tris chelators; morpholino family compounds as Cu dishing reducing agents. Additionally, organic quaternary ammonium salt, corrosion inhibitor, oxidizer, pH adjustor and biocide can be used in the formulations.

Abstract: The invention provides a chemical-mechanical polishing composition comprising an abrasive, a self-stopping agent, an aqueous carrier, and a cationic polymer. This invention additionally provides a method suitable for polishing a dielectric substrate.

Abstract: An electrolytic cell and a method of electrochemical oxidation of manganese(II) ions to manganese(III) ions in the electrolytic cell are described. The electrolytic cell comprises (1) an electrolyte solution of manganese(II) ions in a solution of at least one acid; (2) a cathode immersed in the electrolyte solution; and (3) an anode immersed in the electrolyte solution and spaced apart from the cathode. Various anode materials are described including vitreous carbon, reticulated vitreous carbon, woven carbon fibers, lead and lead alloy. Once the electrolyte is oxidized to form a metastable complex of manganese(III) ions, a platable plastic may be contacted with the metastable complex to etch the platable plastic. In addition, a pretreatment step may also be performed on the platable plastic prior to contacting the platable plastic with the metastable complex to condition the plastic surface.

Abstract: Described herein is an etching solution comprising water; oxidizer; water-miscible organic solvent; fluoride ion source; and optionally, surfactant. Such compositions are useful for the selective removal of silicon-germanium over poly silicon from a microelectronic device having such material(s) thereon during its manufacture.

Abstract: A substrate processing method includes the steps of: rotating a substrate horizontally around a vertical rotational axis, placing a facing member facing the substrate from above such that an inner peripheral surface of an extension portion of the facing member faces the substrate radially from the outside, rotating the facing member around the rotational axis, supplying a processing liquid to an upper surface of the substrate being in a rotated state, and placing a guard that surrounds the substrate further radially outside from the extension portion in plan view at a height position, at which processing liquid scattered from the upper surface of the substrate toward the outside in the radial direction is received by the guard, in accordance with affinity of the processing liquid for the inner peripheral surface of the extension portion.

Abstract: The present invention relates generally to methods of fabricating surface topography based on a scanned surface topography. The method converts 3D scanned surface topography data that have submicron resolution to digital formats that can be stored, manipulated, or tiled, and used as an input for replicating the surface topography with submicron resolution on another substrate. The digitized surface topography data is then converted to input for 1) 3D printing to replicate the scanned surface topography with submicron resolution, with or without a subsequent coating layer or layers to impart additional properties and/or features, 2) 3D printing a master that replicates the scanned surface topography with submicron resolution, which will be used for fast replica molding of the surface topography onto another substrate, and 3) creating a photomask with submicron resolution for transferring the surface topography to a metal substrate surface through subsequent photolithography and etching processes.

Abstract: Described herein is an etching solution comprising water; phosphoric acid solution (aqueous); a fluoride ion source; and a water-miscible organic solvent. Such compositions are useful for the selective removal of tantalum nitride over titanium nitride from a microelectronic device having such material(s) thereon during its manufacture.

Abstract: The present disclosure relates to integrated circuit device manufacturing processes. A self-aligned double patterning method is provided. In the method, a lithography process for line cut that determines the locations of line termini is performed after forming a spacer layer alongside the mandrel and prior to stripping the mandrel. The lithographic mask for the line cut is aligned to the mandrel and the spacer layer using a mark made of the mandrel material and the spacer material. Compared to the previous approach where the line cut process is performed after the mandrel removal, in the disclosed approach, the line termini mask is made of the mandrel material and the spacer material, and is more distinguishable compared to a mark made of just the spacer material. Thereby, the methods provide robust photo alignment signal for the line cut photolithography and precise positioning of the line termini mask.

Abstract: A manufacturing method of a semiconductor device includes: forming a second conductive type layer over a first conductive type layer; and forming a trench by etching the second conductivity type layer by a plasma etching process to expose the first conductivity type layer. The etching of the second conductivity type layer includes: performing a spectroscopic analysis of light emission of plasma; detecting an interface between the first conductivity type layer and the second conductivity type layer based on a change in emission intensity; and stopping the etching of the second conductivity type layer when an end point is determined based on a detection result of the interface.

Abstract: A method and a system for etching of semiconductor substrates, and particularly, wet etching of wafers. The etch rate of liquid solutions applied on the wafer is adjusted by irradiating the liquid solutions with spatially varied light intensity. Photo-reactive agents are added to the liquid solutions, the agents including photo acids, photo bases and photo-oxidizers. Illumination of the photo-reactive agents causes increase/decrease of the pH value and oxidation potential value of the liquid solutions.

Abstract: Processing methods may be performed to produce three-dimensional interconnects on a substrate. The methods may include forming a first metal interconnect layer over a semiconductor substrate. The methods may include forming a first dielectric layer over the first metal interconnect layer. The methods may include forming a second metal interconnect layer over the first dielectric layer. The methods may include forming a patterning mask overlying the second metal interconnect layer. The methods may also include simultaneously etching each of the first metal interconnect layer, the first dielectric layer, and the second metal interconnect layer to expose the substrate to produce a multilayer interconnect structure in a first lateral direction.

Abstract: Patterning electronic devices using reactive-ion etching of tin oxides is provided. Reactive-ion etching facilitates patterning of tin oxides, such as barium stannate (BaSnO3), at a consistent and controllable etch rate. The reactive-ion etching approach described herein facilitates photolithographic patterning of tin oxide-based semiconductors to produce electronic devices, such as thin-film transistors (TFTs). This approach further patterns a tin oxide-based semiconductor without adversely affecting its electrical properties (e.g., resistivity, electron or hole mobility), as well as maintaining surface roughness. This approach can be used to produce optically transparent devices with high drain current (ID, drain-to-source current per channel width) and high on-off ratio.

Abstract: An etching method according to an embodiment includes forming an uneven structure including a projection on a surface of a semiconductor substrate; forming a catalyst layer including a noble metal on the surface selectively at a top surface of the projection; and supplying an etchant to the catalyst layer to cause an etching of the semiconductor substrate with an assist from the noble metal as a catalyst.

Abstract: An apparatus and method for removing support material from and/or smoothing surfaces of an additively manufactured part (the “AM part”) is disclosed. The apparatus may include a chamber, a support surface within the chamber, and one or more nozzles within the chamber. The nozzles may be the same size or different sizes. The support surface may be configured to support the AM part. The support surface may have one or more openings sized and configured to allow the fluid to pass through the opening(s). The nozzles may be configured to spray a fluid at the AM part, and the spray may be an atomized or semi-atomized spray of the fluid.

Abstract: A plasma processing method includes executing an etching process that includes supplying an etching gas into a process container in which a target substrate is supported on a second electrode serving as a lower electrode, and applying an RF power for plasma generation and an RF power for ion attraction to turn the etching gas into plasma and to subject the target substrate to etching. The etching process includes applying a negative DC voltage to a first electrode serving as an upper electrode during the etching to increase an absolute value of self-bias on the first electrode. The etching process includes releasing DC electron current generated by the negative DC voltage to ground through plasma and a conductive member disposed as a ring around the first electrode, by using a first state where the conductive member is connected to a ground potential portion.

Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask, after patterning the mask, etching (a) through a first layer of electrically conductive material to form an electrically conductive electrode and (b) through a third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure. The process further includes providing insulating material on or over the sidewalls of the second synthetic antiferromagnetic structure and, thereafter, etching through (a) a second tunnel barrier layer to provide sidewalls thereof, (b) a second layer of ferromagnetic material to provide sidewalls thereof, (c) a first tunnel barrier layer to provide sidewalls thereof, and (d) a first layer of ferromagnetic material to provide sidewalls of the first synthetic antiferromagnetic structure.

Abstract: A semiconductor manufacturing method and semiconductor manufacturing tool for performing the same are disclosed. The semiconductor manufacturing tool includes a plasma chamber, a mounting platform disposed within the plasma chamber, a focus ring disposed within the plasma chamber, and at least one actuator mechanically coupled to the focus ring and configured to move the focus ring vertically. The actuator is configured to move the focus ring vertically when a plasma is present in the plasma chamber.