Patents Examined by Ryan Stiglic
  • Patent number: 8352763
    Abstract: Provided is technology for enabling power saving control that allows a change of control content according to a user selection in a power control system that saves power consumed by an information processing apparatus. The power control system of the present invention include an image processing apparatus 102 as an example of the information processing apparatus and a power consumption management apparatus 106 that manages the amount of power consumption of the image processing apparatus 102. The image processing apparatus 102, in power saving control based on a control mode according to the amount of power consumption, if execution of a job instructed by a user is restricted depending on a power saving setting received from the power consumption management apparatus 106, changes control content of the control mode to content that has been determined as a substitution for the control content for allowing the job to be executed.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: January 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryotaro Imine, Takehito Utsunomiya
  • Patent number: 8347014
    Abstract: A mobile computing device (MCD) can determine, based on model-specific test result information, whether an accessory may be incompatible with specific MCD functions. In some embodiments, the accessory provides test result information separately indicating a test result for each of a number of MCD models. Multiple MCD models can be grouped into a device class, and the MCD can deem the accessory compatible if he received test result information indicates a pass result for at least one of the device models associated with a device class to which the MCD belongs. If the accessory is not deemed to be compatible with the mobile computing device, the MCD can generate a warning.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: January 1, 2013
    Assignee: Apple Inc.
    Inventors: Emily Clark Schubert, Stephen Chick, Scott Krueger, Gregory R. Joswiak
  • Patent number: 8332565
    Abstract: A USB device includes: a communication section that is capable of wirelessly communicating with a communication device that supports a predetermined communication standard; a USB communication section that is capable of communicating with a USB host device; and a connection section that, when a connection to the communication device is requested under the condition that a connection to the USB host device is requested, determines whether or not a protocol supported by the communication device is any of multiple protocols, and establishes the connection to the USB host device through the USB communication section using a device class corresponding to the determined protocol.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: December 11, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Eiji Minami
  • Patent number: 8332566
    Abstract: Methods and apparatuses that utilize a serial bus, such as a universal serial bus (USB), for communications between a communications network, a computing device, and an auxiliary device are disclosed. Some embodiments comprise methods handling sideband communications using serial buses. One or more of the embodiments comprise differentiating in-band data from out-of-band data, transferring information of the in-band data between a communications network and a computing device, and transferring information of the out-of-band data between the communications network and an auxiliary device. Some embodiments comprise an apparatus having a communications network interface, an auxiliary device interface, and a computing device interface. Of the interfaces, one or more may be a serial bus interface. The apparatus may differentiate between in-band and out-of-band data and communicate information of the out-of-band data to an auxiliary device. In some embodiments, the apparatus may also transfer control information.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: December 11, 2012
    Assignee: Intel Corporation
    Inventor: Thomas M Slaight
  • Patent number: 8327055
    Abstract: In an embodiment a translation of RID (requester identifier) ranges to identifiers of north chips is stored into a south chip. A command that comprises a command RID is received at the south chip from a device. In response, a RID range is determined that encompasses the command RID, and a north chip identifier is found that is assigned a virtual function identified by the command RID. The command is sent from the south chip to the north chip identified by the north chip identifier. The translation comprises a RID compare value and a RID mask. A determination is made that the RID range encompasses the command RID by performing a logical-and operation on the command RID and the RID mask and comparing a result of the logical-and operation to the RID compare value.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: William J. Armstrong, David R. Engebretsen, Steven M. Thurber, Curtis C. Wollbrink, Adalberto G. Yanes
  • Patent number: 8321707
    Abstract: A main computer for vehicle includes a central processing unit and a programmable logic device. The central processing unit is configured for controlling operations of the main computer. The programmable logic device is coupled to the central processing unit and includes a built-in power state machine for managing power statuses of the main computer. The power state machine includes a turn-off status, an operating status, and a predetermined status located between the turn-off status and the operating status.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: November 27, 2012
    Assignee: HTC Corporation
    Inventors: Ming-Jer Yang, Chun-Sheng Chao, Chao-Feng Wan
  • Patent number: 8321700
    Abstract: A power controller for a peripheral bus interface. A peripheral bus power controller includes a first terminal, a second terminal coupled to receive an power enable input signal from a host controller, and a third terminal coupled to provide an over-current output signal indicative of an over-current condition to the host controller. The peripheral bus power controller further includes an enable circuit configured to assert a power enable output signal on the first terminal responsive to receiving the power enable input signal and a first buffer configured to provide the over-current output signal to the host controller responsive to the power controller detecting the over-current condition on the first terminal.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: November 27, 2012
    Assignee: Standard Microsystems Corporation
    Inventors: Atish Ghosh, Hans Magnusson
  • Patent number: 8316170
    Abstract: A method for transmitting data via network nodes of a particular network has the following steps: coupling the network nodes to a respective number of coupled end devices via a bus having a transmission line and a receiving line in an interlinked arrangement; providing a first number of first frames which are defined in accordance with the particular network and each comprise safety-related data; providing a second number of second frames which are defined in accordance with the particular network and each comprise non-safety-related data; and transmitting the provided first frames and the provided second frames via the bus in a predetermined sequence, a respective time interval between two respective first frames transmitted via the transmission line and two respective first frames transmitted via the receiving line being set as a function of a determined sampling rate of the audio data by the coupled end devices, and at least one respective second frame being transmitted via the transmission line and via
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: November 20, 2012
    Assignee: Airbus Operations GmbH
    Inventors: Sven-Olaf Berkhahn, Christian Wiese, Martin Wagner, Wolfgang Fischer
  • Patent number: 8312198
    Abstract: A technique to enable efficient interrupt communication within a computer system. In one embodiment, an advanced programmable interrupt controller (APlC) is interfaced via a set of bits within an APIC interface register using various interface instructions or operations, without using memory-mapped input/output (MMIO).
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: November 13, 2012
    Assignee: Intel Corporation
    Inventors: Keshavan Tiruvallur, Rajesh Parthasarathy, James B. Crossland, Shivnandan Kaushik, Luke Hood
  • Patent number: 8312192
    Abstract: The present invention provides an information transmission system including: a transmission path that transmits information in serial; a first information transmission device including, a transmitting section that transmits the information in the transmission path at a predetermined transmission speed, and a controller that controls the transmitting section to transmit predetermined first information in the transmission path when establishing communication, the first information including a same value in successive plurality of bits; and a second information transmission device including, a receiving section that receives the information transmitted via the transmission path, and a communication establishing section that establishes the communication based on the first information, when the receiving section receives the first information.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: November 13, 2012
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Hirokazu Tsubota
  • Patent number: 8307143
    Abstract: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: November 6, 2012
    Assignee: d-broad, Inc.
    Inventors: Katsuhiro Hirayama, Hiroto Yoshikawa, Yoshihiro Ueda, Osamu Mikami
  • Patent number: 8296494
    Abstract: In an embodiment, an apparatus comprises a bus network having a set of lines, and a number of communication system devices associated with a number of electronics equipment connected to the bus in which each communication system device configures the electronics equipment to send and receive a plurality of signals on a line of the set of lines in a noise region of the set of lines.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: October 23, 2012
    Assignee: The Boeing Company
    Inventor: Gregory L. Sheffield
  • Patent number: 8296596
    Abstract: A computer system capable of dynamically modulating a core-voltage and a clock frequency of a CPU is provided.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: October 23, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventor: Hung-Jan Tu
  • Patent number: 8296597
    Abstract: A computer system capable of dynamically modulating an operation voltage and an operation frequency of a CPU comprises: a CPU from which a VID1 is outputted based on a real load of the CPU; a VID converting/comparing controller capable of determining to operate in an bypass mode or a calculation mode in response to the received VID1 signal and capable of outputting a VID2 signal and a control signal; a frequency generator for generating a CPU clock with a specific frequency to the CPU in response to the control signal; and a PWM controller capable of generating the operation voltage to the CPU in response to the VID2 signal; wherein when the VID converting/comparing controller is switched to operate in the calculation mode, the VID1 signal is not equal to the VID2 signal and the specific frequency is modulated to either a higher or a lower than a normal operation frequency by the VID converting/comparing controller.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: October 23, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventor: Hung-Jan Tu
  • Patent number: 8291141
    Abstract: A method and apparatus for supporting multiple device numbers on point-to-point interconnect upstream ports. In one embodiment, the method includes a downstream component (DC) that performs discovery of internal device components of the DC during initialization of the DC. Subsequent to the discovery of internal devices of the DC, the DC may issue a multiple device number (MDN) request to an upstream component (UC) of the DC. In one embodiment, the MDN request may include an indication that the DC supports a “multiple device number capability,” as well as a quantity of the internal device components of the DC. The DC may receive an acknowledgement MDN from the UC to indicate a quantity of device numbers allocated to the DC. Subsequently, the DC may assign device numbers to the internal device components of the DC according to configuration requests received from the UC. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: October 16, 2012
    Assignee: Intel Corporation
    Inventor: David J. Harriman
  • Patent number: 8285904
    Abstract: A method includes delivering a user-level interrupt message indicative of a user-level interrupt to one or more recipients according to a user-level interrupt delivery configuration selected from a plurality of user-level interrupt delivery configurations. The one or more recipients correspond to one or more application threads executing on one or more processor cores of a plurality of processor cores in a multi-core system. A method includes generating an indicator of a user-level interrupt being undeliverable to one or more intended recipients of a user-level interrupt message according to a failed delivery notification mode configuration. The user-level interrupt may be issued by an application thread executing on a first processor core of a plurality of processor cores in a multi-core system.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: October 9, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Karin Strauss, Jaewoong Chung
  • Patent number: 8286020
    Abstract: A power supply includes a power supply module, a microcontroller, a setting unit, a number of switch units, a number of current detection units, and a number of output connectors. Each switch unit is connected to one output connector via one current detection unit. The power supply module converts an alternating current (AC) voltage into a direct current (DC) to power electronic devices connected to each output connector by the corresponding switch unit, and the corresponding current detection unit. Each current detection unit detects a current passing through the output connector. The microcontroller calculates a total power of the power supply module according the detected currents and the DC voltage, and turns off all the switch units when the total power is greater than a predetermined current according to a protection mode set in the setting unit.
    Type: Grant
    Filed: August 1, 2010
    Date of Patent: October 9, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Ping-Cheng Hsieh, Jui-Hsiu Lin, Hao-Chieh Liu, Cheng-Tuan Lu
  • Patent number: 8281059
    Abstract: An electronic device with a projection functionality includes: a universal serial bus (USB) port, a processing circuit, a storage, a storage controller and a display circuit. The USB port receives USB packets carrying a first pixel data. The processing circuit is coupled to the USB port, and converts the received USB packets into the first pixel data. The storage controller is coupled between the processing circuit and the storage, and stores the first pixel data into the storage. The display circuit is coupled to the storage controller, and generates a display driving signal according to the first pixel data stored in the storage.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: October 2, 2012
    Assignee: Himax Display, Inc.
    Inventors: Chin-Jung Chen, Yung-Yuan Ho, Chia-Cheng Lai
  • Patent number: 8271707
    Abstract: A single root I/O virtualization (SR-IOV) capable peripheral component interconnect (PCI) device may be operable to configure resources to transparently operate in a non-SR-IOV environment utilizing a physical function (PF) and one or more hybrid functions (HFs). In instances when the SR-IOV capable PCI device is operating in a SR-IOV environment, the SR-IOV capable PCI device may expose a VF configuration space in the hybrid function to an associated PCI driver for configuring the hybrid function as a virtual function. In instances when the SR-IOV capable PCI device is operating in a non-SR-IOV environment, the SR-IOV capable PCI device may hide a SR-IOV extended header in the physical function from the associated PCI driver and expose a PF configuration space in the hybrid function to the associated PCI driver for configuring the hybrid function as a physical function.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: September 18, 2012
    Assignee: Broadcom Corporation
    Inventors: Frankie Fan, Robert Lusinsky, Burhan Masood
  • Patent number: 8271714
    Abstract: An interface for serial data communication, comprising: a power signal contact having an associated impedance; at least one data signal contact; and sensing means for automatically sensing a discrete change in the impedance associated with the power signal contact. A method of checking a serial data connection between a host and a peripheral that are not involved in a data communication session, the method comprising: sensing a discrete change in an impedance associated with a contact that is used, during a session, for transferring power from the host to the peripheral.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: September 18, 2012
    Assignee: Nokia Corporation
    Inventor: Clifford Ede