Patents Examined by Samuel S Outten
  • Patent number: 11558035
    Abstract: A multiplexer includes a common terminal, a first terminal, a second terminal, a first filter device including acoustic wave resonators including series resonators and parallel resonators, an inductor provided between an acoustic wave resonator and the first terminal, and a second filter device. The first filter device further includes a first ground terminal to which a parallel resonator is electrically connected, a second ground terminal to which the parallel resonators are electrically connected, and a wiring provided between the inductor and an acoustic wave resonator. In the first filter device, the wiring is electrically connected to the first ground terminal, and the first ground terminal is not connected to the second ground terminal.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: January 17, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Toshiaki Takata
  • Patent number: 11558028
    Abstract: A filter module includes an inductor, a filter including first wiring, and second wiring between the inductor and the first wiring and being a direct-current floating potential. The inductor and the first wiring are magnetically coupled, the inductor and the second wiring are magnetically coupled, and the first wiring and the second wiring are capacitively coupled.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: January 17, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Akira Noguchi
  • Patent number: 11558073
    Abstract: A switch module switches among a first state where first and second frequency bands are used in parallel, a second state where only the first frequency band is used, and a third state where none of the first and second frequency bands is used, and includes first, second, and third filters and an antenna switch. In the first state, a common terminal and the first and second filters are connected and the common terminal and the third filter are not connected. In the second state, the common terminal and the first and third filters are connected, and the common terminal and the second filter are not connected.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: January 17, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takayuki Yamada
  • Patent number: 11558021
    Abstract: An operational amplifier includes a differential amplifier circuit and a common mode feedback circuit. The differential amplifier circuit includes a bias circuit, an amplifier circuit, and a load circuit. The bias circuit generates a first operation voltage. The amplifier circuit receives a pair of input signals, and generates a pair of output signals according to the input signals and the first operation voltage. The load circuit is coupled to the amplifier circuit. The common mode feedback circuit generates at least one common mode feedback voltage based on a common mode voltage and a reference voltage. The common mode voltage is associated with the output signals. The at least one common mode feedback voltage is for controlling the bias circuit and the load circuit, to control a direct current (DC) voltage level of the differential amplifier circuit.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: January 17, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yi-Shao Chang, Ka-Un Chan
  • Patent number: 11558013
    Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: January 17, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nitin Agarwal, Kunal Karanjkar, Venkata Ramanan
  • Patent number: 11558017
    Abstract: A power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage supply and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to a base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage supply and a collector of the first transistor. The second resistor is connected between the first voltage supply and a collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: January 17, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Jaw-Ming Ding
  • Patent number: 11552379
    Abstract: The invention relates to a transition from a stripline to a waveguide, wherein: the stripline, preferably a microstrip line, is located on a substrate; an upper side of the substrate has a metallised surface and the lower side of the substrate has a metal layer, preferably a high-frequency ground-potential layer; the upper side and the lower side are connected to vias; and at least part of the metallised surface on the upper side of the substrate acts as a waveguide wall.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: January 10, 2023
    Assignee: CRUISE MUNICH GMBH
    Inventor: Stefan Trummer
  • Patent number: 11552612
    Abstract: A high frequency power supply alternately outputs a first AC voltage and a second AC voltage to a plasma generator. The amplitudes of the first AC voltage and the second AC voltage are different from each other. An impedance adjustment device is disposed in midway of the transmission line of the first AC voltage and the second AC voltage. When the AC voltage output from the high frequency power supply is switched to a first AC voltage, a microcomputer changes the capacitance of a variable capacitor circuit to a first target value. When the AC voltage output from the high frequency power supply is switched to a second AC voltage, the microcomputer changes the capacitance of the variable capacitor circuit to a second target value.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: January 10, 2023
    Assignee: DAIHEN Corporation
    Inventor: Tatsuya Morii
  • Patent number: 11552598
    Abstract: Wideband power combiners and splitters are provided herein. In certain embodiments, a power combiner/splitter is implemented with a first coil connecting a first port and a second port, and a second coil connecting a third port and a fourth port. The first coil and the second coil are inductively coupled to one another. For example, the first coil and the second coil can be formed using adjacent conductive layers of a semiconductor chip, an integrated passive device, or a laminate. The power combiner/splitter further includes a fifth port tapping a center of the first coil and a sixth port tapping a center of the second coil. The fifth port and the sixth port serve to connect capacitors and/or other impedance to the center of the coils to thereby provide wideband operation.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: January 10, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Bo Pan, Aleksey A. Lyalin, Weimin Sun, Philip John Lehtola
  • Patent number: 11552600
    Abstract: In one embodiment, stable and controlled circuit element biasing is provided in a circuit comprising a voltage source operable to output a first voltage, a reference voltage source operable to output a reference voltage, a circuit element biased, during operation, by the first voltage at a first end and by a second voltage at a second end, a voltage controller coupled to the second end of the circuit element, wherein the voltage controller is operable to adjust the second voltage based on a gain output, a gain controller operable to receive the reference voltage as a first input and the second voltage as a second input, wherein the gain controller is operable to generate, at an output of the gain controller, the gain output based on the second voltage and the reference voltage, and a feedback loop that extends from the output of the gain controller, through the voltage controller, and to the second input.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: January 10, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Alexander C. Kurylak, Kadaba Lakshmikumar
  • Patent number: 11552616
    Abstract: An acoustic wave device includes a support substrate, a silicon nitride film stacked on the support substrate, a silicon oxide film stacked on the silicon nitride film, a piezoelectric body stacked on the silicon oxide film and made of lithium tantalite, and an IDT electrode provided on one main surface of the piezoelectric body. For a wavelength normalized film thickness of the piezoelectric body, an Euler angle of the piezoelectric body, a wavelength normalized film thickness of the silicon nitride film, a wavelength normalized film thickness of the silicon oxide film, and a wavelength normalized film thickness of the IDT electrode, values are set so that at least one of a response intensity of a first higher order mode, corresponding to the response intensity of a second higher order mode, and of a response intensity of a third higher mode is greater than about ?2.4.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: January 10, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Ryo Nakagawa, Shou Nagatomo, Hideki Iwamoto, Tsutomu Takai
  • Patent number: 11552614
    Abstract: A laterally excited bulk acoustic wave device is disclosed. The laterally excited bulk acoustic wave device can include a first solid acoustic mirror, a second solid acoustic mirror, a piezoelectric layer that is positioned between the first solid acoustic mirror and the second solid acoustic mirror, an interdigital transducer electrode on the piezoelectric layer, and a support substrate arranged to dissipate heat associated with the bulk acoustic wave. The interdigital transducer electrode is arranged to laterally excite a bulk acoustic wave. The first solid acoustic mirror and the second solid acoustic mirror are arranged to confine acoustic energy of the bulk acoustic wave. The first solid acoustic mirror is positioned on the support substrate.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: January 10, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Joshua James Caron, Rei Goto
  • Patent number: 11552615
    Abstract: An acoustic wave device includes a piezoelectric body made of lithium niobate and disposed directly or indirectly on a supporting substrate, and IDT electrode disposed directly or indirectly on the piezoelectric body. When the wavelength of an acoustic wave that is determined by a pitch of electrode fingers of the IDT electrode is denoted by ?, the thickness of the piezoelectric body is equal to or less than about 1?. The acoustic wave device uses the plate wave S0 mode propagating in the piezoelectric body. The Euler angles of the lithium niobate are (0°±10°, ?, 90°±10°), provided that ? is from about 0° to about 180° inclusive.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: January 10, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masakazu Mimura
  • Patent number: 11552604
    Abstract: Balun device and differential phase shifter are provided. The balun device includes a first primary coil, a first secondary coil, a second primary coil and a second secondary coil, the first primary coil having a first terminal receiving a first differential signal, and a second terminal outputting a first in-phase component, the first secondary coil having a first terminal outputting a first component orthogonal to the first in-phase component, and a second terminal coupled to AC ground, the second primary coil having a first terminal receiving a second differential signal, and a second terminal outputting a second in-phase component; the second secondary coil having a first terminal outputting a second component orthogonal to the second in-phase component, and a second terminal coupled to AC ground; phase differences between the first and second differential signals, between the first and second in-phase components, between the first and second orthogonal component are 180°.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: January 10, 2023
    Assignee: SPREADTRUM COMMUNICATIONS (SHANGHAI) CO., LTD.
    Inventor: Xuanhe Liu
  • Patent number: 11545936
    Abstract: Techniques for biasing output transistor of a push-pull amplifier output stage are provided. In certain applications the techniques can improve efficiency of the amplifier. In an example, a circuit can include an output stage including first and second output transistors, a first scaled replica transistor corresponding to the first output transistor, and an amplifier circuit in a feedback arrangement for biasing a gate of the first output transistor at a level that, at a specified stand-by current level of the first output transistor, reproduces a voltage difference between the drain and source terminals of the first output transistor across the drain and source terminals of the first replica transistor.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 3, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Lawrence Howard Edelson
  • Patent number: 11545939
    Abstract: Methods, apparatus, and systems are disclosed that adjust transient response in a multistage system. An example apparatus includes a first filter including an input configured to be coupled to an output of a master stage, an amplifier, the first input of the amplifier coupled to the input of the first filter, the second input of the amplifier coupled to the output of the first filter, a second filter, the input of the second filter coupled to the output of the amplifier, and a comparator, the first input of the comparator coupled to the input of the first filter circuit, the second input of the comparator coupled to the output of the amplifier, the third input of the comparator coupled to the output of the second filter, and the output of the comparator adapted to be coupled to a latch.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: January 3, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sanjay Gurlahosur, Karen Chan
  • Patent number: 11545961
    Abstract: A multiplexer includes a first transmission filter connected to a common terminal, a reception filter, a second transmission filter, and a multilayer substrate. The first transmission filter includes a first parallel-arm resonator connected to a first parallel-arm terminal and a second parallel-arm resonator connected to a second parallel-arm terminal. The second transmission filter includes a third parallel-arm resonator connected to a third parallel-arm terminal and a fourth parallel-arm resonator connected to a fourth parallel-arm terminal. The first to fourth parallel-arm resonators are surface-mounted on a main surface of the multilayer substrate. The second and third parallel-arm terminals are grounded on any dielectric layer from the main surface to an n-th dielectric layer of the multilayer substrate and the first and fourth parallel-arm terminals are isolated from each other on the dielectric layers from the main surface to the n-th dielectric layer.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: January 3, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Tomoko Taguchi
  • Patent number: 11545937
    Abstract: A dual-mode average power tracking (APT) controller operates in a first mode to move the control voltage quickly without concern for ripple or ringing. When this coarse adjustment takes the control voltage to within a desired margin of a target, the controller may switch to a second mode, where the APT controller more slowly approaches the target, but has reduced ringing or ripples. The mode is changed by changing resistance and capacitance values in a loop filter within the APT circuit. In a further aspect, a pulse shaper circuit may inject a pulse to force the control voltage to change more rapidly. By switching modes in this fashion, the control voltage may quickly reach a desired target, and then remain in the second mode during a transmission time slot such that the control voltage is clean throughout.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: January 3, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Jean-Frederic Chiron, Robert Moehrke
  • Patent number: 11545938
    Abstract: Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: January 3, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Philip John Lehtola, Scott W. Coffin
  • Patent number: 11540383
    Abstract: A signal transmission circuit includes a printed circuit board including a surface layer including a signal transmission path that transmits a signal, a signal line through hole that connects the signal transmission path with a signal layer arranged in an inner layer of the printed circuit board, a ground layer of the inner layer of the printed circuit board that forms a return current transmission path for the signal transmission path, and a ground through hole that is connected to the ground layer adjacent to the signal line through hole. A ground pattern including ground areas disposed with a certain distance therebetween and a side ground area connected with at least one end side of the ground areas is disposed at positions of both sides of the signal transmission path. The ground through hole is disposed to connect the ground pattern with the ground layer.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: December 27, 2022
    Assignee: HITACHI, LTD.
    Inventors: Takayuki Koyanagi, Takemasa Komori