Abstract: A neuromorphic electric system includes a network of plural neuron circuits connected in series and in parallel to form plural layers. Each of the plural neuron circuits includes: a soma circuit that stores a charge supplied thereto and outputs a spike signal; and plural synapse circuits that supply a charge to the soma circuit according to a spike signal fed to the synapse circuits, a number of the plural synapse circuits being one more than a number of plural neuron circuits in a prior layer outputting the spike signal to the synapse circuits. One of the plural synapse circuits supplies a charge to the soma circuit in response to receiving a series of pulse signals, and the others of the plural synapse circuits supply a charge to the soma circuit in response to receiving a spike signal from corresponding neuron circuits in the prior layer.

Abstract: A MEMS device and a method to manufacture a MEMS device are disclosed. An embodiment includes forming trenches in a first main surface of a substrate, forming conductive fingers by forming a conductive material in the trenches and forming an opening from a second main surface of the substrate thereby exposing the conductive fingers, the second main surface opposite the first main surface.

Abstract: A method of forming a logic or memory cell with less than or equal to 0 nm of TS extending past the active fins and the resulting device are provided. Embodiments include forming gates across pairs of fins on a substrate; forming pairs of RSD between the gates on the fins; forming a planar SAC cap on each of the gates; forming a metal layer over the substrate coplanar with the SACs; forming a TS structure in the metal layer over the fins, the TS structure formed over the pairs of RSD, each upper portion having a width equal to or less than an overall width of a pair of fins; forming spacers on opposite sides of the upper portions; removing the metal layer between adjacent spacers; forming an ILD over the substrate; and forming a CA on each upper portion and a CB on a gate through the ILD.

Abstract: A method of forming a vertical III-nitride based light emitting diode structure 5 and a vertical III-nitride based light emitting diode structure can be provided. The method comprises forming a III-nitride based light emitting structure on a silicon-oninsulator (SOI) substrate; forming a metal-based electrode structure on the III-nitride based light emitting structure; and removing the SOI substrate by a layer transfer process such that the metal-based electrode structure functions as a metal-based 10 substrate of the light emitting structure.

Abstract: A substrate (5) in which a surface of an aluminum base (10) other than a surface on which an insulating thin film layer (17) is formed is covered with a protective layer (19) which is an aluminum anodic oxide film.

Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.

Abstract: Pre-formed wavelength conversion elements are attached to light emitting elements and are shaped to reduce repeated occurrences of total internal reflection. The sides of the shaped elements may be sloped or otherwise shaped so as to introduce a change in the angle of incidence of reflected light upon the light extraction surface of the wavelength conversion element. The pre-formed wavelength conversion elements may be configured to extend over an array of light emitting elements, with features between the light emitting elements that are shaped to reduce repeated occurrences of total internal reflection.

Abstract: A display device include a substrate including a wiring electrode; an adhesive layer disposed on the substrate; a plurality of semiconductor light emitting devices adhered to the adhesive layer, and electrically connected to the wiring electrode; and a phosphor layer disposed to cover the plurality of semiconductor light emitting devices. Further, the phosphor layer includes a plurality of phosphor portions for converting a wavelength of light, and a plurality of partition wall portions formed between the plurality of phosphor portions, and the plurality of partition wall portions are sequentially disposed between the phosphor portions along a first direction and a second direction crossing each other, respectively, and at least one of the sequentially disposed partition wall portions overlaps with at least one of the plurality of semiconductor light emitting devices.

Abstract: A method of manufacturing a light emitting device including: forming a supporting body on a mounting surface of each of semiconductor light emitting elements; arranging the semiconductor light emitting elements to be spaced apart from each other by a predetermined distance; and forming a wavelength conversion layer to continuously cover an upper surface and side surfaces of at least one of the semiconductor light emitting elements. The forming the wavelength conversion layer includes spraying a slurry provided by mixing particles of a wavelength conversion member and a thermosetting resin in a solvent onto the upper surface and the side surfaces of the semiconductor light emitting element, so that a thickness of the wavelength conversion layer at a lower portion of the side surfaces of the supporting body is smaller than the thickness on the upper surface and the side surfaces of the semiconductor light emitting element.

Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.

Abstract: A surface-mountable multi-chip component includes a carrier having a first connection element, a second connection element and third connection element that are electrically insulated from one another. A first semiconductor chip is arranged on the first connection element and electrically connected to the first and second connection elements. The first connection element forms a first electrode and the second connection element forms a second electrode for the first semiconductor chip. A second semiconductor chip is arranged on the second connection element and electrically connected to the second and third connection elements. The third connection element forms a first electrode and the second connection element forms a second electrode for the second semiconductor chip. The second connection element forms a common cathode or anode for the first and second semiconductor chips during operation.

Abstract: Disclosed are systems, devices and methods for providing electrostatic discharge (ESD) protection for integrated circuits. In some implementations, first and second conductors with ohmic contacts on an intrinsic semiconductor region can function similar to an x-i-y type diode, where each of x and y can be n-type or p-type. Such a diode can be configured to turn on under selected conditions such as an ESD event. Such a structure can be configured so as to provide an effective ESD protection while providing little or substantially nil effect on radio-frequency (RF) operating properties of a device.

Abstract: According to one embodiment, a magnetic memory device includes an interlayer insulating film, a bottom electrode formed in the interlayer insulating film, a buffer layer formed on the bottom electrode, and a stacked structure formed on the buffer layer and including a first magnetic layer functioning as a magnetic storage layer, wherein a portion of the buffer layer located on a central portion of the bottom electrode is thicker than a portion of the buffer layer located on a peripheral portion of the bottom electrode.

Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.

Abstract: Inverted optical device. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. A flip wafer is attached to the plurality of light emitting diodes, away from the carrier wafer and the carrier wafer is removed. The plurality of light emitting diodes may be singulated to form individual light emitting diode devices.

Abstract: Thinned and highly reliable light emitting elements are provided. Further, light emitting devices in which light emitting elements are formed over flexible substrates are manufactured with high yield. One light emitting device includes a flexible substrate, a light emitting element formed over the flexible substrate, and a resin film covering the light emitting element, and in the light emitting element, an insulating layer serving as a partition has a convex portion and the convex portion is embedded in the resin film, that is, the resin film covers an entire surface of the insulating layer and an entire surface of the second electrode, whereby the light emitting element can be thinned and highly reliable. In addition, a light emitting device can be manufactured with high yield in a manufacturing process thereof.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a floating substrate; and a capacitor grounded and connected to the floating substrate. A method of manufacturing a semiconductor structure is also provided.

Abstract: A light-emitting device including a substrate; a first conductivity semiconductor layer disposed on the substrate; a first barrier disposed on the first conductivity semiconductor layer; a well disposed on the first barrier and including a first region having a first energy gap and a second region having a second energy gap and closer to the semiconductor layer than the first region; a second barrier disposed on the well; and a second conductivity semiconductor layer disposed on the second barrier; wherein the first energy gap decreases along a stacking direction of the light-emitting device and has a first gradient, the second energy gap increases along the stacking direction and has a second gradient, and an absolute value of the first gradient is smaller than an absolute value of the second gradient.

Abstract: A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The high-side device can include a lateral diffused metal oxide semiconductor (LDMOS) while the low-side device can include a trench-gate vertical diffused metal oxide semiconductor (VDMOS). The voltage converter can further include a controller circuit on a different die which can be electrically coupled to, and co-packaged with the output circuit.

Abstract: A MOSFET cell of a semiconductor device includes a polysilicon gate electrode and an n+-source region formed in an upper portion of an n?-drift layer. An interlayer insulating film covers the gate electrode. An Al source electrode extends on the interlayer insulating film. An Al gate pad is connected to the gate electrode. A barrier metal layer that prevents diffusion of aluminum is interposed between the source electrode and the interlayer insulating film, and between the gate pad and the gate electrode.