Abstract: An organic light emitting diode display includes a display substrate including a first substrate and a plurality of pixel light emitting units on the first substrate, and an encapsulation substrate including a second substrate facing the display substrate, and a main reflecting member on the second substrate, the main reflecting member including a light emitting opening at a position corresponding to at least one of the pixel light emitting units, and an auxiliary opening dividing the main reflecting member into a plurality of sub-reflecting members.

Abstract: In semiconductor integrated circuit devices for vehicle use, an aluminum pad on a semiconductor chip and an external device are coupled to each other by wire bonding using a gold wire for the convenience of mounting. Such a semiconductor integrated circuit device, however, causes a connection failure due to the interaction between aluminum and gold in use for a long time at a relatively high temperature (about 150 degrees C.). A semiconductor integrated circuit device can include a semiconductor chip as a part of the device, an electrolytic gold plated surface film (gold-based metal plated film) provided over an aluminum-based bonding pad on a semiconductor chip via a barrier metal film, and a gold bonding wire (gold-based bonding wire) for interconnection between the plated surface film and an external lead provided over a wiring board (wiring substrate).

Abstract: A seal ring structure of an integrated circuit includes a seal ring and a metal-insulator-metal (MIM) capacitor. The MIM capacitor includes a top electrode, a bottom electrode disposed below the top electrode, and a first insulating layer disposed between the top electrode and the bottom electrode. The MIM capacitor is disposed within the seal ring and the MIM capacitor is insulated from the seal ring.

Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.

Abstract: An organic light emitting display device includes a substrate including a display area and a non-display area, a plurality of scan lines extended in a first direction on the substrate, a plurality of data lines extended in a second direction intersecting the first direction, a plurality of first switching elements in the display area, the plurality of first switching elements being connected to the scan lines and data lines, organic emission layers connected to the first switching elements, first dummy lines between corresponding adjacent ones of the plurality of scan lines, the first dummy lines extending in the first direction, second switching elements disposed in the non-display area, the second switching elements being adjacent to first ends of the first dummy lines, and second dummy lines extended in the second direction, the second dummy lines being adjacent to the second switching elements.

Abstract: A device with improved device performance, and method of manufacturing the same, are disclosed. An exemplary device includes a group III-V compound semiconductor substrate that includes a surface having a (110) crystallographic orientation, and a gate stack disposed over the group III-V compound semiconductor substrate. The gate stack includes a high-k dielectric layer disposed on the surface having the (110) crystallographic orientation, and a gate electrode disposed over the high-k dielectric layer.

Abstract: A semiconductor crystal substrate includes a substrate; and a protection layer formed by applying nitride on a surface of the substrate. The protection layer is in an amorphous state in a peripheral area at an outer peripheral part of the substrate, and the protection layer is crystallized in an internal area of the protection layer that is inside the peripheral area of the protection layer.

Abstract: A visually seamless method of joining a first piece of metal and a second piece of metal is described. The first piece of metal is placed in contact with an edge of the second piece of metal. In some embodiments, the edge includes a sacrificial lip. The first piece of metal forming a junction area with the edge of the second piece of metal, applying a forging force to the first piece of metal, the forging force having an effect of creating an extremely tight fit up between the first and the second pieces of metal, welding the first and the second pieces to form an assembly and forming a cosmetically enhancing protective layer on the surface of the assembly, the protective layer obscuring any visible artifacts on the surface of the assembly, the obscured visible artifacts including any discoloration or discontinuity created by the laser welding.

Abstract: A semiconductor device includes a medium voltage MOSFET having a vertical drain drift region between RESURF trenches containing field plates which are electrically coupled to a source electrode of the MOSFET. A split gate with a central opening is disposed above the drain drift region between the RESURF trenches. A two-level LDD region is disposed below the central opening in the split gate. A contact metal stack makes contact with a source region at lateral sides of the triple contact structure, and with a body contact region and the field plates in the RESURF trenches at a bottom surface of the triple contact structure. A perimeter RESURF trench surrounds the MOSFET. A field plate in the perimeter RESURF trench is electrically coupled to the source electrode of the MOSFET. An integrated snubber may be formed in trenches formed concurrently with the RESURF trenches.

Abstract: An electronic device can include a tunnel structure that includes a first electrode, a second electrode, and tunnel dielectric layer disposed between the electrodes. In a particular embodiment, the tunnel structure may or may not include an intermediate doped region that is at the primary surface, abuts a lightly doped region, and has a second conductivity type opposite from and a dopant concentration greater than the lightly doped region. In another embodiment, the electrodes have opposite conductivity types. In a further embodiment, an electrode can be formed from a portion of a substrate or well region, and the other electrode can be formed over such portion of the substrate or well region.

Abstract: A pixel structure and a manufacturing method of the pixel structure are provided. The pixel structure includes a substrate, a transistor, a planarizing layer, a plurality of contact windows, and a pixel electrode layer. The transistor is disposed on the substrate and includes a gate, a source, and a drain. The planarizing layer is disposed on the gate, the source, and a portion of the drain. The contact windows penetrate the planarizing layer and expose another portion of the drain. The pixel electrode layer is disposed on the planarizing layer, on the another portion of the drain, and in the contact windows and is electrically connected to the drain.

Abstract: Disclosed are systems, devices and methods for providing electrostatic discharge (ESD) protection for integrated circuits. In some implementations, first and second conductors with ohmic contacts on an intrinsic semiconductor region can function similar to an x-i-y type diode, where each of x and y can be n-type or p-type. Such a diode can be configured to turn on under selected conditions such as an ESD event. Such a structure can be configured so as to provide an effective ESD protection while providing little or substantially nil effect on radio-frequency (RF) operating properties of a device.

Abstract: A light emitting diode (LED) includes an active layer having one or more multilayer potential barriers and at least one well layer. Each multilayer potential barrier includes interlacing first and second InAlGaN thin layers. The first and second InAlGaN thin layers have compositions selected with respect to the well layer such that a polarization effect is substantially reduced.

Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.

Abstract: A field-emission device is disclosed. The device comprises a solid state structure formed of a crystalline material and an amorphous material, wherein an outer surface of the solid state structure is substantially devoid of the amorphous material, and wherein a p-type conductivity of the crystalline material is higher at or near the outer surface than far from the outer surface.

Abstract: Inverted optical device. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. A flip wafer is attached to the plurality of light emitting diodes, away from the carrier wafer and the carrier wafer is removed. The plurality of light emitting diodes may be singulated to form individual light emitting diode devices.

Abstract: Cross-coupling between a gate conductor and an active region of a semiconductor substrate is provided by forming a gate dielectric layer on the semiconductor substrate and lithographically patterning the gate dielectric layer to form opening therein over a portion of the active region at which electrical contact with the gate conductor is desired. After implanting electrical dopants, a gate conductor layer is deposited and patterned. A remaining portion of the gate conductor layer includes an integral conductor structure, which includes a first portion overlying a gate dielectric over an active region and a second portion contacting the semiconductor material of the same active region or a different active region. The gate dielectric layer can be deposited within gate cavities in planarization dielectric material layer in a replacement gate scheme, or can be deposited on planar surfaces of active regions and/or shallow trench isolation structures in a gate first processing scheme.

Abstract: Diodes and resistors for integrated circuits are provided. Deep trenches (DTs) are integrated into the diodes and resistors for the purposes of thermal conduction. The deep trenches facilitate conduction of heat from a semiconductor-on-insulator substrate to a bulk substrate. Semiconductor fins may be formed to align with the deep trenches.

Abstract: A high voltage circuit layout structure has a P-type substrate; a first N-type tub, a second N-type tub, a third N-type tub, a first P-type tub with a first width and a second P-type tub with a second width formed on the P-type substrate; wherein the first P-type tub is formed between the first N-type tub and the second N-type tub; and the second P-type tub is formed between the second N-type tub and the third N-type tub.

Abstract: An anode for an organic light emitting device which introduces a metal oxide to improve flows of charges, and an organic light emitting device using the anode. The anode for the organic light emitting device has excellent charge injection characteristics, thereby improving power consumption of the organic light emitting device.