Abstract: A display device includes a substrate including a front member, first and second side members extended from the front member, and a first corner disposed between the first and second side members, the first side member being bent along a first bending line in a first direction, the second side member being bent along a second bending line in a second direction crossing the first direction, and an alignment mark disposed at the first corner of the substrate.

Abstract: A display device according to embodiments of the present disclosure includes at least one groove formed in an organic file disposed on a substrate. As a result, it is possible to discharge, or delay the movement of, moisture generated in a manufacturing process of the display device, or gas remaining in an organic film. Thus the display quality and lifetime of the display device can be improved.

Abstract: Technologies for adaptive bandwidth reduction for an Internet of Things (IoT) gateway device are disclosed. The IoT gateway device receives data from one or more sensors, and determines a mathematical model to represent the sensor data. Certain aspects of the mathematical model used, such as the quantity of coefficients and the precision of the coefficients are determined based on the sensor data. For example, if the sensor data is within a normal range, a relatively small number of coefficients might be used, but if the sensor data is past or near an alert threshold, a larger number of coefficients might be used, which allows for the behavior of the sensor data to be better represented.

Abstract: A semiconductor structure including a semiconductor substrate, an active area, a transistor gate, a fuse gate, a first dielectric pattern, a second dielectric pattern and a plurality of metal lines is provided. The active area is disposed in the semiconductor substrate. The transistor gate has a first line segment and a second line segment extending across the active area in a first direction. The fuse gate located between the first line segment and the second line segment extends across the active area in the first direction. The first dielectric pattern is disposed between the active area and the transistor gate. The second dielectric pattern is disposed between the active area and the fuse gate. The metal lines disposed on two opposite sides of the transistor gate are electrically connected to the active device.

Abstract: A method for manufacturing a ferromagnetic-dielectric composite material comprises: (a) placing patterned ferromagnetic layer regions, in a patterning substrate assembly that includes a patterning substrate and a first dielectric layer, in physical contact with a second dielectric layer, the second dielectric layer in a receiving substrate assembly that includes a receiving substrate, (b) forming a bond between the patterned ferromagnetic layer regions and the second dielectric layer; (c) releasing the patterning substrate from the patterning substrate assembly to transfer the patterned ferromagnetic layer regions and the first dielectric layer from the patterning substrate assembly to the receiving substrate assembly; and (d) releasing the receiving substrate from the receiving substrate assembly to form the ferromagnetic-dielectric composite material.

Abstract: Embodiments described herein relate to a device including a substrate, a plurality of adjacent pixel-defining layer (PDL) structures disposed over the substrate, and a plurality of sub-pixels. Each sub-pixel includes adjacent first overhangs, adjacent second overhangs, an anode, a hole injection layer (HIL) material, an additional organic light emitting diode (OLED) material, and a cathode. Each first overhang is defined by a body structure disposed on and extending laterally past a base structure disposed on the PDL structure. Each second overhang is defined by a top structure disposed on and extending laterally past the body structure. The HIL material is disposed over and in contact with the anode and disposed under the adjacent first overhangs. The additional OLED material is disposed on the HIL material and extends under the first overhang.

Abstract: A semiconductor device includes a first fin, a first continuous fin and continuous gates. The first fin is formed on a substrate, and includes first and second portions that are spaced apart by a first recess. A side of the first portion and a side of the second portion are located at two sides of the first recess, respectively. The first continuous fin is formed on the substrate, and extends along the first portion, the first recess and the second portion. The continuous gates are formed on the substrate, and arranged to intersect the first continuous fin and the first fin in a layout view. A first number of the continuous gates are disposed across the first recess and each of the first number of the continuous gates is disposed between the two sides of the first recess in a layout view. A method is also disclosed herein.

Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.

Abstract: Embodiments described herein relate to a device comprising a substrate, a pixel-defining layer (PDL) structures disposed over the substrate and defining sub-pixels of the device, and a plurality overhang structures. Each overhang structure is defined by a top structure extending laterally past a body structure. Each body structure is disposed over an upper surface of each PDL structure. Overhang structures define a plurality of sub-pixels including a first sub-pixel and a second sub-pixel. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode, and an encapsulation layer. The OLED materials are disposed over the first anode and extends under the overhang structures. The cathodes are disposed over the OLED materials and under the overhang structures. The encapsulation layers are disposed over the first cathode. The first encapsulation layer has a first thickness and the second encapsulation layer has a second thickness different from the first thickness.

Abstract: A semiconductor vertical Schottky diode device, having: a substrate of semiconductor material, with a front surface and a back surface; a lightly doped region formed in a surface portion of the substrate facing the front surface, having a first conductivity type; a first electrode formed on the lightly doped region on the front surface of the substrate, to establish a Schottky contact; a highly doped region at the back surface of the substrate, in contact with the lightly doped region and having the first conductivity type; and a second electrode electrically in contact with the highly doped region, on the back surface of the substrate, to establish an Ohmic contact.

Abstract: The semiconductor device A1 includes a support member 2, a metal part 30 having obverse and reverse surfaces 301-302 spaced in z direction, with the reverse surface 302 bonded to the support member 2, a second bonding layer 42 boding the support member 2 and the metal part 30, a semiconductor element 10 facing the obverse surface 301 and bonded to the metal part 30, and a sealing member 7 covering the support member 2, metal part 30, second bonding layer 42 and semiconductor element 10. The metal part 30 includes a first body 31 of a first material and a second body 32 of a second material, with a boundary between the bodies 31-32. The second material has a linear thermal expansion coefficient smaller than that of the first material. The semiconductor device is improved in reliability by reducing thermal stress from heat generation of the semiconductor element.

Abstract: An array substrate and a display device are disclosed. The array substrate includes a base substrate, a plurality of gate lines and a plurality of data lines arranged to intersect each other on the base substrate, a pixel electrode arranged in a region defined by an adjacent gate line and an adjacent data line, and a thin film transistor arranged at an intersection of the gate lines and the data lines. A drain of the thin film transistor is connected with the pixel electrode through a via hole. The gate lines further include a widening portion between adjacent data lines. The widening portion comprises a recess structure. An orthogonal projection of the recess structure on the base substrate at least partly overlaps that of the drain of the thin film transistor on the base substrate.

Abstract: A display apparatus includes a display area having a plurality of pixels. A non-display area surrounds the display area. A blocking block is arranged in the non-display area and protrudes to prevent a flow of a fluid outside the blocking block.

Abstract: A method of inspecting a display device and a method of manufacturing a display device are provided. The display includes a substrate, a light emitting element on the substrate, a first contact electrode on one end of the light emitting element, and a second contact electrode spaced from the first contact electrode and on an other end of the light emitting element. The method of inspecting the display device includes applying a first inspection voltage and a second inspection voltage to the first contact electrode and the second contact electrode, respectively, and measuring a first inspection current, and while applying the first inspection voltage and the second inspection voltage to the first contact electrode and the second contact electrode, respectively, irradiating the light emitting element with inspection light and measuring a second inspection current.

Abstract: Example embodiments relate to an electronic package, to an electronic device comprising such a package, and to a lead frame for manufacturing the electronic package. Some examples may particularly relate to electronic packages in which radiofrequency (RF) circuitry is arranged. According to the example embodiments, a width of the clamping portion is substantially larger than the width of the lead end portion, the width of the clamping portion being chosen such that bending of the inner part and/or body part relative to the outer part during the application of the molding compound was substantially prevented thereby having avoided flash and/or bleed of molding compound onto the inner part.

Abstract: Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon are provided. Example structures and processes fabricate conductive vertical pillars for an integrated circuit assembly in a volume of dielectric material instead of in silicon. For example, a block of a silicon substrate may be removed and replaced with dielectric material, and then a plurality of the conductive pillars can be fabricated through the dielectric block. The through-dielectric-vias are shielded from devices and from each other by an intervening thickness of the dielectric sufficient to reduce noise, signal coupling, and frequency losses.

Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.

Abstract: An array substrate, a display panel, and a display device are provided by the present application. The array substrate includes a base substrate; a light-sensitive component layer disposed on the base substrate, wherein a plurality of light-sensitive components are disposed at intervals in the light-sensitive component layer; and a first light-shielding layer disposed on the light-sensitive component layer. An orthographic projection of the first light-shielding layer on the base substrate partially overlaps with an orthographic projection of each of the light-sensitive components on the array substrate.

Abstract: Provided is a method of manufacturing a nanorod. The method comprising comprises the steps of: providing a growth substrate and a support substrate; epitaxially growing a nanomaterial layer onto one surface of the growth substrate; forming a sacrificial layer on one surface of the support substrate; bonding the nanomaterial layer with the sacrificial layer; separating the growth substrate from the nanomaterial layer; flattening the nanomaterial layer; forming a nanorod by etching the nanomaterial layer; and separating the nanorod by removing the sacrificial layer.

Abstract: A semiconductor device includes: a substrate main body having a first surface and a second surface; an electric component arranged in the substrate main body; a first terminal and a second terminal arranged on the first surface or the second surface, respectively; a first internal conductor pattern arranged in a first circuit layer arranged between the electric component and the first surface, and electrically connected to the first terminal and the electric component; and a second internal conductor pattern arranged in a second circuit layer arranged between the electric component and the second surface, and electrically connected to the second terminal and the electric component. The first internal conductor pattern and the second internal conductor pattern are at least partially opposed to each other inside the substrate main body.