Patents Examined by Shaun M Campbell
  • Magnetoresistance effect element
    Patent number: 11362270
    Abstract: A magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer that is interposed between the first ferromagnetic layer and the second ferromagnetic layer. The tunnel barrier layer is a stacked body including one or more first oxide layers having a spinel structure and one or more second oxide layers having a spinel structure with a composition which is different from a composition of the first oxide layer.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: June 14, 2022
    Assignee: TDK CORPORATION
    Inventors: Shinto Ichikawa, Katsuyuki Nakada, Tomoyuki Sasaki
  • Semiconductor device with patterned ground shielding
    Patent number: 11355432
    Abstract: Semiconductor devices and methods of formation are provided herein. A semiconductor device includes a first inductor, a patterned ground shielding (PGS) proximate the first inductor comprising one or more portions and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. The semiconductor device also has a configuration including a first inductor on a first side of the PGS, a second inductor on a second side of the PGS and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. Selective coupling of portions of the PGS by activating or deactivating switches alters the behavior of the first inductor, or the behavior and interaction between the first inductor and the second inductor. A mechanism is thus provided for selectively configuring a PGS to control inductive or other properties of a circuit.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: June 7, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Hsiao-Tsung Yen, Chin-Wei Kuo, Cheng-Wei Luo, Kung-Hao Liang
  • Schottky photodetector
    Patent number: 11342475
    Abstract: An optoelectronic device, and a method of fabricating an optoelectronic device. The device comprising: a rib waveguide formed of doped silicon, said doped waveguide having a ridge portion, containing an uppermost surface and two sidewall surfaces; and a slab portion, adjacent to the two sidewall surfaces. The device further comprises: a metal contact layer, which directly abuts the uppermost surface and two sidewall surfaces, and which extends along a part of the slab portion so as to provide a Schottky barrier between the metal contact layer and the rib waveguide.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 24, 2022
    Assignee: Rockley Photonics Limited
    Inventors: Guomin Yu, Hooman Abediasl, Aaron John Zilkie
  • Non-volatile semiconductor memory device and manufacturing method thereof
    Patent number: 11342348
    Abstract: This non-volatile semiconductor memory device includes a memory cell array including NAND cell units formed in a first direction vertical to a surface of a semiconductor substrate. A local source line is electrically coupled to one end of the NAND cell unit formed on the surface of the substrate. The memory cell array includes: a laminated body where plural conductive films, which are to be control gate lines of memory cells or selection gate lines of selection transistors, are laminated sandwiching interlayer insulating films; a semiconductor layer that extends in the first direction; and an electric charge accumulating layer sandwiched between: the semiconductor layer and the conductive film. The local source line includes a silicide layer. The electric charge accumulating layer is continuously formed from the memory cell array to cover a peripheral area of the silicide layer.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: May 24, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yoshihiro Akutsu, Ryota Katsumata
  • Display panel
    Patent number: 11335881
    Abstract: A display panel is provided. A side surface of an interlayer insulating layer away from the substrate is partially recessed to a substrate so as to form a first groove. A crack preventing member is filled in the first groove and is connected to the substrate, so a connection of the organic layer to the organic layer is achieved, thereby increasing a bending resistance of the display panel and reducing the risk of film peeling. In addition, a side surface of the interlayer insulating layer disposed between the first groove and the banks away from the substrate is partially recessed to form a second groove, and the first inorganic packaging layer is filled in the second groove. An inorganic layer of the packaging layer is connected to an inorganic layer of an array substrate, thereby increasing a bending resistance of the display panel and reducing the risk of film peeling.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 17, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Kun Wang
  • Organic film structure and preparation method thereof, encapsulation structure and preparation method thereof, and light-emitting substrate
    Patent number: 11329251
    Abstract: The present disclosure relates to a method for preparing an organic film structure. The method for preparing the organic film structure may include forming a pigment mixture layer outside a region where an organic film is to be formed using a pigment liquid mixture, forming a liquid organic layer in the region where the organic film is to be formed with a first liquid organic material, and curing the pigment mixture layer and the liquid organic layer to form an indicator film and the organic film, respectively. The pigment mixture layer may include a pigment.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: May 10, 2022
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guanyu Lu, Haiping Zhao
  • Tiled lateral thyristor
    Patent number: 11316037
    Abstract: A thyristor tile includes first and second PNP tiles and first and second NPN tiles. Each PNP tile is adjacent to both NPN tiles, and each NPN tile is adjacent to both PNP tiles. A thyristor includes a plurality of PNP tiles and a plurality of NPN tiles. The PNP and NPN tiles are arranged in an alternating configuration in both rows and columns. The PNP tiles are oriented perpendicular to the NPN tiles. Interconnect layers have a geometry that enables even distribution of signals to the PNP and NPN tiles.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: April 26, 2022
    Assignee: Silanna Asia Pte Ltd
    Inventors: Vadim Kushner, Nima Beikae
  • Display substrate and manufacture method thereof, and display device
    Patent number: 11302892
    Abstract: A display substrate and a manufacture method thereof, and a display device are provided. The display substrate includes a display region, the display region includes an organic functional layer, an encapsulation layer, and a first barrier wall; the display region has a first opening, the first barrier wall surrounds an outer edge of the first opening, the organic functional layer surrounds the first barrier wall, and the encapsulation layer covers the organic functional layer and the first barrier wall; the encapsulation layer includes a first portion and a second portion, the first portion is configured to cover a portion of the organic functional layer close to the first opening; a second portion is configured to cover a side of the first barrier wall adjacent to the organic functional layer, the first portion forms an obtuse angle with the second portion.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: April 12, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunyan Xie, Song Zhang
  • Broadband mirror
    Patent number: 11302848
    Abstract: The invention describes a broadband mirror comprising an outer surface layer; and a dielectric layer stack arranged underneath the outer surface layer; characterized in that the dielectric layer stack comprises at least one patterned surface at an interface between adjacent dielectric layers of the dielectric layer stack. The invention further describes a light-emitting diode. The invention also describes a method of manufacturing a broadband mirror, which method comprises the steps of providing an outer surface layer and applying a plurality of dielectric layers to build a dielectric layer stack underneath the outer surface layer, characterized by the step of patterning the surface of at least one dielectric layer before applying a subsequent dielectric layer to the patterned surface.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: April 12, 2022
    Assignee: LUMILEDS LLC
    Inventors: Toni Lopez, Fahong Jin
  • Display device
    Patent number: 11296154
    Abstract: A display device includes a display panel including a first region and a second region, and a sensing module on a rear side of the display panel. The first region includes a first pixel area to display an image. The second region includes a second pixel area to display the image and a transmission area to transmit light output by the sensing module. The second region overlaps the sensing module. The second pixel area overlaps a first layer that blocks light output by the sensing module. The transmission area does not overlap the first layer.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 5, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin Woo Park, Won Kyu Kwak, Dong Wook Kim, Hyun-Chol Bang
  • Radiation-emitting semiconductor device and fabric
    Patent number: 11296265
    Abstract: A radiation-emitting semiconductor device and a fabric are disclosed. In an embodiment, a radiation-emitting semiconductor device includes a semiconductor layer sequence having an active region configured to generate radiation and at least one carrier on which the semiconductor layer sequence is arranged, wherein the at least one carrier has at least one anchoring structure on a carrier underside facing away from the semiconductor layer sequence, wherein the at least one anchoring structure includes electrical contact points for making electrical contact with the semiconductor layer sequence, and wherein the at least one anchoring structure is configured to receive at least one thread for fastening the semiconductor device to a fabric and for electrical contacting the at least one thread.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: April 5, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Martin Rudolf Behringer, Alexander F. Pfeuffer, Andreas Plößl, Georg Bogner, Berthold Hahn, Frank Singer
  • Display substrate, fabrication method thereof and display panel
    Patent number: 11289678
    Abstract: The present disclosure provides a display substrate, a fabrication method thereof and a display panel. The display substrate includes a display area (101) and a non-display area (102) around the display area (101), the display substrate further includes: a base substrate (100); at least one barrier dam (200) and a first encapsulating layer (310) on the base substrate (100), the barrier dam (200) is in the non-display area (102) on the base substrate (100), the first encapsulating layer (310) is on the base substrate (100) and on a side of the at least one barrier dam (200) facing the display area (101), the first encapsulating layer (310) is formed by a first encapsulating material (301) in a cured state, and at least a side of the barrier dam (200) facing the first encapsulating layer (310) is lyophobic with respect to the first encapsulating material (301) in a non-cured state.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 29, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Chunping Long
  • Integrated fan-out package and manufacturing method thereof
    Patent number: 11282810
    Abstract: A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A core layer and a dielectric layer are sequentially stacked over the package array. The core layer includes a plurality of cavities. A plurality of first conductive patches is formed on the dielectric layer above the cavities.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Albert Wan, Ching-Hua Hsieh, Chung-Hao Tsai, Chuei-Tang Wang, Chao-Wen Shih, Han-Ping Pu, Chien-Ling Hwang, Pei-Hsuan Lee, Tzu-Chun Tang, Yu-Ting Chiu, Jui-Chang Kuo
  • Display device
    Patent number: 11282450
    Abstract: Provided is a display device including: a substrate including an active area, a non-active area, a bending area and a pad area; the active area including pixels to display images, each pixel including an organic light emitting layer and a thin-film transistor (TFT); the non-active area located between the active area and the bending area; and the bending area configured to be bent and located between the non-active area and the pad area, the bending area including a signal line and a power line that are made of a same material as a source electrode or a drain electrode of the TFT in the active area.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: March 22, 2022
    Assignee: LG Display Co., Ltd.
    Inventors: HoYoung Lee, ChangHeon Kang
  • Capping layers in metal gates of transistors
    Patent number: 11282938
    Abstract: A method of forming a semiconductor device includes forming a gate electrode in a wafer. The formation of the gate electrode includes depositing a work-function layer, after the work-function layer is deposited, performing a treatment on the wafer, wherein the treatment is performed by soaking the wafer using a silicon-containing gas; after the treatment, forming a metal capping layer over the work-function layer; and depositing a filling metal over the metal capping layer.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ta Tang, Yi-Ting Wang, Chung Ta Chen, Hsien-Ming Lee
  • Electronic device having improved ageing resistance
    Patent number: 11283046
    Abstract: An electronic device includes a substrate, a first oxygen- and water-tight protection layer covering the substrate, at least one electronic component located on the first protection layer and having at least one organic semiconductor region, an oxygen- and water-tight encapsulation layer, the oxygen- and water-tight encapsulation layer having an epoxy or acrylate glue totally covering the organic semiconductor region, a second oxygen- and water-tight protection layer totally covering the encapsulation layer, and a support layer covering the second oxygen- and water-tight protection layer.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: March 22, 2022
    Assignee: ISORG
    Inventors: Jérôme Joimel, Eric Faupin
  • Organic electronic device
    Patent number: 11283048
    Abstract: The present application relates to an organic electronic device, and provides the organic electronic device including an encapsulating structure capable of effectively blocking water or oxygen introduced from the outside into the organic electronic device, thereby securing the lifetime of the organic electronic device and implementing endurance reliability of the encapsulating structure at high temperature and high humidity, and having high shape retention characteristics.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: March 22, 2022
    Assignee: LG CHEM, LTD.
    Inventors: Seung Min Lee, So Young Kim, Se Woo Yang
  • Flexible display apparatus and method of manufacturing the same
    Patent number: 11283055
    Abstract: A flexible display apparatus includes: a first flexible substrate including carbon and having an upper surface, a lower surface facing the upper surface, and a lateral surface coupling the upper surface to the lower surface; a first barrier layer on the first flexible substrate to cover the first flexible substrate; a second flexible substrate on the first barrier layer, the second flexible substrate including carbon and having an upper surface, a lower surface facing the upper surface, and a lateral surface coupling the upper surface to the lower surface; and an organic light emitting device on the second flexible substrate.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: March 22, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Guk An, Jun Heo
  • Electronic display visual artifact mitigation
    Patent number: 11271181
    Abstract: An electronic display having pixels and control circuitry to drive the pixels to display image data even during relatively long presentation times without visual artifacts, such as flicker, are provided. The control circuitry may cause the pixel to perform a threshold voltage sampling and pixel programming phase to store image data for the pixel while accounting for a first threshold voltage of the first transistor. Afterward, an on-bias stress phase may cause a threshold voltage of the first transistor of the plurality of transistors to reach a second threshold voltage. Following the on-bias stress phase, a first emission phase may cause the light-emitting diode to emit light in accordance with the image data, and subsequent on-bias stress phases and subsequent emission phases for the duration of the presentation time may take place without a visible flicker artifact.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: March 8, 2022
    Assignee: Apple Inc.
    Inventors: Maofeng Yang, Weijun Yao, Jiayi Jin, Paolo Sacchetto, Injae Hwang
  • Radiation-emitting semiconductor device and fabric
    Patent number: 11264550
    Abstract: A radiation-emitting semiconductor device and a fabric are disclosed. In an embodiment, a radiation-emitting semiconductor device includes a semiconductor layer sequence having an active region configured to generate radiation and at least one carrier on which the semiconductor layer sequence is arranged, wherein the at least one carrier has at least one anchoring structure on a carrier underside facing away from the semiconductor layer sequence, wherein the at least one anchoring structure includes electrical contact points for making electrical contact with the semiconductor layer sequence, and wherein the at least one anchoring structure is configured to receive at least one thread for fastening the semiconductor device to a fabric and for electrical contacting the at least one thread.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: March 1, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Martin Rudolf Behringer, Alexander F. Pfeuffer, Andreas Plößl, Georg Bogner, Berthold Hahn, Frank Singer