Abstract: A RAID controller is provided for each host sharing a RAID. Each RAID controller can determine whether another host is sharing the RAID and assume a master or slave status with respect to rebuild operations for the shared disk. The master controller may then manage any rebuild operations on rebuild disks within the RAID.

Abstract: Data locality optimization through object relocation may be implemented in a virtual machine including a just-in-time compiler. The just-in-time compiler generates load instruction maps for each compiled method. A profile collector is coupled to the just-in-time compiler to receive hardware profiling support. The profile collector takes samples of data cache misses. A garbage collector is coupled to the profile collector. The garbage collector deduces types of objects from the cache miss samples and adjusts garbage collection object copying heuristics to relocate objects for better cache locality based on those types.

Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.

Abstract: A backup and archiving system utilizing tape cassettes avoids bottlenecks at a higher performance level that may be caused by a central working storage, especially during backup and archiving procedures. Such a backup and archiving system provides a distributed hardware architecture in which several Component Computers work without reciprocal obstruction.

Abstract: A memory device and controlling method for nonvolatile memory are provided. The memory device and the controlling method for a nonvolatile memory are provided by which, where a file management system wherein there is a tendency that lower logic addresses are used frequently like the MS-DOS is adopted, physical blocks of a flash memory are used in an averaged fashion and the life of the flash memory can be elongated thereby.

Abstract: In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.

Abstract: An orientation detector within a device package is used to establish the device orientation. A host controller coupled to the device supplies a control signal to at least one of the pins on the device during a setup phase. The pin that receives the control signal is used for active signaling during normal operations of the device. Based on the control signal, the orientation detector generates an orientation signal within the device. An analog or digital selector circuit connects the pins to correct internal circuit components according to the device orientation.

Abstract: A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals, the control signals, and the clock signal and generates a first mode detection signal in response to receipt of the memory address signals or a first combination of control signals. An first mode initiation signal is generated a time delay subsequent to the detection signal to initiate the first mode memory access operation. In response to receipt of a second combination of control signals and an active clock signal, the memory access mode detection circuit further generates a second mode detection signal to initiate a second mode memory access operation and to suppress generation of the first mode detection signal, thereby canceling the first mode memory access operation.

Abstract: In one embodiment, a first node comprises at least one memory request source and a node controller coupled to the memory request source. The node controller comprises a remote hit predictor configured to predict a second node to have a coherent copy of a block addressed by a memory request generated by the memory request source, and the node controller is configured to issued a speculative probe to the second node responsive to the prediction and to the memory request.

Abstract: A computer-readable storage medium having computer-readable code embodied thereon including: program code for restricting access, by a file system running on a host system, to a restricted area of a storage area of a storage device; and program code for enabling at least one application to access the restricted area via the file system. Preferably, the computer-readable code further includes: program code for enabling the storage device to copy data from a non-restricted area to the restricted area. Preferably, the computer-readable code further includes: program code for directing the storage device to route host-system read-requests, directed to addresses in the restricted area, to addresses in a non-restricted area. Preferably, the computer-readable code further includes: program code for applying access commands of the host system to restricted data residing in the restricted area when the host system requests access to non-restricted data addressed to a non-restricted area.

Abstract: Aspects of the invention relate to sharing content stored on an object addressable storage (OAS) system among a plurality of users of the OAS system and authenticating users to an OAS system. In some embodiments, a user may store content units on the OAS system and control access by other users to these content units. In some embodiments, when a user grants one or more other users access to a content unit stored on the OAS system, the OAS system may send a notification of grant of access to the other user(s).

Abstract: A container file system is built on a sparse metavolume for enhanced decoupling of logical storage from physical storage and for providing common supplementary storage services for iSCSI block access and for NFS or CIFS file system access. The container file system contains a production file system or iSCSI LUN and may also contain snapshot copies of the production file system or iSCSI LUN. The container file system manages storage space among the production file system or iSCSI LUN and its snapshot copies, and also improves fault containment. The sparse metavolume provides thin provisioning of the container file system. A slice map indicates whether or not each slice of logical storage in the sparse metavolume is provisioned with an associated configured slice of data storage.

Abstract: A drive device capable of preventing a drop in the data transfer rate, even when write instructions from a host device are given with commands having a short write data length. If the write end address of one of a plurality of ATA commands issued by a host device 2 is consecutive with the write start address of the next ATA command, a command analysis unit 11 has data writing to an SD card 1 by the consecutive commands performed in a single process. As a result, overheads when writing data to SD cards are incurred only once, allowing the transfer rate to be improved.

Abstract: An information processing system having a storage apparatus and a file sharing server. The storage apparatus comprises a plurality of storage devices for providing logical devices to store data; and a first processing unit for providing virtual logical units based on a mapping relation between the logical devices and the virtual logical units and being operative to switch the mapping relation dynamically according to an external request. The file sharing server comprises a cache memory including cache extents and a second processing unit controlled to provide the virtual logical units of the storage apparatus to a host system by using the cache extents, managing the mapping relation between the logical devices and the virtual logical units. The mapping between a logical unit and a logical device is dynamically switched as the logical devices store data provided from the host system according to external requests.

Abstract: Methods and structures for dynamic density control to improve reliability of a dynamically mapped storage device. In a dynamically mapped storage device in which all user supplied logical blocks are dynamically mapped by the storage device controller to physical disk blocks, features and aspects hereof provide for dynamically altering the recording density of user data stored on the storage device. So long as the physical capacity utilization of the storage device permits, new data stored on the device may be stored at lower density to improve reliability in reading back the recorded data. Further features and aspects hereof may reduce the recording density only for data deemed to be critical. Radial (track) density, longitudinal (bit) density, or both may be dynamically controlled to reduce recording density. As physical capacity utilization increases, data previously recorded at lower density may be migrated (re-recorded) at normal higher density.

Abstract: Described is a high speed nonvolatile memory device and technology that includes a controller coupled via interfaces to sets of nonvolatile storage, such as separate flash memory chips or separate regions of a single chip. The controller includes logic that processes write requests of arbitrary size, by interleaving writes among the interfaces, including by parallel writing among the interfaces. For example, the data may be received via direct memory access (DMA) transfers. The controller maintains information to allow the interleaved data to be reassembled into its correct relative locations when read back, such as by DMA. The high speed nonvolatile memory device thus provides a hardware device and software solution that allows a personal computer to rapidly boot or resume from a reduced power state such as hibernation. The high speed nonvolatile memory device also may be used for other data storage purposes, such as caching and file storage.

Abstract: Handling a write operation to write data to a section of a storage device includes determining if the section needs to be copied to at least a first target device and, if the section of the storage device needs to be copied to the at least first target device, providing the data to a memory location and confirming completion of the write operation prior to copying the section of the storage device to the at least first target device. Handling a write operation to write data to a section of a storage device may also include determining if a slot in a cache memory corresponding to the section of the storage device needs to be copied to at least a second target device. If so, then in some cases the slot may be copied to the at least second target device prior to providing the data to the memory location.

Abstract: Methods and structures for writing thermal lead-in sequences to provide head stability in a dynamically mapped storage device. In a dynamically mapped storage device in which all user supplied logical blocks are dynamically mapped by the storage device controller to physical disk blocks, features and aspects hereof provide writing thermal lead-in sequences to allow the write head to stabilize. As the write head begins writing a sequence of data to the recordable media, the write head may not have a desired thermal stability. Thus, there may be thermal flux with some of the data, affecting the reliability of the data. Mapping features and aspects hereof allow the write head to write a thermal lead-in sequence of data that does not destroy valuable data, allowing the write head to begin writing before stabilizing. Writing the thermal lead-in sequence will cause the write head to warm up and become stable, and thus be ready to write valid data.

Abstract: Provided are a method, system, and program for migrating source data to target data. A write request is received to write application data to source data not yet migrated to the target data. Information is generated for the write request indicating the source data to which the application data is written. The application data is written to the source data. A request is received to migrate source data to target data and indication is returned to retry the request to migrate in response to determining that the requested source data to migrate overlaps source data indicated in the generated information for one write request.

Abstract: A memory administrating method of administrating a memory divided into plural regions each of which consists of consecutive memory addresses, where the method includes the steps of: providing each region of the plural regions with usage information; and when releasing a release target region currently in use, determining usage of the release target region based on the usage information of at least one of neighboring regions positioned before and after the release target region.