Abstract: This organic EL element has two blue light emitting units, and has, in the emission spectrum thereof, one or two peak wavelengths in a blue light wavelength range of 440 nm-490 nm. In this organic EL element, the correlated color temperature of white light is 3300K or greater, R6 is 60 or greater, and R12 is 30 or greater.

Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.

Abstract: An integrated electronic component for broadband biasing that includes a monolithic substrate, a capacitor structure arranged in a trench network that extends into the substrate, and a continuous track of an electrically conducting material arranged in a crater that is formed in the substrate. The continuous track has one or several turns that have decreasing turn sections, and that are supported by a slanted peripheral wall of the crater for forming an inductor.

Abstract: The present disclosure relates to a solid-state imaging element configured to inhibit an adverse effect, which is attributable to a light shielding film formed for disposing an OPB region, on the formation of a constituent other than the light shielding film of the solid-state imaging element, and an electronic device. According to a first aspect of the present disclosure, there is provided a solid-state imaging element, including: an effective pixel region in which a large number of pixels are vertically and horizontally arranged; and an OPB region formed by coating pixels around the effective pixel region with a light shielding film. Corners on at least one of an outer circumferential side and an inner circumferential side of the OPB region are formed into an arc shape. The present disclosure can be applied to, for example, a back-surface irradiation type CMOS image sensor.

Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.

Abstract: A device may include a semiconductor-on-insulator (SOI) structure that may include a substrate, an insulator layer over the substrate, and a semiconductor layer over the insulator layer. The semiconductor layer may include a first conductivity region and a second conductivity region at least partially arranged within the semiconductor layer. The device may further include a gate structure arranged over the semiconductor layer and between the first conductivity region and the second conductivity region; a first conductor element arranged through the semiconductor layer and the insulator layer of the SOI structure to electrically contact the substrate; a second conductor element arranged to electrically contact the gate structure; and a conducting member connecting the first conductor element and the second conductor element to electrically couple the first conductor element and the second conductor element.

Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer mounted on a motherboard. The semiconductor package also includes a hole in motherboard (HiMB) that is formed in the motherboard. The semiconductor package has one or more capacitors mounted on an electrical shield. The electrical shield may be embedded in the HiMB of the motherboard. Accordingly, the semiconductor package has capacitors vertically embedded between the electrical shield and the HiMB of the motherboard. The semiconductor package may also have one or more HiMB sidewalls formed on the HiMB, where each of the one or more HiMB sidewalls includes at least one or more plated through holes (PTHs) with an exposed layer. The PTHs may be electrically coupled to the capacitors as the capacitors are vertically embedded between the electrical shield sidewalls and the HiMB sidewalls (i.e., three-dimensional (3D) capacitors).

Abstract: The present technology relates to a semiconductor device, a manufacturing method of a semiconductor device, an integrated substrate, and an electronic device capable of improving moisture resistance of the semiconductor device. The semiconductor device includes a semiconductor chip and a protective member which is a transparent member having moisture resistance and covers at least one of a first surface perpendicular to a side surface of the semiconductor chip or a second surface opposite to the first surface and the side surfaces. The electronic device includes the semiconductor device and the signal processing unit. The present technology is applied to, for example, an imaging element and an electronic device including an imaging element.

Abstract: An OLED display panel and a manufacturing method of the OLED display panel are provided. A light-transmissive hole is in the OLED display panel, a blocking wall is arranged outside some sub-pixel regions around the light-transmissive hole, and a thin-film encapsulation layer is on the blocking wall. A portion of light emitted from the sub-pixel regions inside the blocking wall is reflected at an interface of the thin film encapsulation layer by total internal reflection to cause a bright light spot, so that an image can also be displayed in the light-transmissive hole. Therefore, an opening for an under-screen camera less affects aesthetics and appearance integrity of the OLED display panel.

Abstract: The disclosure discloses a display panel. The display panel includes an optical assembly, a blue-light OLED light source assembly, a red-light OLED light source assembly and a green-light OLED light source assembly, and the optical assembly includes a beam splitting prism. The blue-light OLED light source assembly, the red-light OLED light source assembly and the green-light OLED light source assembly are arranged at three sides of the beam splitting prism, respectively. And blue light emitted by the blue-light OLED light source assembly, red light emitted by the red-light OLED light source assembly and green light emitted by the green-light OLED light source assembly are emitted through the optical assembly. The disclosure also discloses a display device and a head-mounted display device.

Abstract: A fan-out sensor package includes: a substrate in which a through-hole is formed and portions of a wiring layer are exposed from an insulating layer; an image sensor having an active surface having a sensing region disposed below the through-hole of the substrate and connection pads disposed in the vicinity of the sensing region; an optical member disposed on the active surface of the image sensor; a dam member disposed in the vicinity of the sensing region; and an encapsulant encapsulating the substrate and the image sensor, wherein the third wiring layer and the connection pads are electrically connected to each other by connection members.

Abstract: Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate, and forming a gate structure between the source/drain regions. The gate structure includes a gate dielectric layer over the substrate, a work function tuning layer over the gate dielectric layer, a first metal over the work function tuning layer, an adhesion layer over the first metal, and a second metal over the adhesion layer. In some embodiments, the adhesion layer can include an alloy of the first and second metals, and may be formed by annealing the first and second metals. In other embodiments, the adhesion layer can include an oxide of at least one of the first and/or second metal, and may be formed at least in part by exposing the first metal to an oxygen-containing plasma or to a natural environment.

Abstract: A light source that includes an LED light source, and one or more encapsulants containing a light-absorbing component that absorbs light in the wavelength range of about 415 nm to about 435 nm and can include at least one phosphor that can provide an LED light source that emits white light having a reduced amount of blue light or even toxic blue light with minimal effect on color characteristics such as correlated color temperature (CCT), color gamut, and luminance.

Abstract: A method includes forming a first region including a pair of first FinFETs and a second region including a pair of second FinFETs on a substrate. Each FinFET includes a metal gate having a first spacer adjacent thereto, and each first FinFET has a gate dielectric that is thicker than a gate dielectric of each second FinFET, such that the first FinFETs can be higher voltage input/output devices. The method forms a first contact between the metal gates of the pair of first FinFETs with a second spacer thereabout, the second spacer contacting a portion of each first spacer. The second spacer thus has a portion extending parallel to the metal gates, and a portion extending perpendicular to the metal gates. A second contact is formed between the metal gates of the pair of second FinFETs, and the second contact devoid of the second spacer.

Abstract: A semiconductor device is provided, including: a semiconductor substrate; a transistor section provided in the semiconductor substrate; and a diode section provided in the semiconductor substrate being adjacent to the transistor section, wherein the diode section includes: a second conductivity-type anode region; a first conductivity-type drift region; a first conductivity-type cathode region; a plurality of dummy trench portions arrayed along a predetermined array direction; a contact portion provided along an extending direction of the plurality of dummy trench portions that is different from the array direction; and a lower-surface side semiconductor region provided directly below a portion of the contact portion at an outer end in the extending direction.

Abstract: A photosensitive resin composition includes: a) an acryl-based copolymer obtained by copolymerizing i) a hydroxyl group-containing unsaturated compound; ii) an unsaturated carboxylic acid, an unsaturated carboxylic anhydride, or a mixture thereof; iii) an epoxy group-containing unsaturated compound; and iv) an olefin-based unsaturated compound, b) a 1,2-quinonediazide 5-sulfonic ester compound having a phenol compound including a compound represented by the above Chemical Formula A as ballast, c) a silane coupling agent, and d) a solvent.

Abstract: A vertical memory device includes: a substrate including a memory cell region and a contact region; a plurality of gate electrodes that extend from the memory cell region to the contact region and include pad portions which are end portions stacked in a step shape in the contact region; a plurality of contact plugs coupled to the pad portions of the gate electrodes; and a plurality of supporters formed below the pad portions of the gate electrodes.

Abstract: A light-emitting device includes a plurality of organic EL elements. Each of the organic EL elements includes a reflection electrode, a hole transport region, an electron-trapping luminescent layer, and a light extraction electrode in this order. The hole transport region has a sheet resistance of 4.0×107 ?/sq. or more at a current of 0.1 nA/pixel, and the total thickness of the hole transport region and the electron-trapping luminescent layer is equivalent to an optical path length enabling emission from the electron-trapping luminescent layer to be enhanced.

Abstract: The photodiode device comprises a substrate (1) of semiconductor material with a main surface (10), a plurality of doped wells (3) of a first type of conductivity, which are spaced apart at the main surface (10), and a guard ring (7) comprising a doped region of a second type of conductivity, which is opposite to the first type of conductivity. The guard ring (7) surrounds an area of the main surface (10) including the plurality of doped wells (3) without dividing this area. Conductor tracks (4) are electrically connected with the doped wells (3), which are thus interconnected, and further conductor tracks (5) are electrically connected with a region of the second type of conductivity. A doped surface region (2) of the second type of conductivity is present at the main surface (10) and covers the entire area between the guard ring (7) and the doped wells (3).

Abstract: A Schottky diode device includes a substrate having a first conductivity type, a first well region having a second conductivity type disposed in the substrate, and a first doped region having the second conductivity type in the first well region, wherein the first doped region includes a first portion and a second portion, and the first portion and the second portion have different doping concentrations. The first portion includes a region having at least four sides, from a top-view perspective, abutting the second portion.