Abstract: A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; and polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval.

Abstract: Embodiments relate to mass-transfer methods useful for fabricating products containing Light Emitting Diode (LED) structures. LED arrays are transferred from a source substrate to a target substrate by beam-assisted release (BAR) of a plurality of LED devices in a high-speed flexible manner. The BAR mass-transfer approach is also able to utilize a Known Good Die (KGD) data file of the source substrate to transfer only functionally good die and avoid rework and yield losses.

Abstract: An organic light emitting diode display includes a substrate, a plurality of pixels disposed on the substrate, a plurality of transmissive windows spaced apart from the pixels, and a light blocking member disposed between one of the pixels and one of the transmissive windows. The pixels display an image, and light is transmitted through the transmissive windows. Each pixel includes a transistor including a plurality of electrode members disposed in different layers on the substrate. The light blocking member includes a plurality of light blocking sub-members respectively disposed in the same layers as the plurality of electrode members.

Abstract: A method includes mounting a light emitting device on a board having electrodes on its surface, disposing a resin sheet containing a light conversion material so as to face the surface of the board and filling a space between the resin sheet and the board with a first light transmissive resin, covering a surface of the resin sheet opposite to a surface of the resin sheet covered with the first light transmissive resin, with a second light transmissive resin, forming a groove extending from a top surface of the second light transmissive resin to the board, filling the groove with light reflective resin and covering the top surface of the second light transmissive resin with the light reflective resin, removing the light reflective resin, and dicing the light emitting device by cutting along the light reflective resin.

Abstract: A method of forming an HBT structure includes forming an HBT epitaxial layer structure over a first substrate wafer; performing a first substrate transfer of the HBT epitaxial layer structure and the first substrate wafer onto a second substrate wafer, including inverting the HBT epitaxial layer structure and the first substrate wafer; removing the first substrate wafer; forming a first subcollector metal layer over the HBT epitaxial layer structure; performing a second substrate transfer of the subcollector metal layer and the HBT epitaxial layer structure onto a third substrate wafer with a second subcollector metal layer, including inverting the subcollector metal layer and the epitaxial layer structure; compression bonding the first and second subcollector metal layers to provide a bonded subcollector metal layer; and removing the second substrate wafer. The HBT structure includes the third substrate wafer, the bonded subcollector metal layer, and the HBT epitaxial layer structure.

Abstract: A light-emitting diode (LED) package includes a light-emitting structure, a transmissive material layer on the light-emitting structure, and a support structure covering at least a portion of a side surface of the transmissive material layer, a side surface of the light-emitting structure, and at least a portion of a bottom surface of the light-emitting structure.

Abstract: Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a gate material, an insulative material, and a sacrificial material. The sacrificial material is removed from the FET and charge storage transistor gate stacks. The insulative material of the FET gate stacks is etched through. A conductive material is formed over the FET gate stacks and over the charge storage transistor gate stacks. The conductive material physically contacts the gate material of the FET gate stacks, and is separated from the gate material of the charge storage transistor gate stacks by the insulative material remaining in the charge storage transistor gate stacks. Some embodiments include gate structures.

Abstract: An optoelectronic device comprising a unit, which unit comprises: a plurality of resiliently flexible sheet components bonded together, the resiliently flexible sheet components comprising: (i) a first sheet component comprising at least a stack of layers defining an array of pixel electrodes and electrical circuitry for independently addressing each pixel electrodes via addressing conductors outside the array of pixel electrodes; and (ii) a second sheet component bonded to a top surface of the first sheet component; wherein the device further comprises one or more driver chips bonded to the first sheet component in a location underlying the second component and for electrical contact between said addressing conductors and terminals of said one or more driver chips; and wherein the thickness of material in the unit in the region of the one or more driver chips is substantially the same as the thickness of material in the unit in the region of the array.

Abstract: A light source that includes an LED light source, and one or more encapsulants containing a light-absorbing component that absorbs light in the wavelength range of about 415 nm to about 435 nm and can include at least one phosphor that can provide an LED light source that emits white light having a reduced amount of blue light or even toxic blue light with minimal effect on color characteristics such as correlated color temperature (CCT), color gamut, and luminance.

Abstract: A semiconductor device that includes a plurality of word lines disposed on a substrate in which p-type and n-type active regions are defined, and extends in a first direction. A plurality of bit lines is disposed on the plurality of word lines and extends in a second direction, perpendicular to the first direction. A plurality of memory cells is disposed between the plurality of word lines and the plurality of bit lines and each includes a data storage pattern. The plurality of memory cells includes a plurality of dummy memory cells and a plurality of main memory cells. An upper surface of the data storage pattern of the main memory cells is higher than an upper surface of the data storage pattern of the dummy memory cells.

Abstract: A switching device including a GaN substrate; an unintentionally doped GaN layer on a first surface of the GaN substrate; a regrown unintentionally doped GaN layer on the unintentionally doped GaN layer; a regrowth interface between the unintentionally doped GaN layer and the regrown unintentionally doped GaN layer; a p-GaN layer on the regrown unintentionally doped GaN layer; a first electrode on the p-GaN layer; and a second electrode on a second surface of the GaN substrate.

Abstract: Light emitting diodes, components, and related methods, with improved performance over existing light emitting diodes. In some embodiments, light emitter devices included herein include a submount, a light emitter, a light affecting material, and a wavelength conversion component. Wavelength conversion components provided herein include a transparent substrate having an upper surface and a lower surface, and a phosphor compound disposed on the upper surface or lower surface, wherein the wavelength conversion component is configured to alter a wavelength of a light emitted from a light source when positioned proximate to the light source.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first conductive feature over a substrate. The method also includes forming an insulating layer over the substrate and covering the first conductive feature. The method also includes forming a first opening in the insulating layer to expose the first conductive feature. The method also includes recessing the exposed first conductive feature through the first opening, so as to form a second opening in the first conductive feature and below the first opening. The method also includes filling the first opening and the second opening with a second conductive feature.

Abstract: A unit lead frame includes a periphery structure, a die paddle inside of the periphery structure, a plurality of leads extending between the periphery structure and the die paddle, and trenches or grooves extending from an outer surface of the periphery structure and configured to guide liquefied molding material onto the periphery structure along sidewalls of the trenches or grooves.

Abstract: A polarization field assisted DUV-LED including a bottom substrate and a n-contact/injection layer formed on the bottom substrate. The n-contact/injection layer includes: a first region for accommodating strain relaxation; a second region for lateral access with a low sheet resistance and higher conductivity compared to the first region to minimize resistive losses and heat generation; and a third region of a graded vertical injection layer with low vertical resistance to minimize heat loss due to vertical resistance. The DUV-LED also includes a p-contact region, and an emitting active region between the n-contact/injection layer and the p-contact region. The injection of electrons and holes into quantum wells proceeds due to tunneling of electrons and holes under the barriers due to less than 2 nm thickness of barriers. This carrier injection lowers the Turn ON voltage of LEDs and reduces heat generation.

Abstract: A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a boron containing free layer (FL) is subjected to a plasma treatment with inert gas, and a natural oxidation (NOX) process to form B2O3 before overlying layers are deposited. A metal layer such as Mg is deposited on the FL as a first step in forming a Hk enhancing layer that increases FL perpendicular magnetic anisotropy, or as a first step in forming a tunnel barrier layer on the FL. One or more anneal steps are essential in assisting B2O3 segregation from the free layer and thereby increasing the FL magnetic moment. A post-oxidation plasma treatment may also be used to partially remove B2O3 proximate to the FL top surface before the metal layer is deposited. Both plasma treatments use low power (<50 Watts) to remove a maximum of 2 Angstroms FL thickness.

Abstract: A fin-type field effect transistor including a substrate, insulators, a gate stack, a first spacer, a second spacer, and a third spacer is described. The substrate has fins thereon. The insulators are located over the substrate and between the fins. The gate stack is located over the fins and over the insulators. The first spacer is located over the sidewall of the gate stack. The second spacer is located over the first spacer. The first spacer and the second spacer includes carbon. The third spacer is located between the first spacer and the second spacer.

Abstract: Provided is an organic light emitting device including a cathode; an anode provided opposite to the cathode; a light emitting layer provided between the cathode and the anode; and an organic material layer provided between the cathode and the light emitting layer, and including Compound (A) including a heteroatom and a cyano group, wherein Compound (A) satisfies Equation 1 and Equation 2: |PElCN|?3debye??Equation 1 wherein: |PElCN| means an absolute value of a dipole moment of Compound (A); ? P EI C ? N ? ? P EI ? > ? Ea EI CN ? ? Ea EI ? Equation ? ? 2 wherein: |PElCN| means an absolute value of a dipole moment of Compound (A); |PEl| means an absolute value of a dipole moment of a compound having the same core as the compound of |PElCN| without including a cyano group; |EaElCN| means an absolute value of electron affinity of Compound (A); and |EaEl| means an absolute value of electron affinity of a compound having the same core as the compound of |EaElC

Abstract: A semiconductor device includes a fin-type pattern extending in a first direction, a device isolation film surrounding the fin-type pattern, while exposing an upper portion of the fin-type pattern, a gate electrode extending on the device isolation film and the fin-type pattern in a second direction intersecting the first direction, a gate isolation film isolating the gate electrode in the second direction, and including a first material and on the device isolation film, an interlayer insulating film filling a side surface of the fin-type pattern and including a second material different from the first material.

Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.