Patents Examined by Steven J. Mottola
  • Patent number: 11183984
    Abstract: Variable-phase amplifier circuits and devices. In some embodiments, an amplifier can include a variable-gain stage having a plurality of switchable amplification branches, with each being capable of being activated, such that a combination of one or more activated amplification branches provides respective gain level and phase shift. The plurality of switchable amplification branches can be configured such that the phase shift provided by each combination of one or more activated amplification branches compensates for a phase shift associated with the amplifier operating with the respective gain level of the variable-gain stage.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: November 23, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho
  • Patent number: 11171617
    Abstract: A power amplifying device according to an embodiment includes first to fourth BTL amplifiers and first to third switch circuits. The first to fourth BTL amplifiers outputs a first to fourth output signal. The first switch circuit is turned on or off connection between an output of the second output amplifier and an output of the third output amplifier. The second switch circuit is turned on or off connection between an output of the fifth output amplifier and an output of the eighth output amplifier. The third switch circuit is turned on or off connection between an output of the fourth output amplifier and an output of the seventh output amplifier. The first to third switch circuits are turned on when the amplitudes of the first to fourth input signals are smaller than a first threshold.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: November 9, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices and Storage Corporation
    Inventors: Akira Yamauchi, Hiroyuki Tsurumi
  • Patent number: 11171612
    Abstract: A gain modulation circuit includes a load circuit, a differential circuit, a current source, a resistor, a first transistor, and a detector circuit. The load circuit is configured to receive a supply voltage. The differential circuit is coupled to the load circuit. The differential circuit and the load circuit are configured to generate a pair of output voltages according to a pair of input voltages and the supply voltage. The current source is coupled to the differential circuit. The resistor is coupled to the differential circuit and the current source. The first transistor is coupled to the differential circuit. The detector circuit is configured to generate a detection signal according to the pair of input voltages. A turned-on degree of the first transistor is adjusted based on the detection signal, to adjust a linear region of the gain modulation circuit.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: November 9, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Jun Yang, Wei-Xiong He, Jian Liu
  • Patent number: 11165394
    Abstract: The disclosure provides an improved transimpedance amplifier (TIA) that can operate at a higher bandwidth and lower noise compared to conventional TIAs. The TIA employs a data path with both feedback impedance and feedback capacitance for improved performance. The feedback impedance includes at least two resistors in series and at least one shunt capacitor, coupled between the at least two resistors, that helps to extend the circuit bandwidth and improve SNR at the same time. The capacitance value of the shunt capacitor can be selected based on both the bandwidth and noise. In one example, the TIA includes: (1) a biasing path, and (2) a data path, coupled to the biasing path, including multiple inverter stages and at least one feedback capacitance coupled across an even number of the multiple inverter stages. An optical receiver and a circuit having the TIA are also disclosed.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: November 2, 2021
    Assignee: Nvidia Corporation
    Inventors: Sanquan Song, John Poulton, Carl Thomas Gray
  • Patent number: 11159134
    Abstract: A multiple-stage amplifier includes a driver stage transistor characterized by a first power density, and a final stage transistor characterized by a second power density that is larger than the first power density. A first drain bias circuit is coupled to a first drain terminal of the driver stage transistor, and is configured to provide a first drain bias voltage to the first drain terminal. A second drain bias circuit is coupled to a second drain terminal of the final stage transistor, and is configured to provide a second drain bias voltage to the second drain terminal, where the second drain bias voltage equals the first drain bias voltage. An interstage impedance matching circuit is coupled between the first drain terminal and a gate terminal of the final stage transistor. The multiple-stage amplifier may be included in a Doherty power amplifier, a transceiver, and/or a transceiver array.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: October 26, 2021
    Inventors: Margaret A. Szymanowski, Monte Gene Miller
  • Patent number: 11159136
    Abstract: A variable gain amplifier (VGA) is provided. The VGA includes at least one amplifier circuit, at least one current-steering circuit and at least one bias voltage circuit. Each current-steering circuit is coupled to its corresponding amplifier circuit. Each bias voltage circuit is coupled to its corresponding current-steering circuit to provide a positive bias voltage to each current-steering circuit.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: October 26, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jeng-Han Tsai, Yi-Tso Cheng, Wei-Tsung Li
  • Patent number: 11152900
    Abstract: A multistage amplifier includes: N amplifiers (N?2), a (k+1)th amplifier cascaded to a kth amplifier (1?k?N?1), and each amplifier being configured to amplify a multicarrier signal; and an extraction circuit including an input and an output, the input being connected to an output of a jth amplifier (1?j?N?1), and the output providing a compensation signal to an input of a (j+1)th amplifier or an output of the (j+1)th amplifier. The extraction circuit includes a filter circuit connected to the output of the jth amplifier that extracts a distortion frequency component of n times a differential frequency f2?f1 (n?1), a phase shifter cascaded to the filter circuit that shifts a phase of the component, and a gain adjustment circuit cascaded to the phase shifter that adjusts an amplitude of the component and generates the compensation signal.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: October 19, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Tatsuya Hashinaga
  • Patent number: 11152901
    Abstract: An instrumentation amplifier including a pair of input amplifiers, each including an input transistor and a feedback current amplifier configured to amplify and feedback an error current from the input transistor. The arrangement can enable a current efficient solution where the amplifier can operate with very low input signals that are close to, or potentially below ground, without requiring a negative power supply voltage.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: October 19, 2021
    Assignee: Analog Devices, Inc.
    Inventor: Michael J. Guidry
  • Patent number: 11152894
    Abstract: Methods for operating amplifiers and related devices. In some embodiments, a method for amplifying a signal can include partially amplifying a signal with a common amplification stage. The method can further include providing a bias signal to a selected one of a plurality of dedicated amplification stages each coupled to the common amplification stage and including an output node, such that the selected dedicated amplification stage further amplifies the partially amplified signal and provides the further amplified signal at the respective output node.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: October 19, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Christophe M. Joly, Xiaodong Xu, Eric Joseph Lai
  • Patent number: 11152905
    Abstract: An amplifier includes a first coil coupled to at least one input node. The amplifier further includes second and third coils. A first terminal of the second coil is coupled to a source terminal of a first transistor, while a second terminal of the second coil is coupled to a source terminal of a second transistor. A third coil includes first and second terminals coupled to gate terminals of the first and second transistors, respectively. Responsive to receiving an input signal, the first coil electromagnetically conveys the signal to the second and third coils.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: October 19, 2021
    Assignee: Apple Inc.
    Inventors: Song Hu, Sohrab Emami-Neyestanak
  • Patent number: 11139783
    Abstract: A circuit structure for improving the harmonic suppression capability of a radio frequency power amplifier includes an output stage unit, a high-order harmonic suppression unit, and a low-order harmonic suppression unit. The output stage unit outputs a signal to be subjected to harmonic suppression; the high-order harmonic suppression unit comprises a first filter capacitor and a back hole, and is used for suppressing fifth or higher harmonics; the output stage unit and the first filter capacitor are connected to the ground in series by means of the back hole; the low-order harmonic suppression unit is connected to the output stage unit to suppress second, third and fourth harmonics. According to the design, the high-harmonic suppression capability of the radio frequency power amplifier is improved.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: October 5, 2021
    Assignee: LANSUS TECHNOLOGIES INC
    Inventors: Jiahui Zhou, Bin Hu, Jiashuai Guo, Kai Xuan, Hua Long
  • Patent number: 11133784
    Abstract: A method applied in a driving circuit is disclosed. The driving circuit is coupled between a voltage source and a load and configured to drive the load. The method includes: forming, by the driving circuit, a first current from the voltage source to the load; and forming, by the driving circuit, a second current from the load back to the voltage source.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: September 28, 2021
    Assignee: xMEMS Labs, Inc.
    Inventor: Jemm Yue Liang
  • Patent number: 11128273
    Abstract: A variable-gain amplifier includes two amplification and attenuation branches, and first and a second resistive elements that are coupled between the two branches. Each branch includes a voltage follower stage and a configurable amplification stage. The voltage follower stages are intended to receive a differential signal and are configured to deliver, via the first resistive element, an intermediate differential current signal. The amplification stages are intended to receive the intermediate differential current signal and a digital control word, and are configured to deliver, via the second resistive element, an output differential voltage signal depending on the value of the digital control word.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: September 21, 2021
    Assignee: STMicroelectronics SA
    Inventor: Renald Boulestin
  • Patent number: 11121683
    Abstract: A radio-frequency circuit includes a power amplifier circuit, a first switch, a duplexer, a second switch, a capacitor element, and a controller. The first switch includes a first common terminal and first selection terminals. An output signal of the power amplifier circuit is applied to the first common terminal. The duplexer is a filter connected at one terminal to the first selection terminal. The second switch includes a second common terminal and plural second selection terminals. The plural second selection terminals includes the second selection terminal connected to the other terminal of the duplexer. The capacitor element is built in the first switch. The controller controls the gain of the power amplifier circuit in accordance with a monitor signal obtained via the capacitor element so as to regulate the maximum output level of the power amplifier circuit.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: September 14, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takahisa Toyomura
  • Patent number: 11114990
    Abstract: An envelope stacking power amplifier system reduces current for a given output power level without sacrificing the ability to support large voltage swings at saturation and therefore increases efficiency at the maximum linear operating power and all power levels below that. The system includes a stack/unstack controller including circuitry configured to switch the RF power amplifier system between a stacked mode in which first and second RF amplifiers are coupled in a stacked configuration and an unstacked mode in which the first and second RF amplifiers are coupled in an unstacked configuration in response to one or more mode-control signals, the stacked configuration providing reduced current compared to the unstacked configuration.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: September 7, 2021
    Assignee: Anokiwave, Inc.
    Inventors: Susanne Paul, Akhil Garlapati, Yan Li
  • Patent number: 11114986
    Abstract: A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: September 7, 2021
    Assignee: Omni Design Technologies Inc.
    Inventor: Hae-Seung Lee
  • Patent number: 11114989
    Abstract: A power amplifying circuit includes an amplifier that amplifies a radio-frequency signal and a bypass capacitor section connected to a power supply terminal for supplying a power supply voltage to the amplifier. The bypass capacitor section includes a first capacitor, a second capacitor, and a first switch circuit. The first capacitor includes a first end connected to a power supply path, and a second end. The second capacitor includes a first end connected to the second end of the first capacitor and a second end connected to ground. The first switch circuit includes a first terminal connected to the second end of the first capacitor and the first end of the second capacitor, and a second terminal connected to the ground. The first switch circuit switches between connection and non-connection between the second end of the first capacitor and the ground.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: September 7, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Goto, Hideyuki Satou, Satoshi Tanaka
  • Patent number: 11114991
    Abstract: An analog front-end (AFE) circuit for conditioning a sensor signal is disclosed. The AFE circuit includes a first stage configured to amplify and filter the sensor signal. The first stage comprises a biquadratic filter comprising a first plurality of DC-coupled transconductance amplifiers. The AFE further includes a second stage configured to further amplify and filter the amplified sensor signal, and to compensate a direct current (DC) offset of the first stage. The second stage comprises a second plurality of AC-coupled transconductance amplifiers. Each transconductance amplifier of the first plurality and of the second plurality has a programmable transconductance and comprises a plurality of subthreshold-biased transistors.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: September 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Sudipto Chakraborty, Rajiv Joshi
  • Patent number: 11114988
    Abstract: In a Doherty amplifier, outputs of first (main) and second (peak) transistors are connected by a combined impedance inverter and harmonic termination circuit. The harmonic termination circuit incorporates a predetermined part of the impedance inverter, and provides a harmonic load impedance at a targeted harmonic frequency (e.g., the second harmonic). Control of the amplitude and phase of the harmonic load impedance facilitates shaping of the drain current and voltage waveforms to maximize gain and efficiency, while maintaining a good load modulation at a fundamental frequency. Particularly for Group III nitride semiconductors, such as GaN, both harmonic control and output impedance matching circuits may be eliminated from the outputs of each transistor. The combined impedance inverter and harmonic termination circuit reduces the amplifier circuit footprint, for high integration and low power consumption.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: September 7, 2021
    Assignee: Cree, Inc.
    Inventors: Jangheon Kim, Sonoko Aristud, Michael E. Watts, Mario Bokatius
  • Patent number: 11108366
    Abstract: An amplifier circuit includes an output terminal, an amplification unit and a switch. The output terminal is used to output an amplification signal. The amplification unit includes a first transistor and a second transistor. The first transistor includes a control terminal for receiving a first input signal, a first terminal coupled to the output terminal for outputting an amplified first input signal, and a second terminal. The second transistor includes a control terminal for receiving a second input signal, a first terminal coupled to the output terminal for outputting an amplified second input signal, and a second terminal. The switch includes a first terminal coupled to the second terminal of the first transistor, and a second terminal. The amplification signal is generated using at least the amplified first input signal and/or the amplified second input signal.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: August 31, 2021
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Ching-Wen Hsu