Patents Examined by Suberr L Chi
  • Patent number: 11411043
    Abstract: Phosphor-converted LED side reflectors disclosed herein comprise pigments that are photochemically stable under illumination by light from the pcLED. The pigments absorb light in at least a portion of the spectrum of light emitted by the first phosphor converted LED. The side reflector may also comprise light scattering particles or air voids. The pigments, light scattering particles, or air voids may be homogeneously distributed in the reflector. Alternatively the side reflector may be layered, with the pigments, light scattering particles, or air voids inhomogeneously distributed in the reflector. The side reflector can include phosphor particles.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: August 9, 2022
    Assignee: Lumileds LLC
    Inventors: Grigoriy Basin, Kentaro Shimizu, Brendan Moran, Emma Dohner, Noad Shapiro, Marcel Bohmer
  • Patent number: 11411040
    Abstract: Methods of fabricating multicolor, stacked detector devices and focal plane arrays are disclosed. In one embodiment, a method of fabricating a stacked multicolor device includes forming a first detector by depositing a first detector structure on a first detector substrate, and depositing a first ground plane on the first detector structure, wherein the first ground plane is transmissive to radiation in a predetermined spectral band. The method further includes bonding an optical carrier wafer to the first ground plane, removing the first detector substrate, and forming a second detector. The second detector is formed by depositing a second detector structure on a second detector substrate, and depositing a second ground plane on the second detector structure. The method further includes depositing a dielectric layer on one of the first detector structure and the second ground plane, bonding the first detector to the second detector, and removing the second detector substrate.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: August 9, 2022
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventors: Yajun Wei, Daniel Chmielewski, Nansheng Tang, Darrel Endres, Michael Garter, Mark Greiner
  • Patent number: 11404411
    Abstract: A semiconductor device may have a semiconductor substrate. The semiconductor substrate may include an IGBT region that overlaps with a collector region and a diode region that overlaps with a cathode region. The semiconductor substrate may include a drift region distributed across the IGBT region and the diode region, a body region, a body contact region, and an emitter region arranged in the IGBT region, and an anode region and an anode contact region arranged in the diode region. The body region may include a first body region and a second body region having a p-type impurity density lower than any of that in the first body region and that in the anode region. The second body region may be adjacent to the anode region. The first body region may be adjacent to the second body region at an opposite side from the anode region.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: August 2, 2022
    Assignee: DENSO CORPORATION
    Inventor: Fumikazu Niwa
  • Patent number: 11404591
    Abstract: An infrared detector and a method for forming it are provided. The detector includes absorber, barrier, and contact regions. The absorber region includes a first semiconductor material, with a first lattice constant, that produces charge carriers in response to infrared light. The barrier region is disposed on the absorber region and comprises a superlatice that includes (i) first barrier region layers comprising the first semiconductor material, and (ii) second barrier region layers comprising a second semiconductor material, different from, but lattice matched to, the first semiconductor material. The first and second barrier region layers are alternatingly arranged. The contact region is disposed on the barrier region and comprises a superlattice that includes (i) first contact region layers comprising the first semiconductor material, and (ii) second contact region layers comprising the second semiconductor material layer. The first and second contact region layers are alternatingly arranged.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: August 2, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Edward H. Aifer, Jerry R. Meyer, Chadwick Lawrence Canedy, Igor Vurgaftman, Jill A. Nolde
  • Patent number: 11394014
    Abstract: A display unit having a function of sensing light is provided. The display unit includes a first and second light-emitting devices, a light-receiving device, and a light-blocking layer. The first and second light-emitting devices emit a first color. The light enters the light-receiving device through a first opening of the light-blocking layer. In a top view, |a?b| of a difference between the shortest distance a from the first light-emitting device to the light-receiving device and the shortest distance b from the second light-emitting device to the light-receiving device is smaller than |c?d| of a difference between the shortest distance c from the first light-emitting device to the first opening and the shortest distance d from the second light-emitting device to the first opening. In the top view, c is shorter than d. Alternatively, a light-emitting and light-receiving device can be used.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: July 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kubota, Ryo Hatsumi, Ryo Yamauchi
  • Patent number: 11387288
    Abstract: An organic light-emitting display device includes a pixel area and a transmitting area adjacent to the pixel area. The organic light-emitting display device includes an organic light-emitting diode, a driving power wiring, and a heating pattern adjacent to the driving power wiring. The organic light-emitting diode includes a first electrode disposed in the pixel area, an organic light-emitting layer disposed on the first electrode and a second electrode disposed on the organic light-emitting layer. The driving power wiring is electrically connected to the second electrode. A portion of the organic light-emitting layer is disposed in the transmitting area. The organic light-emitting layer includes an opening area overlapping the heating pattern and at least a portion of the driving power wiring. The second electrode electrically contacts the driving power wiring through the opening area.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: July 12, 2022
    Inventors: Seung Chan Lee, Dong Hwan Shim, Yoo Min Ko, Sung Jin Hong, Gun Hee Kim
  • Patent number: 11387320
    Abstract: Techniques are disclosed for forming transistor devices having source and drain regions with high concentrations of boron doped germanium. In some embodiments, an in situ boron doped germanium, or alternatively, boron doped silicon germanium capped with a heavily boron doped germanium layer, are provided using selective epitaxial deposition in the source and drain regions and their corresponding tip regions. In some such cases, germanium concentration can be, for example, in excess of 50 atomic % and up to 100 atomic %, and the boron concentration can be, for instance, in excess of 1E20 cm?3. A buffer providing graded germanium and/or boron concentrations can be used to better interface disparate layers. The concentration of boron doped in the germanium at the epi-metal interface effectively lowers parasitic resistance without degrading tip abruptness. The techniques can be embodied, for instance, in planar or non-planar transistor devices.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Anand S. Murthy, Glenn A. Glass, Tahir Ghani, Ravi Pillarisetty, Niloy Mukherjee, Jack T. Kavalieros, Roza Kotlyar, Willy Rachmady, Mark Y. Liu
  • Patent number: 11380613
    Abstract: An integrated circuit (IC) package is described. The IC package includes a die, having a pad layer structure on back-end-of-line layers on a substrate. The die also includes a metallization routing layer on the pad layer structure, and a first under bump metallization layer on the metallization routing layer. The IC package also includes a patterned seed layer on a surface of the die to contact the first under bump metallization layer. The IC package further includes a first package bump on the first under bump metallization layer.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: July 5, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Yue Li, Li-Sheng Weng, Yangyang Sun
  • Patent number: 11380720
    Abstract: Provided are an array substrate, a manufacturing method therefor, a display panel and a display device. The array substrate includes: a photosensitive member and a thin film transistor that are located on a base substrate, the photosensitive member including a photosensitive layer; the thin film transistor is located at a side of the photosensitive member that is far from the base substrate. In the described array substrate, the photosensitive member is formed first, and then the thin film transistor is formed on the photosensitive member, which prevents the element hydrogen from influencing the thin film transistor when forming the photosensitive member, while source and drain layer patterns of the thin film transistor may be formed by means of one-time pattern processing, thus simplifying the manufacturing process.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: July 5, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Wei Liu
  • Patent number: 11367747
    Abstract: Monolithic pixel detectors, systems and methods for the detection and imaging of electromagnetic radiation with high spectral and spatial resolution comprise a Si wafer with a CMOS processed pixel readout bonded to an absorber wafer in wafer bonds comprising conducting bonds between doped, highly conducting charge collectors in the readout and highly conducting regions in the absorber wafer and poorly conducting bonds between regions of high resistivity.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: June 21, 2022
    Inventor: Hans Von Känel
  • Patent number: 11362212
    Abstract: A structure includes a transistor including a first source/drain region, a source/drain contact plug over and electrically coupling to the first source/drain region, and a via over and contacting the source/drain contact plug. The via has a bottom portion having a first length, and an upper portion having a second length. The first length is greater than the second length. Both of the first length and the second length are measured in a same direction parallel to a top surface of the source/drain contact plug.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: June 14, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mrunal A Khaderbad, Keng-Chu Lin, Sung-Li Wang
  • Patent number: 11362292
    Abstract: A flexible display device of which esthetic appearance is improved by reducing a bezel is disclosed. The flexible display device comprises a substrate including a display area and a non-display area including a bending area; a link line in the non-display area on the substrate; and a bending connection line in the bending area pf the substrate and connected with the link line, and the bending connection line located between a first buffer layer and a second buffer layer of the flexible display device.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: June 14, 2022
    Assignee: LG Display Co., Ltd.
    Inventors: Saemleenuri Lee, SeYeoul Kwon, Dojin Kim
  • Patent number: 11362233
    Abstract: An electrical readout optical sensor, includes a back metal electrode layer, a semiconductor layer, and a metal or metalloid layer; wherein the semiconductor layer is a main body portion and is divided into a first surface and a second surface; the first surface is provided with a groove structure, and forms a grating; the back metal electrode layer covers the second surface of the semiconductor layer; the metal or metalloid layer covers the first surface of the semiconductor layer, and forms a phototube for generating a photocurrent signal having a wide wavelength range and high linearity. An optical sensing structure of narrowband light absorption and a photoelectric conversion structure having a wide wavelength range are directly integrated, and the portable high-precision optical sensing ability is implemented by means of an output mode of a photocurrent.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: June 14, 2022
    Assignee: JINAN UNIVERSITY
    Inventors: Long Wen, Qin Chen, Baojun Li
  • Patent number: 11355632
    Abstract: A semiconductor structure includes a substrate having a top surface, pillar structures formed on top of the substrate, a gate conductor, a drain/source region and a source/drain region. Each pillar structure of the pillar structures includes a first end and a second end, and the first end is closer to the substrate than the second end. The gate conductor surrounds each of the pillar structures disposed between the first end and the second end. The drain/source region is at the top surface of the substrate and in contact with the first end of a first pillar structure of the pillar structures, and the source/drain region is at the top surface of the substrate and in contact with the first end of a second pillar structure of the pillar structures.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: June 7, 2022
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventor: Qing Liu
  • Patent number: 11355671
    Abstract: A ring-shaped LED lamp, including at least three LED chips and at least three pins partially located within a package body. The LED chips are connected in series and have two terminal ends connected to form a closed loop, and the pins are led out from connections between the LED chips. A lamp string includes at least one group of lamps and electrically conductive wires connected to multiple lamps, and each group of lamps includes a plurality of the above-described ring-shaped lamps. Also provided is a control circuit applicable for the lamp string. The control circuit includes an input device, a microprocessor, an output circuit, and a lamp string interface connected to the output circuit. The microprocessor receives a signal from the input device, and sends an I/O signal or PWM signal to the output circuit to trigger a voltage level change of the lamp string interface.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: June 7, 2022
    Inventor: Tit Tsang Chong
  • Patent number: 11349043
    Abstract: The disclosure is related to the technical field of semiconductors, and provides a method for manufacturing a tilted mesa and a method for manufacturing a detector. The method for manufacturing a tilted mesa comprises: coating a photoresist layer on a mesa region of a chip; heating the chip on which the photoresist layer is coated from a first preset temperature to a second preset temperature; performing etching processing on the heated chip, so as to manufacture a mesa having a preset tilting angle; and removing the photoresist layer on the mesa region of the chip after the mesa is manufactured.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: May 31, 2022
    Assignee: The 13th Research Institute of China Electronics Technology Group Corporation
    Inventors: Xingye Zhou, Zhihong Feng, Yuanjie Lv, Xin Tan, Xubo Song, Jia Li, Yulong Fang, Yuangang Wang
  • Patent number: 11348993
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The flexible substrate includes a first bending region and a side region connected to the first bending region. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. A ratio of a total width of the metal portion disposed in the first bending region to a total width of the metal portion disposed in the side region is in a range from 0.8 to 1.2, and a length of one of the openings in the first bending region is less than or equal to a length of one of the openings in the side region.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: May 31, 2022
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Patent number: 11335744
    Abstract: An array substrate, a display panel, and a display apparatus. The array substrate includes a base substrate; a first electrode layer formed on the base substrate; a light emitting layer formed on the first electrode layer and including a non-transparent first light emitting region, a second light emitting region, and a transparent third light emitting region; and a second electrode layer formed on the light emitting layer. The first light emitting region includes first light emitting structures. The second light emitting region includes second light emitting structures. The third light emitting region includes third light emitting structures. The second light emitting region is located between the first light emitting region and the third light emitting region. A distribution density of first light emitting structures, a distribution density of second light emitting structures, and a distribution density of third light emitting structures are gradually changed in sequence.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 17, 2022
    Assignee: Yungu (Gu'an) Technology Co., Ltd.
    Inventors: Rusheng Liu, Junhui Lou, Lu Zhang, Jie Sun, Meng Zhang
  • Patent number: 11309245
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a plurality of contacts, a plurality of plugs positioned above the plurality of contacts, a plurality of metal spacers positioned above the plurality of plugs; and a plurality of air gaps respectively positioned between the plurality of metal spacers.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: April 19, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Kuo-Hui Su
  • Patent number: 11302849
    Abstract: Phosphor-converted LED side reflectors disclosed herein comprise pigments that are photochemically stable under illumination by light from the pcLED. The pigments absorb light in at least a portion of the spectrum of light emitted by the first phosphor converted LED. The side reflector may also comprise light scattering particles and/or air voids. The pigments, light scattering particles and/or air voids may be homogeneously distributed in the reflector. Alternatively the side reflector may be layered, with the pigments, light scattering particles and/or air voids inhomogeneously distributed in the reflector. The side reflector may comprise phosphor particles.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 12, 2022
    Assignee: Lumileds LLC
    Inventors: Grigoriy Basin, Kentaro Shimizu, Brendan Moran, Emma Dohner, Noad Shapiro, Marcel Bohmer