Patents Examined by Suresh Memula
  • Patent number: 11171933
    Abstract: The following description is directed to a logic repository service. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic of the configurable hardware. The method can include generating the configuration data for the configurable hardware. The configuration data can include data for implementing the application logic. The method can include encrypting the configuration data to generate encrypted configuration data. The method can include signing the encrypted configuration data using a private key. The method can include transmitting the signed encrypted configuration data in response to the request.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: November 9, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Islam Mohamed Hatem Abdulfattah Mohamed Atta, Christopher Joseph Pettey, Nafea Bshara, Asif Khan, Mark Bradley Davis, Prateek Tandon
  • Patent number: 11157671
    Abstract: A method of checking equivalence between a first design comprising a shift register logic SRL chain and a second design comprising a memory block. The method comprises identifying an inductive invariant to replace the SRL chain or the memory block, and replacing the SRL chain and the memory block by a set of constraints, wherein the set of constraints state that the SRL chain and the memory block are equivalent for the checking of equivalence between the first design and the second design.
    Type: Grant
    Filed: July 3, 2020
    Date of Patent: October 26, 2021
    Assignee: OneSpin Solutions GmbH
    Inventors: Peter Warkentin, Arun Chandrasekharan, Tobias Welp
  • Patent number: 11155178
    Abstract: A power-feed connector disconnection device includes an index value detector, a starting intention determiner, and a lock-releasing unit. The index value detector detects an index value that correlates with a starting intention of a driver to start a vehicle when a power-feed connector is coupled to a power-receiving connector of the vehicle. The starting intention determiner determines a presence or absence of the starting intention of the driver based on the index value detected by the index value detector when the power-feed connector is coupled to the power-receiving connector of the vehicle. The lock-releasing unit is provided in the power-receiving connector and releases a lock between the power-receiving connector and the power-feed connector when the starting intention determiner determines that the driver has the starting intention.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: October 26, 2021
    Assignee: SUBARU CORPORATION
    Inventor: Yosuke Ohtomo
  • Patent number: 11159063
    Abstract: In accordance with an embodiment, a wireless power transmitter includes a charging surface, a transmitting antenna configured to generate an electromagnetic field extending above the charging surface, a sensing array disposed between the transmitting antenna and the charging surface, and a controller coupled to the sensing array. The sensing array includes a plurality of sensors. Each sensor of the plurality of sensors is configured to generate a respective signal indicative of a strength of the electromagnetic field. The controller is configured to detect a presence of a metallic object, other than a receiving antenna of a power receiver, in the electromagnetic field based on the respective signal generated by one or more sensors of the plurality of sensors.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: October 26, 2021
    Assignee: Spark Connected LLC
    Inventors: Petru Emanuel Stingu, Kenneth Moore
  • Patent number: 11149461
    Abstract: Charging device of hybrid or electric vehicles in an automated parking, said device (10) comprising: —a column (100) substantially developing vertically; —a current socket (110) positioned in substantial correspondence of a first terminal portion of the said column (100), and—a supporting element (130) of the said column (100), substantially developing along a direction which is orthogonal respective to the direction defined by said column (100), wherein: —said device (10) of recharge comprises a recess or profile (135) suitable for allowing the introduction of a tooth of a carriage for moving vehicles; —a plurality of electric contacts (195), each of which is cabled with a respective electric contact of the said current socket (110), wherein said plurality of electric contacts (195) is positioned in correspondence of a second terminal portion of the said column (100) opposed respective to said first terminal portion of the said column (100); —said electric contacts (195) being electrically disengaged in case
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: October 19, 2021
    Assignee: SOTEFIN PATENTS SA
    Inventor: Giovanni Valli
  • Patent number: 11139671
    Abstract: The present invention relates to a wireless charging system including a boost converter and a transmission coil structure at a transmission side. The wireless charging system includes a boost converter 150 configured to boost a first DC voltage input to an input terminal to a second DC voltage, a DC/AC inverter 160 configured to receive the boosted second DC voltage from the boost converter to convert the received second DC voltage to AC power, and a transmission coil structure 170 which is electrically connected to the DC/AC inverter to generate a temporally variable magnetic field for wireless supplying from the AC power. The first DC voltage and the second DC voltage of the boost converter 150 may be maintained to predetermined fixed values. The transmission coil structure 170 is formed by winding a wire on a magnetic sheet many times in a spiral shape and the winding coil has a circular shape having predetermined inner radius and outer radius, a pitch, and the turn number.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: October 5, 2021
    Assignee: 3M Innovative Properties Company
    Inventors: Jinwook Kim, Seung Youb Oh, In-Hwan Lee
  • Patent number: 11126775
    Abstract: An IC device includes a gate structure including an isolation layer laterally adjacent to a gate electrode, a transistor including a first S/D structure, a second S/D structure, and a channel extending through the gate electrode, a third S/D structure overlying the first S/D structure, a fourth S/D structure overlying the second S/D structure, and a conductive structure overlying the isolation layer and configured to electrically connect the third S/D structure to the fourth S/D structure.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: September 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Wei Peng, Guo-Huei Wu, Wei-Cheng Lin, Hui-Zhong Zhuang, Jiann-Tyng Tzeng
  • Patent number: 11117480
    Abstract: When DC charging is completed, an ECU of a vehicle performs first diagnosis processing for diagnosing whether or not charge relays have stuck with an SMR being closed. In the first diagnosis processing, whether or not the charge relays have stuck is diagnosed based on an open/close command to the charge relays and a voltage applied to a charge port. When both of the charge relays are determined as having stuck in the first diagnosis processing, the ECU performs second diagnosis processing on the assumption that a DC power feed facility falls under a specific DC power feed facility. In the second diagnosis processing, whether or not the charge relays have stuck is diagnosed based on the open/close command to the charge relays, the voltage applied to the charge port (a first voltage), and a voltage (a second voltage) between a first power line and a second power line.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: September 14, 2021
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Shingo Yumoto, Koichi Kojima, Yamato Niwa
  • Patent number: 11110816
    Abstract: A condition-based maintenance method is provided for a primary electrical system of a vehicle. The method includes obtaining a plurality of expected parametric values representing a state-of-health (SOH) of the primary electrical system of the vehicle; starting a series of operations to exercise a plurality of operating modes of the vehicle; continuously reading a plurality of voltage values from a battery voltage output of a diagnostic connector of the vehicle, performing analysis on the plurality of voltages values to generate current parametric values of SOH of the primary electrical system; based on comparison between the expected parametric values and the current parametric values, determining whether a condition-based maintenance is required; and, after determining that a condition-based maintenance is required, present a maintenance alert to an operator of the vehicle.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: September 7, 2021
    Inventor: Guy Thomas Rini
  • Patent number: 11113444
    Abstract: Electronic design automation (EDA) of the present disclosure, in various embodiments, optimizes designing, simulating, analyzing, and verifying of electronic circuitry for an electronic device. The electronic device includes scan flip-flops to autonomously test the electronic circuitry for various manufacturing faults. The EDA of the present disclosure statistically groups the scan flip-flops into scan chains in such a manner such that scan flip-flops within each scan chain share similar characteristics, parameters, or attributes. Thereafter, the EDA of the present disclosure intelligently arranges ordering for the scan flip-flops within each of the scan chains to optimize power, performance, and/or area of the electronic circuitry.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: September 7, 2021
    Inventors: Sandeep Kumar Goel, Yun-Han Lee, Vinay Kotha, Ankita Patidar
  • Patent number: 11110814
    Abstract: A charging device for electric vehicles, with multiple charging points, to each of which an electric vehicle can be connected, and with multiple power electronics units each providing a maximum charging power, and a method for charging an electric vehicle.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: September 7, 2021
    Assignee: AUDI AG
    Inventor: Roman Straßer
  • Patent number: 11080455
    Abstract: A method includes generating an integrated circuit (IC) layout design and manufacturing an IC based on the IC layout design. Generating the IC layout design includes generating a pattern of a first shallow trench isolation (STI) region and a pattern of a through substrate via (TSV) region within the first STI region; a pattern of a second STI region surrounding the first STI region, the second STI region includes a first and second layout region, the second layout region being separated from the first STI region by the first layout region, first active regions of a group of dummy devices being defined within the first layout region, and second active regions of a group of active devices being defined within the second layout region; and patterns of first gates of the group of dummy devices in the first layout region, each of the first active regions having substantially identical dimension in a first direction.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: August 3, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chia Hu, Ming-Fa Chen, Sen-Bor Jan, Meng-Wei Chiang
  • Patent number: 11075547
    Abstract: A coil module is disposed inside an electronic apparatus and receives prescribed power. The coil module includes a loop coil, a plate-like magnetic body that is disposed on the loop coil, and a conductive member that has prescribed conductivity and is disposed parallel with the plate-like magnetic body and on a surface, opposite to a surface on which the loop coil is disposed, of the magnetic body. The conductive member projects outward relative to at least a portion of a circumferential surface of the magnetic body.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: July 27, 2021
    Assignee: Sovereign Peak Ventures, LLC
    Inventors: Takanori Hirobe, Yoshio Koyanagi, Hiroyuki Uejima
  • Patent number: 11074380
    Abstract: The following description is directed to a logic repository service. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic of the configurable hardware. The method can include generating the configuration data for the configurable hardware. The configuration data can include data for implementing the application logic. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The method can include transmitting the configuration data to the host server computer in response to the second request so that the configurable hardware is configured with the host logic and the application logic.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: July 27, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Islam Mohamed Hatem Abdulfattah Mohamed Atta
  • Patent number: 11068637
    Abstract: Systems and methods for context aware circuit design are described herein. A method includes: identifying at least one cell to be designed into a circuit; identifying at least one context parameter having an impact to layout dependent effect of the circuit; generating, for each cell and for each context parameter, a plurality of abutment environments associated with the cell; estimating, for each cell and each context parameter, a sensitivity of at least one electrical property of the cell to the context parameter by generating a plurality of electrical property values of the cell under the plurality of abutment environments; and determining whether each context parameter is a key context parameter for a static analysis of the circuit, based on the sensitivity of the at least one electrical property of each cell and based on at least one predetermined threshold.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: July 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Chung Hsu, Yen-Pin Chen, Sung-Yen Yeh, Jerry Chang-Jui Kao, Chung-Hsing Wang
  • Patent number: 11068636
    Abstract: A design method for a semiconductor package including a first chip, a second chip, a 2.5 dimensional (2.5D) interposer, a package substrate, and a board includes generating a layout including the 2.5D interposer on the package substrate and the first and second chips individually arranged on the 2.5D interposer, based on design information; analyzing signal integrity and power integrity between the first and second chips from the layout; analyzing signal integrity or power integrity between the first chip and at least one third chip on the board from the layout; and determining whether to modify the layout based on the analysis results.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: July 20, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoonjae Hwang, Sungwook Moon
  • Patent number: 11055464
    Abstract: A method includes receiving a pattern layout for a mask, shrinking the pattern layout to form a shrunk pattern, determining centerlines for each of a plurality of features within the shrunk pattern, and snapping the centerline for each of the plurality of features to a grid. The grid represents a minimum resolution size of a mask fabrication tool. The method further includes, after snapping the centerline for each of the plurality of features to the grid, fabricating the mask with the shrunk pattern.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: July 6, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Ta Lu, Chi-Ming Tsai
  • Patent number: 11057026
    Abstract: A semi-dynamic flip-flop includes a semiconductor substrate, first through fourth power rails, and at least one clock gate line. The first through fourth power rails are disposed on the semiconductor substrate, extend in a first direction, and are arranged sequentially in a second direction substantially perpendicular to the first direction. The at least one clock gate line is disposed on the semiconductor substrate, and extends in the second direction to pass through at least two regions among a first region between the first power rail and the second power rail, a second region between the second power rail and the third power rail, and a third region between the third power rail and the fourth power rail. The at least one clock gate line receives an input clock signal.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: July 6, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jongkyu Ryu, Minsu Kim, Ahreum Kim, Daeseong Lee, Hyun Lee
  • Patent number: 11048851
    Abstract: A stretchable electronics generating apparatus and layout method thereof are provided. The layout method includes: establishing a layout database, wherein the layout database recodes a plurality of layout selection information respectively corresponding to a plurality of strain/stress information; detecting a layout target area to obtain a strain/stress distribution status of the layout target area; generating a wire routing information according to the strain/stress distribution status based on the layout database; and transporting the wire routing information to a manufacture device of the conductive wires for disposing a plurality of physical conductive wires on the layout target area by the manufacture device.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: June 29, 2021
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Ta Pan, Hung-Hsien Ko, Cheng-Chung Lee, Chang-Ying Chen, Wen-Yung Yeh
  • Patent number: 11042981
    Abstract: In one embodiment, a computing system may access design data of a printed circuit board to be produced by a first manufacturing process. The system may analyze the design data of the printed circuit board using a machine-learning model, wherein the machine-learning model is trained based on X-ray inspection data associated with the first manufacturing process. The system may automatically determine one or more corrections for the design data of the printed circuit board based on the analysis result by the machine-learning model.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: June 22, 2021
    Assignee: SVXR, Inc.
    Inventors: David Lewis Adler, Freddie Erich Babian, Scott Joseph Jewler