Patents Examined by T. Dinh
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Patent number: 12154629Abstract: A multi-time programmable non-volatile memory cell includes: a deep N-well, and first, second, third P-wells or a first N-well located in parallel to each other in the deep N-well, where a control capacitor and a tunneling capacitor are located in the first P-well and the second P-well, respectively, and each of the control capacitor and the tunneling capacitor includes one or two N-type coupling regions in the P-well; one floating-gate transistor is located in the third P-well or the first N-well, the floating-gate transistor including a polysilicon floating gate and its underlying gate oxide; and the floating gate of the floating-gate transistor and its gate oxide extend along a direction perpendicular to the parallel P-wells to cover the control capacitor and the tunneling capacitor, respectively forming an upper plate and a gate oxide of the control capacitor and the tunneling capacitor.Type: GrantFiled: March 20, 2023Date of Patent: November 26, 2024Assignee: CHENGDU ANALOG CIRCUIT TECHNOLOGY INC.Inventors: Dan Ning, Yulong Wang
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Patent number: 12154891Abstract: The subject technology is related to autonomous vehicles (AV) and, in particular, to an autonomous driver system controller (ADSC) that is fixed to the AV. The AV comprises an electronic drivetrain configured to move the AV; and an autonomous driver system controller (ADSC) fixed to an interior surface of the AV and configured to control the electronic drivetrain with a processor connected to a plurality of memory integrated circuits (IC) that are fixed to a printed circuit board (PCB). The plurality of memory ICs are mounted on each side of the PCB using a ball grid array (BGA) with a column of pins in the BGA of a top-surface memory IC is longitudinally aligned with a corresponding column of pins in the BGA of a bottom-surface memory IC.Type: GrantFiled: July 1, 2022Date of Patent: November 26, 2024Assignee: GM CRUISE HOLDINGS LLCInventor: Ajith Sreenilayam
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Patent number: 12154997Abstract: The invention relates to a thin film solar module comprising a monolithic solar cell array (1), including a plurality of solar cells (2) with a layer structure, comprising a rear contact layer (3), a front contact layer (4) and an absorber layer between the rear contact layer and the front contact layer, and an electrical connection structure (6) for electrically serially connecting neighbouring solar cells. The invention also relates to an associated production method. In the thin film solar module according to the invention, the electrical connection structure includes contact strips (7) for electrically serially connecting neighbouring solar cells, wherein the electrical connection structure electrically serially connects two respective solar cells (2m, 2m+1) that are adjacent to one another in a series connection direction (RS) via one or more contact strips (7).Type: GrantFiled: March 18, 2021Date of Patent: November 26, 2024Assignee: First Solar, Inc.Inventors: Rolf Wächter, Tobias Repmann, Bernd Sprecher
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Patent number: 12155350Abstract: A solar power generation system includes a string, an inverter a first shut-off device, and a second shut-off device. The string includes a plurality of solar cell module groups connected in series with each other. The first shut-off device connected to a first electric path connecting between the plurality of solar cell module groups. The second shut-off device connected to a second electric path connecting between the plurality of solar cell module groups. The first shut-off device cuts off a connection between the plurality of solar cell module groups connected to the first electric path in response to a first control signal from the inverter. The second shut-off device cuts off a connection between the solar cell module groups connected to the second electric path in response to a second control signal output from the first shut-off device by a communication system different from power line communication.Type: GrantFiled: February 8, 2023Date of Patent: November 26, 2024Assignee: OMRON CORPORATIONInventors: Takahiro Takeyama, Ryo Ogura, Jeongho Baik, Jun Nakaichi, Tsuyoshi Uchida, Tomoko Endo, Erica Martin
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Patent number: 12148482Abstract: A semiconductor memory device includes first and second memory cell transistors between first and second select transistors, third and fourth memory cell transistors between third and fourth select transistors, a first word line for first and third memory cell transistors, a second word line for second and fourth memory cell transistors, first to fourth selection gate lines respectively for first through fourth select transistors, a bit line, and a source line. During a read operation, while a voltage applied to the second word line is boosted, voltages applied to the first word line and the third and fourth selection gate line are also boosted, after which the voltage applied to the first word line is lowered, and the third and fourth selection gate lines are discharged. After the time the third and fourth selection gate lines are discharged, voltages applied to the bit line and the source line are boosted.Type: GrantFiled: July 7, 2023Date of Patent: November 19, 2024Assignee: Kioxia CorporationInventor: Takeshi Hioka
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Patent number: 12149195Abstract: The concepts described herein provide a method, apparatus, and system for controlling an inverter by modifying duty cycles of the PWM control signals in a manner that achieves a minimum duration between consecutive switching events in the inverter, which serves to reduce common mode current in the bearing(s) of an attached rotary electric machine. To minimize the effect of additional current and voltage ripple into the system, the minimum switching duration is defined in relation to a modulation index and geometric location near the sector boundaries of the respective inverter voltage space vector diagram.Type: GrantFiled: December 23, 2022Date of Patent: November 19, 2024Assignee: GM Global Technology Operations LLCInventors: Kerrie M. Spaven, Brent S. Gagas, Brian J. Gallert, Brian A. Welchko
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Patent number: 12145235Abstract: An alternating current power tool includes a function element, a brushless motor, and a motor control circuit. The motor control circuit includes a power module, a first rectifier circuit, a driver circuit, a controller, and a second rectifier circuit. The power module is used for receiving an alternating current. The first rectifier circuit is used for receiving the alternating current received by the power module and operatively outputting a direct current bus voltage. The second rectifier circuit is electrically connected to the power module and used for receiving the alternating current received and outputting a direct current to supply power to at least the controller.Type: GrantFiled: June 15, 2022Date of Patent: November 19, 2024Assignee: Nanjing Chervon Industry Co., Ltd.Inventors: Huaishu Wang, Tianxiao Xu
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Patent number: 12149201Abstract: A flat photovoltaic tile includes a shell made from plastic material and a photovoltaic element in a recess. The tile has front and rear faces, upstream and downstream edges, two right and left lateral edges. Overlapping portions ensure at least water-tightness against liquid water. The tile includes an electrical connection, the rear face including, towards the upstream edge, a tenon intended to hold the tile on a retaining device, in particular a batten. At the photovoltaic element, the tile includes, in its thickness, from the rear face towards the front face: a part of the shell a rear panel, a lower EVA film, a silicon photovoltaic conversion plate, an upper EVA film, and a tempered glass transparent layer, and, elsewhere, the tile includes, in its thickness, the plastic material of the shell.Type: GrantFiled: October 15, 2020Date of Patent: November 19, 2024Assignee: ONDULINEInventors: Jun Xiao, Junfeng Liu
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Patent number: 12148590Abstract: Solid-state circuit breakers and method of operating same are provided. A solid-state circuit breaker (SSCB) is configured to generate a first output representative of a current through a current path of the SSCB. An analog fault detection circuit is coupled with first output and is configured to assert a second output in response to the current exceeding a trip current level. At least one analog-to-digital converter (ADC) is configured to generate samples of the first output, where the at least one ADC has a di/dt detection bandwidth that is less than a di/dt detection bandwidth of the analog fault detection circuit. The SSCB is further configured to disable the current path through the SSCB in response to determining, asynchronously, that either the second output is being asserted by the analog fault detection circuit or the samples indicate that the current through the current path exceeds the trip current level.Type: GrantFiled: August 24, 2022Date of Patent: November 19, 2024Assignee: ABB Schweiz AGInventors: Rostan Rodrigues, Pietro Cairoli, Utkarsh Raheja
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Patent number: 12143042Abstract: An electrical system configured to control an electrically-excited electric motor, including: an inverter configured to supply alternating current (AC) electrical power to the electrically-excited electric motor; the electrically-excited electric motor, including: a rotor having a rotor winding; and a stator having a stator winding; the stator winding is electrically connected to the inverter and the rotor winding is electrically connected to the inverter such that the stator winding receives an electrical current from the inverter and supplies a direct current (DC) component to the rotor.Type: GrantFiled: July 29, 2021Date of Patent: November 12, 2024Assignee: BorgWarner Inc.Inventors: Gabriel Domingues, Tausif Husain
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Patent number: 12142912Abstract: A motor control method for coupled an electronic vehicle is provided. The motor controller controls a motor and is powered by a battery. The motor control method includes: when a main relay of the motor controller suddenly breaks contact, in a first phase, feeding back a surge current into the battery to suppress the surge current by a diode and a first current limit resistor of a first protecting circuit of the motor controller; and, in a second phase, conducting a discharge switch of a second protecting circuit of the motor controller by a control unit of the motor controller, and releasing the surge current to a reference voltage range by the discharge switch and a second current limit resistor of the second protecting circuit.Type: GrantFiled: December 27, 2022Date of Patent: November 12, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Nan-Hsiung Tseng, Bing-Ren Chen, Shin-Hung Chang, Chin-Hone Lin
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Patent number: 12143054Abstract: A motor unit comprises a driving circuit, a control unit, an analog-to-digital converter, a voltage divider, and a voltage converter. The driving circuit is coupled to a motor for driving the motor. The control unit is configured to generate a plurality of control signals to control the driving circuit. The analog-to-digital converter receives an output voltage for generating a digital signal to the control unit. The voltage divider receives an input voltage for generating a first voltage. The voltage converter converts a power supply voltage into the input voltage. The motor unit may execute a prevention mechanism to avoid misjudging the digital signal. The motor unit may be applied to a high-voltage configuration.Type: GrantFiled: November 14, 2021Date of Patent: November 12, 2024Assignee: Global Mixed-mode Technology Inc.Inventor: Chien-Lun Chu
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Patent number: 12136759Abstract: A semiconductor device has a PCB with an antenna and a semiconductor package mounted onto the PCB. An epoxy molding compound bump is formed or disposed over the PCB opposite the semiconductor package. A first shielding layer is formed over the PCB. A second shielding layer is formed over the semiconductor package. A board-to-board (B2B) connector is disposed on the PCB or as part of the semiconductor package. A conductive bump is disposed between the semiconductor package and PCB.Type: GrantFiled: October 29, 2021Date of Patent: November 5, 2024Assignee: STATS ChipPAC Pte. Ltd.Inventors: HunTeak Lee, KyoungHee Park, KyungHwan Kim, SeungHyun Lee, SangJun Park
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Patent number: 12136807Abstract: Systems and methods for providing locked rotor protection for powertrains of electric vehicles are provided. One method for operating an electric vehicle includes receiving a command for propelling the electric vehicle, driving an electric motor of the powertrain of the electric vehicle, and determining that the powertrain is obstructed. After determining that the powertrain is obstructed, an output is generated to initiate one or more actions intended to protect the powertrain.Type: GrantFiled: March 22, 2022Date of Patent: November 5, 2024Assignee: TAIGA MOTORS INC.Inventor: Gabriel Bernatchez
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Patent number: 12134546Abstract: A gantry drive system includes: a first motor configured to drive a driving object along a first axis; a second motor configured to drive the driving object along a second axis parallel with the first axis; and a motor control system configured to control the first and second motors. The motor control system includes a mode switch that performs a switching between a first control mode in which a position of the driving object on each of the first and second axes is individually controlled while reducing an inter-axis positional deviation between the first and second axes, and a second control mode in which a rotational state of the driving object is controlled while controlling a position of the driving object, based on detected positions of the driving object on the first and second axes.Type: GrantFiled: July 15, 2022Date of Patent: November 5, 2024Assignee: KABUSHIKI KAISHA YASKAWA DENKIInventors: Minoru Koga, Shota Kawahara, Junichi Ito
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Patent number: 12131778Abstract: Systems, methods, and apparatus to select an enhanced write pulse for a write operation in a memory device. In one approach, stronger reset pulses are triggered when there is an increased risk of memory cell threshold voltage degradation. Memory cells read by a relatively higher number of read operations are recorded by a controller of a memory device by updating a lookup table with addresses of the memory cells read. For a new write operation, the controller determines if a reset on set write operation is to be performed. The controller also searches the lookup table to determine if an address for the target bits or codeword of the write operation are in the lookup table. If both conditions are satisfied, then the magnitude of the write pulse is increased for programming the memory cells.Type: GrantFiled: August 25, 2022Date of Patent: October 29, 2024Assignee: Micron Technology, Inc.Inventors: Zhongyuan Lu, Robert John Gleixner
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Patent number: 12132126Abstract: Approaches for fabricating wire-based metallization for solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a back surface and an opposing light-receiving surface. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the back surface of the substrate. A conductive contact structure is disposed on the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal wires. Each metal wire of the plurality of metal wires is parallel along a first direction to form a one-dimensional layout of a metallization layer for the solar cell.Type: GrantFiled: June 9, 2022Date of Patent: October 29, 2024Assignee: Maxeon Solar Pte. Ltd.Inventors: Richard Hamilton Sewell, Robert Woehl, Jens Dirk Moschner, Nils-Peter Harder
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Patent number: 12131786Abstract: A memory cell array having rows and columns of memory cells with respective ones of the memory cells including spaced apart source and drain regions formed in a semiconductor substrate with a channel region extending there between, a floating gate over a first portion of the channel region, a select gate over a second portion of the channel region, and an erase gate over the source region. A strap region is disposed between first and second pluralities of the columns. For one memory cell row, a dummy floating gate is disposed in the strap region, an erase gate line electrically connects together the erase gates of the memory cells in the one row and in the first plurality of columns, wherein the erase gate line is aligned with the dummy floating gate with a row direction gap between the erase gate line and the dummy floating gate.Type: GrantFiled: January 31, 2023Date of Patent: October 29, 2024Assignee: Silicon Storage Technology, Inc.Inventors: Louisa Schneider, Xian Liu, Steven Lemke, Parviz Ghazavi, Jinho Kim, Henry A. Om'Mani, Hieu Van Tran, Nhan Do
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Patent number: 12131788Abstract: Methods, systems, and apparatuses include receiving a read command including a logical address. The read command is directed to a portion of memory composed of blocks and each block is composed of wordline groups. The physical address for the read command is identified using the logical address. The wordline group is determined using the physical address. A slope factor is retrieved using the wordline group. A read counter is incremented using the slope factor.Type: GrantFiled: August 25, 2022Date of Patent: October 29, 2024Assignee: MICRON TECHNOLOGY, INC.Inventors: Nicola Ciocchini, Animesh R. Chowdhury, Kishore Kumar Muchherla, Akira Goda, Jung Sheng Hoei, Niccolo' Righetti, Jonathan S. Parry
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Patent number: 12132304Abstract: An over-energy protection circuit, a residual current device, an electronic device, and a power distribution box. The protection circuit has relatively high operating reliability, and includes: a first over-energy absorption circuit, a second over-energy absorption circuit, and a residual current determining circuit. The first over-energy absorption circuit receives a first electrical signal output from a current transformer; and when a voltage value of the first electrical signal is greater than or equal to a first preset threshold, performs step-down processing on the first electrical signal to obtain a second electrical signal, and outputs the second electrical signal to the second over-energy absorption circuit; or when a voltage value of the first electrical signal is less than a first preset threshold, outputs the first electrical signal to the second over-energy absorption circuit.Type: GrantFiled: July 6, 2022Date of Patent: October 29, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Qingying Liu, Kui Li, Feng Niu, Zijian Xu, Chenyu Xie