Patents Examined by T. R. Sundaram
  • Patent number: 6528987
    Abstract: An operating circuit (1) for controlling the speed of a cooling fan motor (3) for computer cabinetry (7), and for determining an under-speed condition in the fan motor (3) comprises a control circuit (15) which controls a variable output signal generator circuit (18) for outputting a pulse width modulated signal corresponding to the desired fan speed for switching a switching circuit (8) in a power supply circuit of the fan motor (3) for pulse width modulating the power supply to the fan motor (3). A monitoring resistor (R1), a capacitor (C1) and a circuit (12) provides a tachometer signal to the operating circuit (1). A gate circuit (22) gates the second and fourth pulses of the tachometer signal to a counter (20) which counts clock pulses from a clock signal generating circuit (19) between the rising edges of the second and fourth pulses which are in turn stored in a register (23) for comparison with a reference count by a comparator (25).
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: March 4, 2003
    Assignee: Analog Devices, Inc.
    Inventors: John Blake, David Hanrahan, Kohji Yoshida
  • Patent number: 6525548
    Abstract: The present invention provides a check pattern for evaluating the result of via openings during fabrication of a semiconductor device. The check pattern uses a Wheatstone bridge circuit so as to eliminate any influence of variation of wiring resistance and/or contact resistance. In the bridge circuit, four terminals are provided, namely first, second, third and fourth terminals. Each of four sides of the bridge circuit is defined by connecting an upper conductor layer including one terminal, a sub-group of via openings belonging to one group, a lower conductor layer, the other sub-group of via openings belonging to the same group, and an upper conductor layer including another terminal.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: February 25, 2003
    Assignee: NEC Corporation
    Inventor: Nobuya Nishio
  • Patent number: 6522151
    Abstract: A circuit and method for connecting data lines in a digital communication system are disclosed. The circuit allows either a balanced data line or an unbalanced data line to be connected to a single input port with no internal reconfiguration of the system. Connection to a balanced data line isolation transformer is provided at the port. A separate connection to ground is provided at the same port. A user connects the system to a balanced data line using a jack wired for connecting the balanced data line pair across the isolation transformer. A user connects the system to an unbalanced data line using a similar jack; however, the jack in this case is wired to short one transformer connection to the ground connection provided at the port, thereby unbalancing the transformer. In one embodiment, this second jack is part of a patch cable that accepts a coaxial connector on. one end, appropriately wired to the shorted jack on the second end.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: February 18, 2003
    Assignee: Cisco Technology, Inc.
    Inventors: R. Ashby Armistead, David W. Metcalf, Danyang Raymond Zheng
  • Patent number: 6504375
    Abstract: An electrostatic voltmeter modulator for measuring an electrostatic field between the electrostatic voltmeter modulator and a surface includes a shield, a sensing electrode, and a layer disposed between the shield and sensing electrode. The antistatic coating substantially eliminates the accumulation of electrostatic charge on the layer such that the electrostatic field measured by electrostatic voltmeter modulator substantially equals the electrostatic field corresponding to electrostatic charge on the surface. The electrostatic voltmeter modulator can be used in electrostatic imaging apparatus.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: January 7, 2003
    Assignee: Xerox Corporation
    Inventors: Alan J. Werner, Jr., Bing R. Hsieh
  • Patent number: 6504376
    Abstract: Method and apparatus for modulating the vibrations of an object with a constant amplitude has a sensor, e.g., a piezoelectric transducer, for sensing the vibrations. A light source, e.g., an LED, receives the sensed signal and illuminates a light dependent resistor (LED) In turn, a control circuit controls the vibration amplitude in accordance with the LDR resistance. A full wave bridge rectifier can be used between the sensor and the LED.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: January 7, 2003
    Assignee: Xerox Corporation
    Inventor: Alan J. Werner, Jr.
  • Patent number: 6501282
    Abstract: A capacitance comparison circuit determines the relative value of two capacitors, such as may be sensor elements, by monitoring voltage changes caused by charge redistribution between the capacitors when they are series connected and then connected alternately in a first and second polarity across a voltage. The direction of change of voltage at the junction of the capacitors with respect to the switching of polarity of their connection precisely reveals which capacitor is larger. Disconnecting the voltage monitor during the switching reduces switching induced errors.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: December 31, 2002
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Ernst H Dummermuth, Patrick C Herbert, Steven M. Galecki
  • Patent number: 6496014
    Abstract: A probe for a cable tester having a first interface for connection to the cable tester; a second interface, connected to the first interface, for connection to a cable to be tested; and a memory, associated with the probe and accessible by the cable tester, storing configuration data associated with the probe.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: December 17, 2002
    Assignee: Agilent Technologies, Inc.
    Inventor: Ron D. Cook
  • Patent number: 6496023
    Abstract: A structure is provided such that a plural cantilevers are formed on a first board formed of silicon, probes are respectively formed on the individual cantilevers at positions each offset perpendicularly to a longitudinal center line of the cantilever, and wiring connected continuously from each probe to a secondary electrode pad portion through an insulating layer. A structure is alternatively adopted such that by using a both-ends supported beam formed of silicon as the beam, each probe is formed at a position offset toward a supported portion side of the both-ends supported beam.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: December 17, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanorr Aono, Ryuji Kohno, Toshio Miyatake, Hideyuki Aoki, Naoto Ban
  • Patent number: 6486678
    Abstract: The invention is of a method by which operating mechanical components of an electrical power distribution system may be evaluated to determine whether or not they exhibit operational characteristics which indicate sub-standard performance or imminent mechanical failure. Properly operating machines will produce “signatures” which are apparent from the measuring and depicting (graphically in most cases) of such parameters as decibel production over time, sound production in terms of frequency over time, and amplitude sound at different frequencies over time. A mechanical device which is malfunctioning to a greater than nominal degree will produce such signatures as are recognizably, and, in most cases, perceptively different through mere visual examination and comparison with normal signatures.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: November 26, 2002
    Inventor: Paul Spears
  • Patent number: 6486680
    Abstract: A capacitance measuring circuit having a sensor electrode and a reference electrode that are spaced apart so that a material can be positioned between the two electrodes. A first polarity and a second polarity voltage source are used to charge the sensor electrode and a switch controller controls the charging and discharging of a capacitor by the sensor electrode. The charge on the capacitor after being charged and at least partially discharged by the sensor electrode represents the capacitance between the sensor electrode and the reference electrode. The charge on the capacitor is used to measure the position of the material relative to the sensor and reference electrode. The measuring circuit also has a system parasitic controller to measure and adjust for system parasitic capacitance in the measuring circuit.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: November 26, 2002
    Assignee: The North American Manufacturing Company
    Inventor: Dennis Keith Mull
  • Patent number: 6483333
    Abstract: An automated multi-chip module (MCM) handler for automated module testing which employs a module feed employing a plurality of stackable magazines, the leading one of which in an input stack is positively displaced through an indexing device which positively retrieves each MCM, guides it at a test site, and positively ejects a tested MCM from the test site for sort and direction along an inclined track to either a shipping tray or a discard bin. After a magazine is emptied of MCMs, it continues to an output location where it is stacked with other empty magazines. The test site includes a mechanism for positively engaging and aligning each MCM before engagement by the test contacts. A particularly suitable magazine for use with the handler is also disclosed, as is a method of module handling.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: November 19, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Mark A. Tverdy, William C. Layer, Lothar R. Kress, Eric M. Matthews
  • Patent number: 6479980
    Abstract: The thin film spin probe is particularly suited for measurement of spin-polarized components which are parallel with or vertical to the surface of a specimen to be measured. A thin film 2 supporting another thin film of the active probing region is formed on substrate 1. The thin film 3 of the active probing region is formed on said thin film 2. A specified section of said substrate is then removed by selective etching.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: November 12, 2002
    Assignee: Agency of Industrial Science and Technology
    Inventor: Kazuhisa Sueoka
  • Patent number: 6472893
    Abstract: A test socket for testing a packaged semiconductor device. The test socket includes a test substrate, at least one support member, and at least one securing member. Terminals of the test substrate are electrically connectable to a testing device. The terminals may by located within recesses that are configured to receive leads. The shapes of each support member and securing member may be complementary to the respective shapes of the bottom and top surfaces of leads extending from the packaged semiconductor device. Upon placement of a packaged semiconductor device on the test substrate, the leads are aligned with and positioned against their corresponding terminals and the support member. The securing elements are then placed against the leads to bias each lead against its corresponding terminal.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: October 29, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Chris G. Martin, Manny Kin F. Ma
  • Patent number: 6469532
    Abstract: An interconnect apparatus for testing bare semiconductor dice comprises raised contact members on a semiconductive substrate. The contact members are covered with an insulation layer an a conductive cap connected by a conductive trace to a testing circuit. The trace is covered with coaxial layers of a silicon-containing insulation an a metal for shielding the trace from “crosstalk” and other interference. An apparatus for simultaneous testing of multiple dies on a wafer has thermal expansion characteristic matching those of the semiconductor die or wafer and provides clean signals.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: October 22, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, David R. Hembree, Alan G. Wood
  • Patent number: 6469520
    Abstract: A fully differential analogue circuit is tested by monitoring the currents in two branches when a common mode signal is applied and indicating correct operation if the two currents are correlated. A part of the circuit (T20,T21,S1,S2,S3,S4) is modified during test and currents through transistors (T20,T21) are monitored by means of a current mirror and current subtractor arrangement (T213,T214,T215,T216). A voltage (VRL) is produced that, with correlation of the currents, will be approximately mid way between the power supply rails and when mis-correlation occurs will tend to one of the supply rails. The voltage (VRL) is applied to a first amplifier (T219,T221) and to a second amplifier (T222,T223) having a different threshold value from the first amplifier. The outputs of the amplifiers will have opposite logic values if the voltage (VRL) lies between their threshold voltages and the EXOR gate 9 will give a logic 1 output indicating proper circuit function.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: October 22, 2002
    Assignee: Koninglijke Philips Electronics N.V.
    Inventor: Javier Arguelles-Paneda
  • Patent number: 6466001
    Abstract: A method and apparatus for controlling the level of molten metal in a mold for continuous casting by using a molten metal level control system incorporating a molten metal level controller in the control loop thereof, which comprises damping selectively the predetermined frequency of frequencies of periodical molten metal level fluctuations through a notch filter installed in the control loop. The control loop preferably includes the phase compensation calculation part for compensating the phase delay of the stopper opening position control signal for adjusting the amount of the molten metal to be fed to the mold. The control apparatus in the control loop comprises a molten metal level senser, an FFT analyzer, an automatic tuning device for dealing with the results of the FFT analysis, a molten metal level controller and a notch filter.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: October 15, 2002
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Kazuharu Hanazaki, Toshihiko Murakami, Masahiko Oka
  • Patent number: 6466038
    Abstract: A method for measuring electromigration includes the steps of measuring a corresponding voltage increase across an interconnect as a function of time for a plurality of nonzero heating rates and calculating an interconnect integrity from the voltage increase.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: October 15, 2002
    Assignee: LSI Logic Corporation
    Inventors: Senol Pekin, Sunil A. Patel
  • Patent number: 6466036
    Abstract: Pulse circuits for measuring the capacitance to ground of a plate may be used in control equipment to provide an indication of the proximity of a person or object to be sensed. Pulse circuits are disclosed that are made from sets of three or more electrical switching elements arranged so that each of the switching elements has one side electrically connected to either a supply voltage or to an electrical ground. These arrangements are compatible with existing integrated circuit fabrication technology. In addition, the circuitry can be configured as a proximity sensing switch that requires only a two wire connection to a host apparatus.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: October 15, 2002
    Inventor: Harald Philipp
  • Patent number: 6462562
    Abstract: A differential capacitance probe device for process control involving aqueous dielectric fluids is disclosed. The device contains a pair of matched capacitor probes configured in parallel, one immersed in a sealed container of reference fluid, and the other immersed in the process fluid. The sealed container holding the reference fluid is also immersed in the process fluid, hence both probes are operated at the same temperature. Signal conditioning measures the difference in capacitance between the reference probe and the process probe. The resulting signal is a control error signal that can be used to control the process.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: October 8, 2002
    Assignee: Bechtel BWXT Idaho, LLC
    Inventors: John M. Svoboda, John L. Morrison
  • Patent number: 6462533
    Abstract: An IC test system includes a socket having a plurality of contact pins, a positioning member for positioning an IC package for testing, a carriage arm for transferring the IC package positioned by the positioning member to the socket. The socket, positioning member and the carriage arm are fixed to the base of the test system via a common base plate. Vibration caused by the carriage arm is commonly transferred to the socket and the positioning member, whereby a suitable alignment of IC package with respect to the socket can be obtained.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: October 8, 2002
    Assignee: NEC Machinery Corporation
    Inventor: Jun Shimizu