Abstract: The present invention is a high-voltage generation circuit configured to sequentially activate a plurality of high-voltage pump circuits to precisely pump a level of high voltage. In one embodiment, the high-voltage generation circuit includes a high-voltage level detection unit for outputting a high-voltage detected signal, a high-voltage pump control unit for generating a control signal responsive to a detected signal, an oscillator for generating a pulse signal for driving a plurality of high-voltage pumps, a sequential delay unit for sequentially delaying the pulse signal from the oscillator, and a plurality of high-voltage pumps for pumping the high voltage based on a delayed pulse signal and the control signal.

Abstract: A circuit is provided having a differential difference amplifier (DDA) having first and second inputs to receive a desired body bias signal, and a third input to receive a supply voltage, the DDA configured to generate an intermediate output signal, the intermediate output signal coupled to an output buffer generating an output signal having a desired gain, the DDA having a fourth input, to cause the output signal to reference to variations in the supply voltage.

Abstract: A switched low pass filter (18) minimizes transients generated during filter switching events and eliminates active circuit random noise. The switched low pass filter (18) includes a filter input terminal (26) for receiving an input base band signal, and an RC circuit (R1, C1, S1, S2) for receiving the input base band signal and for passing only a filtered portion of the input base band signal depending on a wide, mid or narrow band mode of filter operation. The switched low pass filter (18) also includes a transient reduction circuit (34) in switchable communication with the RC circuit (R1, C1, S1, S2) for minimizing transients and switching events caused by transitioning to the mid and narrow band modes of filter operation.

Abstract: A constant voltage generating circuit has a reference voltage generating circuit of which the output voltage is controlled to be a constant voltage when the output voltage has risen, with an increase in the input supply voltage, to reach a predetermined voltage and that outputs the constant voltage as a reference voltage, a first transistor that turns on when the output voltage reaches the predetermined voltage to control the constant voltage output from the reference voltage generating circuit, a second transistor that is so connected that, when the first transistor turns on, a current proportional to the current flowing through the first transistor flows through the second transistor, and a signal output circuit that detects the current flowing through the second transistor to output a detection signal indicating that the constant voltage is being output.

Abstract: An internal power supply potential generating circuit includes: a control potential generating circuit having four MOS transistors connected in series between a node and a ground potential line, and controlling a pull-up transistor and a pull-down transistor in order that a potential at an output node coincides with a control potential; a monitor potential generating circuit having four MOS transistors connected in series between a prescribed node and a ground potential line, and generating a monitor potential; a potential dividing circuit generating a potential 1/2 times a reference potential; and a VCC1 generating circuit controlling a potential at the prescribed potential in order that the monitor potential becomes the reference potential. Therefore, an output potential can be controlled with correctness.

Abstract: An internal power voltage generating circuit capable of accurately adjusting a level of an internal power voltage in response to an overshoot of the internal power voltage. In one embodiment, the circuit comprises an internal power voltage generator for generating an internal power voltage to an internal power voltage generating terminal, first and second resistor devices, serially connected between the internal power voltage generating terminal and a ground voltage, for distributing the internal power voltage and for generating a distributed voltage to a distributed voltage generating node, and a current discharging device, connected between the internal power voltage generating terminal and the ground voltage, for discharging current from the internal power voltage generating terminal to the ground voltage in response to the distributed voltage.

Abstract: The present invention realizes higher-speed external output operation synchronized with a clock signal from the viewpoint of prevention of output operation delay due to a level shift circuit and maintenance of a high breakdown voltage of an output buffer. A semiconductor integrated circuit includes a first circuit and a second circuit having a breakdown voltage higher than a breakdown voltage of the first circuit, and operation voltages of the first and second circuits can be made equal to each other or different from each other.

Abstract: Charge pump circuits and methods of the present invention step up an input voltage to provide an output voltage. The charge pump circuits have one or more stages. Each stage may include a capacitor and a transistor. Each stage adds an incremental voltage to an input voltage. The capacitors elevate the voltage at a terminal of the transistors in each stage in response to a clock signal to provide the incremental voltage. The output voltage is the sum of the input voltage and the incremental voltages provided by each stage. One or more of the stages of the charge pump circuit may have a depletion transistor. Depletion transistors may be field-effect transistors that have a lower threshold voltage as a result of an implant in the channel region of the device.

Abstract: Even in the case where the reference voltage of a reference-voltage generating circuit is adjusted by fuses, a number of fuses are required to be disconnected, and the area of fuse circuits tends to increase for fine adjustment. Therefore, by dividing control signals into one part that are predetermined by fixed wiring and another part that is adjustable by fuse circuits, time required for disconnecting fuses is minimized and fine adjustment is made possible.

Abstract: A voltage boosting circuit has two charge pumps connected to an output node from which a boosted potential, higher than the power-supply potential, is supplied to a load circuit. One charge pump is activated when the load circuit is activated, regardless of the output node potential. The other charge pump is activated while the load circuit is active, if the potential of the output node falls below a predetermined level. Use of these two charge pumps reduces electrical noise and ensures that the output node is brought to an adequate potential when the load circuit is activated.

Abstract: A voltage dividing circuit outputs a divided voltage of a maximum output voltage which can be driven by a boosting pump. A reference voltage generating circuit outputs a first reference voltage corresponding to a target level of a boosted voltage. A level selecting circuit compares the level of the divided voltage with that of the first reference voltage to select one of the voltages that has a lower voltage level. Then the selected voltage is supplied as a second reference voltage to a level sensing circuit.

Abstract: A threshold compensating circuit generates a bias potential VBIAS, that is, a threshold voltage of a MOS transistor offset by a given value. A gate-source voltage having compensation for variation in threshold voltage is thus applied to a transistor. By using a differential amplifier having this transistor as a current source, a voltage down-converter less susceptible to variation in threshold voltage caused by process variation and temperature can be implemented.

Abstract: An active power filter includes a feedback resistor and a shunt capacitor, an operational amplifier equivalent subcircuit, and a voltage drop source. The shunt capacitor connects the positive terminals of the low noise power supply and the noisy load to the positive terminal of the operational amplifier equivalent subcircuit. The feedback resistor connects the negative terminal of the noisy load and the output of the operational amplifier equivalent subcircuit to the negative terminal of the shunt capacitor. The voltage drop source connects the negative terminal of the low noise power supply to the negative terminal of the operational amplifier equivalent subcircuit. The operational equivalent subcircuit includes an operational amplifier, three resistors, three capacitors, and a transistor. The first resistor connects the positive terminal of the voltage drop source to the negative input terminal of the operational amplifier.

Abstract: With power-on detection circuits provided for a plurality of power supply voltages, a main power-on detection signal is maintained at the active state to reset an internal node while at least one of the power-on detection signals is active. In a multi-power semiconductor integrated circuit device, current consumption at the time of power-up is reduced.

Abstract: A steering circuit for a programmable circuit employing programming voltages that exceed normal operating voltages comprises a plurality of steering transistors. At least one steering transistor has its gate driven by a bootstrapping transistor.

Abstract: The invention provides a method and apparatus for performing a voltage to current conversion. In particular, the invention provides a voltage to current converter configured to vary its transconductance (Gm). Such a converter is configured to receive a voltage input signal combined with a reference voltage signal to be converted to a current output. Optionally, the reference voltage signal may be provided by a parabolic impedance network that includes a bank of resistors and a plurality of corresponding current sources. Each current source corresponds to each node between two resistors, and may be varied in order to program changes in the comparator's Gm. Each resistor and corresponding current source is configured to create an individual reference voltage reference having a value that occurs in a parabolic manner in relation to other voltage references occurring across the impedance network.

Abstract: In a semiconductor device, a time-counting circuit counting a prescribed time in transition to a low-power operation mode includes a CR-type time constant circuit and a complementary NOR gate. The time-counting circuit causes electric charges to be released from a capacitive element through a resistance element when a prescribed signal attains L level. As release of the electric charges continues, the NOR gate operates, a power control signal is output at L level, and the semiconductor device makes a transition to the low-power operation mode. Thus, since the time-counting circuit does not include a multi-stage delay circuit and a latch circuit for time-count, power consumption is low, and circuit area is small. Consequently, the semiconductor device capable of transition to the low-power operation mode can simultaneously implement lower power consumption and smaller circuit area.

Abstract: Low noise bandgap references of the type providing a temperature independent output by balancing the proportional to absolute temperature dependence of the difference in base-emitter voltages of two transistors operating at different current densities with the negative temperature coefficient of the base-emitter voltage of a transistor. The bandgap references disclosed reduce the noise characteristic of such references by balancing the difference in base-emitter voltages of a first number of pairs of transistors, each pair having two transistors operating at different current densities, with the negative temperature coefficient of the base-emitter voltage of a second number of transistors, the second number being less than the first number. Various embodiments are disclosed, including embodiments having an output corresponding to the bandgap of the transistor material, and multiples of the bandgap of the transistor material.

Abstract: Voltage level translators are presented, inter alia, for operating an operational amplifier integrated circuit designed for operation with a single ended power supply, to operate with a split level power supply having a center tapped ground. A first polarity power supply terminal of a operational amplifier integrated circuit is coupled to a first polarity of the of the split level power supply, and a second polarity power supply terminal of the operational amplifier integrated circuit is coupled to a second polarity of the power supply, with a positive signal input terminal of the operational amplifier being coupled to a center tapped ground of the split level power supply.

Abstract: In a booster circuit comprising a first pump capacitor (CP1) connected between nodes (N1, N3) and a second pump capacitor (CP2) connected between nodes (N2, N4), the booster circuit comprises first through fifth switches (S1-S5). Connected to the node (N1), the first switch (S1) is connected to one of a power-supply node, a ground node, and a booster node. Connected to the node (N2), the second switch (S2) is connected to one of the power-supply node, the ground node, and the booster node. Disposed between the nodes (N3, N4), the third switch (S3) makes or breaks. Connected to the node (N3), the fourth switch (S4) is connected to one of the power-supply node, the booster node, and a non-connective node. Connected to the node (N4), the fifth switch (N5) is connected to one of the power-supply node, the booster node, and the non-connective node.