Abstract: The temperature test apparatus includes an OTA chamber 50 as an anechoic box, a heat insulating housing that is accommodated in the OTA chamber, a temperature control device that controls a temperature in the heat insulating housing, a ventilation block 210 that is made of metal and provided to block an opening 502 formed in the OTA chamber, and in which a plurality of through-holes 214 are formed, a first cover 220 that is provided on an outer side of the OTA chamber to cover the ventilation block, and form a first space 225 with the ventilation block, and is joined to a pipe for air from the temperature control device, and a second cover 250 that is provided on an inner side of the OTA chamber to cover the ventilation block, and form a second space 255 communicating with the heat insulating housing, together with the ventilation block.

Abstract: A vertical probe card and a fence-like probe thereof are provided. The fence-like probe has a probe length within a range from 5 mm to 8 mm. The fence-like probe includes a fence-like segment, a ceramic layer, a connection segment, and a testing segment. The fence-like segment has an elongated shape defining a longitudinal direction, and the fence-like segment has a penetrating slot that is formed along the longitudinal direction and that has a length greater than 65% of the probe length. The ceramic layer is directly formed on an outer surface of the fence-like segment and covers two long walls of the penetrating slot. The connection segment and the testing segment are respectively connected to two end portions of the fence-like segment, and is not formed on the connection segment and the testing segment.

Abstract: This disclosure proposes an inventive system capable of testing a component in the system during runtime. The system may comprise: a substrate; a plurality of functional components, of the plurality of functional components being mounted onto the substrate and including a circuitry; a system bus formed with electrically conductive pattern onto the substrate thereby allowing the plurality of functional components to communicate with each other; one or more wrappers, each of the one or more wrappers connected to one of the plurality of functional components; and an in-system component tester (ICT) configured to: select, as a component under test (CUT), at least one functional component, in an idle state, of the plurality of the functional components; and test, via the one or more test wrappers, the at least one functional component selected as the CUT.

Abstract: An inspection jig includes contact terminals and a pitch conversion unit electrically connected to the contact terminals and configured to convert a first pitch between adjacent two of the contact terminals into a second pitch different from the first pitch. The contact terminals each include a tubular body that extends in an axial direction of the contact terminal and is electrically conductive, and a conductor that is electrically conductive and has a stick shape. The tubular body includes a spring portion that has a helical shape along a peripheral surface of the tubular body. The conductor includes an uninserted portion that protrudes from the tubular body toward a first side in the axial direction, and an inserted portion that is disposed in the tubular body and is fixed to a first axial end portion of the tubular body. The pitch conversion unit includes a board portion and a protruding portion.

Abstract: In a general aspect, a radio frequency (RF) measurement device includes first and second mode converters, each configured to convert a mode of the RF electromagnetic wave between a first RF waveguide mode and a second RF waveguide mode. The RF measurement device also includes an internal cavity between the first and second mode converters that contains a vapor or a source of the vapor. The vapor includes Ryberg atoms or molecules. The RF measurement device additionally includes an RF waveguide extending between the first and second mode converters and configured to establish a circular polarization of the RF electromagnetic wave in the internal cavity.

Abstract: The present disclosure provides an electronic tester comprising at least one test fixture that couples to a device under test, at least one test instrument coupled to at least one of the test fixtures that measures signals in the device under test, a test controller that controls the device under test while the test is performed, and an adapter module comprising a general control interface that is coupled to the test controller, and a DUT-specific communication interface that couples to the device under test to communicate with the device under test, wherein the test controller controls the device under test with generic control signals sent to the general control interface, and wherein the adapter module translates the general control signals into DUT-specific control signals and transmit the DUT-specific control signals to the device under test. Further, the present disclosure provides a respective method.

Abstract: A current measuring device for switched-mode electronic power converters includes two independent sensors connected in series for the current to be measured, one of said sensors providing an admittance and the other providing a conductance. The current measuring device further includes a parallel current measuring resistor and an average value capacitor which are connected in parallel contribute to the provided admittance. The conductance is provided by a serial current measuring resistor as one of the sensors. The current to be measured has both DC and AC current components. The current measuring device further includes a filter is transferred back into the power path or merged with the current measuring sensors.

Abstract: A camera device according to the present embodiment comprises: a first operation part comprising one of a first coil or a magnet and arranged on a fixed member; a second operation part which comprises the other one of the first coil and the magnet, is arranged on a movable member, and faces the first operation part; a hall sensor facing one of the first operation part and the second operation part; and a second coil arranged near the hall sensor, wherein at least a portion of the second coil is arranged between the hall sensor and the first coil.

Abstract: A test device to localize a partial discharge in or at an electrical component may include at least one antenna to capture an electromagnetic wave caused by a partial discharge in the electrical component. The test device includes multiple microphones arranged in an environment around the electrical component. The microphones capture sound waves caused by the partial discharge. It is examined if an intensity of the electromagnetic wave exceeds a first limit value and/or the intensity of the sound wave captured by one of the multiple microphones exceeds a second limit value. Depending on the captured sound wave and/or the electromagnetic wave and on the examination relating to the first and/or second limit value, a location of the partial discharge can be determined.

Abstract: Herein is provided a device for optimizing bandwidth during oscilloscope measurements. The device is connectable to a probe for electrically connecting a test point and an oscilloscope. The device may include at least two grounding connectors with different inductances for electrically connecting ground to the probe and a tuning network comprising circuitry configured to compensate for the different inductances of said at least two grounding connectors, the tuning network being switchable between different modes, each mode being configured to compensate for a specific inductance of said at least two grounding connectors. A method for optimizing bandwidth during oscilloscope measurements is also provided.

Abstract: A current mirror circuit and a current generation circuit are connected in series between a power supply node and a ground node through a first node and a second node. Gates of transistors constituting the current mirror circuit are connected to the node that supplies an off-voltage of the transistors through a first switch, and is connected to the second node through a second switch. The second node is connected to the node that supplies an on-voltage of the transistors through a third switch. Before starting of the circuit, the first switch and the third switch are turned on while the second switch is turned off. After starting of the circuit, on and off of the first to third switches are switched.

Abstract: A display panel, including a pixel array; multiple rows of gate lines; and multiple columns of data lines; the gate lines and the data lines are perpendicular to each other, respectively, and every two gate lines are correspondingly connected to a row of sub-pixels, and each data line is correspondingly connected to two columns of sub-pixels; each row of pixels is correspondingly connected to two gate lines, and any two gate lines are parallel to each other; and there is a preset length difference between two adjacent rows of gate lines. The wiring of the display panel is convenient to be array detected, and improving the production yield of the display panel.

Abstract: Apparatuses and methods are disclosed for handling integrated circuits in automated testing. The handler apparatus includes an upper assembly that is selectively translatable above a testing surface and a lower bracket extending from and positioned below the upper assembly. The lower bracket forms a first opening, is selectively moveable upward and downward, and includes a rotatable finger extending downward to pick up and place an integrated circuit in a socket. The handier may further include an image sensor to detect potential error conditions, and a tool extending from the lower bracket to open and close a lid on the socket. The methods include sensing an image of an integrated circuit during certain phases of testing, analyzing the image to determine if the integrated circuit is positioned correctly, and correcting any detected error conditions before continuing with the automated testing.

Abstract: The invention discloses a dust detection method and system and a signal processing unit thereof to detect the dust in the net gas output by different gas-solid separation units.

Abstract: An analysis system includes inference processer circuitry configured to infer a corresponding classification by inputting part of frequency spectrum data corresponding to reference measurement data to a learned model having learned a relation between part of frequency spectrum data corresponding to sample measurement data and a classification related to noise corresponding to the part, causal component identification processer circuitry configured to identify causal component data of noise from a component data list based on the inferred classification, and a presentation information generator configured to generate presentation information for a user based on the causal component data.

Abstract: A controller circuit is configured to receive, from a first device, a first node voltage measured at a first node by the first device at a first time when a first current flows between the first node and a second node and receive, from a second device, a second node voltage measured at a second node by the second device at a second time when a second current flows between the first node and the second node, wherein the first time is different from the second time. The controller circuit is further configured to, responsive to a determination that the first current corresponds to the second current, calculate, using the first node voltage and the second node voltage, a resistance value for one or more electrical components electrically connecting the first node and the second node.

Abstract: An apparatus includes a test head frame and a tray slidably coupled to the frame and configured to receive a printed circuit board (PCB) to be tested. The PCB is positioned within the frame when the tray is in a retracted position and outside the frame when the tray is in an ejected position. A bed of nails (BON) opposes a lower side of the PCB and includes a plurality of pins having first portions arranged on an upper side of the BON to connect with corresponding electrical pads on the lower side of the PCB when the tray containing the PCB is in the retracted position. A plurality of interface printed circuit boards is configured for connection to second portions of the plurality of pins exposed on a lower side of the BON and for receiving test signals when the tray containing the PCB is in the retracted position.

Abstract: A sulfurization detection resistor makes it possible to detect a degree of sulfurization accurately and easily, and a manufacturing method for such sulfurization detection resistor. A sulfurization detection resistor includes an insulated substrate having a rectangular parallelepiped shape, a first front electrode and a second front electrode formed at both ends on a main surface of the insulated substrate, multiple sulfurization detecting conductors connected in parallel to the first front electrode, multiple resistive elements connected between the sulfurization detecting conductors and the second front electrode, and a protective film formed to partially cover the sulfurization detecting conductors and entirely cover the resistive elements.

Abstract: A method for the non-destructive detecting of ageing symptoms of a component having regularly recurring structures, includes the following steps: a) scanning the component in the region of the recurring structures in a plurality of scanning planes which extend parallel to one another to create at least one scanning image set having a plurality of two-dimensional scanning images, wherein the scanning images show a plurality of inhomogeneities; b) automatically identifying those inhomogeneities that form recurring patterns, and those inhomogeneities that do not follow a recurring pattern, using a suitable algorithm; and c) detecting ageing symptoms exclusively on the basis of those inhomogeneities which are identified in step b) and do not follow a recurring pattern.

Abstract: Cryogenic testing systems for testing electronic components such as wafers under cryogenic conditions are provided. The novel designs enable fast throughput by use of a cryogenically maintained test surface to which wafers may be rapidly introduced, cooled, and manipulated to contact testing elements while maintaining high quality cryogenic conditions. Thermal shielding is achieved by floating shields and/or flexible bellows that provide effective thermal shielding of the test environment while enabling manipulation of wafers with a wide range of motion. Also provided are novel door assemblies, chuck configurations, and vacuum plate bases that enable effective maintenance of cryogenic conditions and high throughput.