Patents Examined by Tremesha S Willis
  • Patent number: 10902867
    Abstract: An approach to forming an electronic device assembly that includes a plurality of interconnect pads on an electronic device, an interconnect die with a first set of interconnect pads adjacent to a first edge of the interconnect die connecting to a second set of interconnect pads adjacent to a second edge of the interconnect die, where a first set of connections between the plurality of interconnects on the electronic device and the first set of interconnect pads on the interconnect die occurs. Furthermore, the electronic assembly includes a second set of connections between the second set of interconnects on the interconnect die and a set of interconnect pads on a flex cable.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Robert Biskeborn, Calvin Shyhjong Lo
  • Patent number: 10897817
    Abstract: A thermally expandable material includes microcapsules and a binder having a conducting property, each microcapsule including a shell having an insulating property, and a thermally expandable component contained in the shell and having a property of expanding by heating, the shell deforming due to expansion of the thermally expandable component to come in contact with another capsule and have an insulating state with the other capsule.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: January 19, 2021
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Kenji Iwamoto, Satoshi Kurosawa
  • Patent number: 10888276
    Abstract: A living body-attachable electrode includes a substrate that has a first main surface and a second main surface and is made of a material having stretchability, a first electrode pair that is formed on/in the first main surface and includes two opposite electrodes, a second electrode pair that is formed on/in the first main surface and includes two opposite electrodes sandwiching the first electrode pair, and a plurality of gel electrodes that are formed on the second main surface and are in a one-to-one correspondence with the electrodes in the first and second electrode pairs. Each of the electrodes in the first and second electrode pairs and corresponding one of the gel electrodes are electrically connected to each other via a plurality of via conductors penetrating through the substrate.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: January 12, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kazuki Iwasaki
  • Patent number: 10879156
    Abstract: A method comprising incorporating indium into an entire Sn film for preventing the growth of whiskers from the Sn film, wherein the Sn film is applied to a metallic substrate. The indium is present in the entire thickness of the Sn film.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: December 29, 2020
    Assignee: Washington State University
    Inventor: Indranath Dutta
  • Patent number: 10869382
    Abstract: An interposer includes an insulating element body, a wiring electrode inside the element body, a signal terminal electrode at the top surface of the element body and connected to a flat cable with a conductive bonding material interposed therebetween, and a ground terminal electrode. A through-hole penetrates through the element body to allow a bar-shaped metal fixing member to be inserted. A metal fixing member connecting electrode to be electrically connected to a metal fixing member is provided at at least one of the top surface of the element body and an inner wall of the through-hole. Predetermined signal terminal electrodes are electrically connected by the wiring electrode. The ground terminal electrode and the metal fixing member connecting electrode are electrically connected.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: December 15, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hirokazu Yazaki, Keito Yonemori
  • Patent number: 10867926
    Abstract: Discussed generally herein are methods and devices including or providing a high density interconnect structure. A high density interconnect structure can include a stack of alternating dielectric layers and metallization layers comprising at least three metallization layers including conductive material with low k dielectric material between the conductive material, and at least two dielectric layers including first medium k dielectric material with one or more first vias extending therethrough, the at least two dielectric layers situated between two metallization layers of the at least three metallization layers, a second medium k dielectric material directly on a top surface of the stack, a second via extending through the second medium k dielectric material, the second via electrically connected to conductive material in a metallization layer of the three or more metallization layers, and a pad over the second medium k dielectric material and electrically connected to the second via.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Kemal Aygun, Ajay Jain, Zhiguo Qian
  • Patent number: 10868415
    Abstract: An exterior member of an electrical wire includes a first tubular body and a second tubular body. The first tubular body includes a hollow portion through which the electrical wire is inserted, an opening portion from which the electrical wire is drawn out, and a vent portion which is impermeable to moisture and permeable to air. The second tubular body is provided to extend from the first tubular body and to cover an outer periphery of the electrical wire drawn from the opening portion, and is made of a material more flexible than a material of the first tubular body.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: December 15, 2020
    Assignee: Yazaki Corporation
    Inventors: Yuto Ito, Yohei Koseki
  • Patent number: 10868229
    Abstract: A method of manufacturing an electrode substrate for a transparent light emitting device display that includes laminating copper foil on a transparent base material; forming a copper foil pattern by etching the copper foil; forming a transparent photosensitive resin composition layer on a front surface of the transparent base material and the copper foil pattern; and exposing at least a part of the copper foil pattern by removing at least a part of the transparent photosensitive resin composition layer provided on the copper foil pattern.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: December 15, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Yong Goo Son, Kun Seok Lee, Seung Heon Lee
  • Patent number: 10863624
    Abstract: A camera module with reduced light leakage includes a printed circuit board and a mounting bracket mounted on the printed circuit board. The printed circuit board includes a first surface and at least one side surface perpendicularly connected to the first surface. A step is defined at the printed circuit board. The step passes through the first surface and at least one side surface. A flange is defined on the mounting bracket. The flange is received and fixed in the step and this structure places less reliance on the strength and opacity of the particular adhesive used.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: December 8, 2020
    Assignee: TRIPLE WIN TECHNOLOGY (SHENZHEN) CO. LTD.
    Inventors: Jing-Wei Li, Shin-Wen Chen, Yu-Shuai Li, Jian-Chao Song
  • Patent number: 10856365
    Abstract: An improved resistive heating device includes multiple printed heating elements joined through a flexible film substrate to bus bars printed on an opposite side of the flexible film. The heating elements may be printed using a positive temperature coefficient ink to provide a self-regulated maximum temperature based on a given input voltage. This printing of electrical components on both sides of a flexible film, referred to herein as double-sided polymer circuitry (D/SPC®), provides various additional advantages over single-sided printing, such as an increased heat per unit surface area. This also provides a more concentrated and evenly distributed heat pattern, and will reduce or eliminate the exhibition of hot spots or varying patterns of heat throughout the heating element. This printing on both sides of the flexible film results in an improved, fault-tolerant bus bar topology, which may be used in fault-critical medical applications or other mission-critical applications.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: December 1, 2020
    Inventor: Mark Allen Ester
  • Patent number: 10856414
    Abstract: A printed circuit board includes a circuit trace and a connector pad. The connector pad provides electrical and mechanical mounting of a connector lead of a surface mount device and provides a circuit path between the surface mount device and the circuit trace. The connector pad includes 1) a connector pad base electrically coupled to the circuit trace, and 2) a first connector pad island electrically isolated from the connector pad base. The connector pad base has a length that is substantially equal to a length of a contact portion of the connector lead.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: December 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: Chun-Lin Liao, Ching-Huei Chen, Bhyrav M. Mutnury
  • Patent number: 10849238
    Abstract: One embodiment includes a method for manufacturing an electronic apparatus, including bonding an integrated circuit (IC) die to a substrate to form an IC package using a first reflow process, which causes the substrate to warp, reversibly connecting a lid with the IC package over the IC die so that the lid applies a force to the IC die, providing a printed circuit board (PCB) including an array of first contact pads, respectively disposing an array of bonding elements on an array of second contact pads of the substrate, placing the IC package on to the PCB with respective ones of the bonding elements contacting respective ones of the first contact pads, performing a second reflow process to apply heat to the bonding elements to bond the first contact pads with the second contact pads, and removing the lid from the IC package after the second reflow process.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: November 24, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventor: Yogev Buzaglo
  • Patent number: 10849221
    Abstract: An electrode embedded member includes a plate-shaped substrate made of a ceramic; an inner electrode embedded in the substrate; a terminal disposed at a position that overlaps the inner electrode in a thickness direction of the substrate and is farther than the inner electrode from the front surface of the substrate; an intermediate insulator embedded in the substrate between the inner electrode and the terminal and that is made of a ceramic; and a connection electrode disposed along an outer surface of the intermediate insulator and that connects the terminal and the inner electrode. When seen in the thickness direction of the substrate, a cutout portion is formed in the connection electrode located at least outside an overlapping region where the terminal and the connection electrode overlap. The substrate and/or the intermediate insulator penetrates the cutout portion, and thereby the substrate and the intermediate insulator are integrated with each other.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: November 24, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Atsushi Tsuchida, Noriaki Tokusho
  • Patent number: 10833020
    Abstract: Discussed generally herein are methods and devices including or providing a high density interconnect structure. A high density interconnect structure can include a stack of alternating dielectric layers and metallization layers comprising at least three metallization layers including conductive material with low k dielectric material between the conductive material, and at least two dielectric layers including first medium k dielectric material with one or more first vias extending therethrough, the at least two dielectric layers situated between two metallization layers of the at least three metallization layers, a second medium k dielectric material directly on a top surface of the stack, a second via extending through the second medium k dielectric material, the second via electrically connected to conductive material in a metallization layer of the three or more metallization layers, and a pad over the second medium k dielectric material and electrically connected to the second via.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: November 10, 2020
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Kemal Aygun, Ajay Jain, Zhiguo Qian
  • Patent number: 10834831
    Abstract: A component carrier includes a plurality of low density layer structures, and a plurality of high density layer structures having a higher density of electrically conductive structures than the plurality of low density layer structures, where the low density layer structures and the high density layer structures are alternatingly vertically stacked.
    Type: Grant
    Filed: October 29, 2016
    Date of Patent: November 10, 2020
    Assignee: AT&S (China) Co. Ltd.
    Inventor: Mikael Tuominen
  • Patent number: 10834812
    Abstract: A wiring board includes: a ceramic board including a ceramic insulator layer composed mainly of ceramic, and a wiring disposed at the ceramic insulator layer; a first resin board and a second resin board each of which includes a resin insulator layer composed mainly of resin, and a wiring disposed at the resin insulator layer; and a metal member mounted to the second resin board. The first resin board is superposed to a first surface of the ceramic board. The second resin board is superposed to a second surface of the ceramic board opposite to the first surface of the ceramic board. The second resin board includes a joint pad at its first surface opposite to its second surface facing the ceramic board, the joint pad made of metal. The metal member is joined to the joint pad by brazing or soldering.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: November 10, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takakuni Nasu, Yousuke Kondou, Masaomi Hattori, Kouta Kimata, Atsushi Kaga, Guangzhu Jin
  • Patent number: 10826206
    Abstract: A conductive terminal includes a holding portion, a positioning portion and a welding portion. The positioning portion is connected to the holding portion and includes two positioning branches separated by a first trench. The welding portion is connected to the positioning portion and the positioning portion is located between the holding portion and the welding portion. The welding portion includes two welding branches separated by a second trench, wherein the first trench is communicated with the second trench and each of the welding branches is connected to one of the positioning branches. The positioning portion has a first outer diameter, and a second outer diameter on at least part of the welding portion is greater than the first outer diameter. An electrical connecting structure is further provided.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: November 3, 2020
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventor: Pao-Hsiu Fan
  • Patent number: 10827603
    Abstract: A printed circuit substrate includes a circuit unit, a first main frame ground interconnection, a first sub frame ground interconnection spaced away from the first main frame ground interconnection in a first direction, and a first conductive via connecting the first main frame ground interconnection and the first sub frame ground interconnection to each other. In plan view from the first direction, a second outer periphery of the first sub frame ground interconnection is surrounded by a first outer periphery of the first main frame ground interconnection. Thus, a printed circuit substrate that can prevent the circuit unit from malfunctioning can be provided.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: November 3, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Norihiko Akashi, Hiroyuki Ono, Hiroshi Mihara, Yoshiaki Irifune, Daisuke Koyama, Yudai Yoneoka, Takashi Miyasaka, Shimpei Kasahara
  • Patent number: 10827612
    Abstract: A printed circuit board comprises a substrate and a routing structure arranged on the substrate, the substrate has a welding region and a routing region electrical connected with the welding region. The routing structure comprises a plurality of bonding pads connected with corresponding wires and a plurality of conductive traces electrically connected with the bonding pads, the bonding pads is arranged in the welding region, and the conductive traces are disposed in both the welding region and the routing region. The bonding pads are arranged abreast, and in the arrangement direction of the bonding pads, the bonding pads defines at least two grounding pads for connecting with grounding wires and at least a signal pad between the two grounding pads.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: November 3, 2020
    Assignee: ALLTOP ELECTRONICS (SUZHOU) LTD.
    Inventors: Mindi Ni, Yichang Chen
  • Patent number: 10814589
    Abstract: An item may be formed from layers of material such as leatherboard layers. A leatherboard layer may include fibrous natural material such as leather or paper embedded in polymer. Portions of the leatherboard layer can be locally modified by incorporation of filler material with desired properties. The filler material may include magnetic particles, conductive particles, or other material. By incorporating the filler material in localized portions of the leatherboard layer, integral electrodes or magnets may be formed. The leatherboard layer may also include embedded circuitry. Items such as enclosures and other items may be formed from the leatherboard layer. The leatherboard layer in an item may include locally modified regions such as magnet regions that are configured to form a closure or other structures that interact with each other.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: October 27, 2020
    Assignee: Apple Inc.
    Inventors: Timothy W. Scales, Whitney D. Mattson, Benjamin A. Stevenson, Linda D. Benavente-Notaro, Nicholas R. Trincia, William H. Chui, Hao Zhu