Abstract: Apparatuses and associated methods for mounting PCBs and other electronics boards in portable medical equipment and/or other portable and non-portable electronic devices are disclosed herein. In some embodiments, the technology disclosed herein can provide PCB mounting systems that isolate the PCB from detrimental shock, vibration, and/or strain, while also providing electrical ground paths that greatly reduce EMI and other electrical disturbances. Some embodiments of the mounting systems described herein include both elastomeric (e.g., rubber) components and resilient metallic grounding members that, when assembled together, provide favorable shock mounting as well as robust electrical grounding without the inconvenience of using separate shock mounts, grounding straps, etc.

Abstract: The printed wiring board of the present disclosure includes: a plurality of insulating layers laminated in a thickness direction; a plurality of wiring conductors respectively correspondingly positioned between the plurality of insulating layers; a through hole penetrating the plurality of insulating layers and the plurality of wiring conductors in the thickness direction; and a through-hole conductor positioned on a wall surface of the through hole; each of the plurality of wiring conductors has a first surface facing the through hole, each of the plurality of insulating layers has a second surface facing the through hole, and the first surface is farther away from a central axis penetrating the through hole in the thickness direction than the second surface.

Abstract: A semiconductor package attached to a curved display panel includes a semiconductor chip, having a top surface and a bottom surface, disposed on a curved flexible film, wherein the curved flexible film is disposed on the curved display panel, a flexible cover layer attached to the top surface of the semiconductor chip, and an underfill material formed between the semiconductor chip and the curved flexible film, and wherein the top surface of the semiconductor chip is planar.

Abstract: A multilayer ceramic capacitor includes a ceramic body including an active portion including dielectric layers and internal electrodes that are alternately stacked and a margin portion disposed on outer surfaces of the active portion; and external electrodes disposed on outer surfaces of the ceramic body. The margin portion includes an inner half adjacent to the active portion and an outer half adjacent to the edge of the ceramic body, and a porosity of the inner half is greater than a porosity of the outer half.

Abstract: A multilayer wiring board having a high degree of freedom of wiring design and realizing high-density wiring, and a method to simply manufacture the multilayer wiring board is provided. A core substrate with two or more wiring layers provided thereon through an electrical insulating layer. The core substrate has a plurality of throughholes filled with an electroconductive material, and the front side and back side of the core substrate have been electrically connected to each other by the electroconductive material. The throughholes have an opening diameter in the range of 10 to 100 ?m. An insulation layer and an electroconductive material diffusion barrier layer are also provided, and the electroconductive material is filled into the throughholes through the insulation layer. A first wiring layer provided through an electrical insulating layer on the core substrate is connected to the electroconductive material filled into the throughhole through via.

Abstract: A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.

Abstract: In an exemplary embodiment, a coil component includes: a core 10 having a pillar part 24, and a hollow space 22 around the pillar part 24; a coil conductor 40 having a spiral part 42 placed around the pillar part 24, and a lead part 48a or 48b led out from the spiral part 42 toward the bottom face 28 of the core 10, which lead part includes an end part 46a or 46b extending in parallel with the bottom face 28 and serves as an external terminal 49a or 49b; and an insulated terminal 60 electrically insulated from the coil conductor 40, which is provided on at least the bottom face 28; wherein the total base area of the bottom part 72 of the dummy terminal 60, on the bottom face 28, is greater than the total base area of the external terminals 49a, 49b.

Abstract: A circuit board with embedded components includes an inner layer board, electronic component disposed in the inner layer circuit board, and third to sixth conductive circuit layers. The third and fourth conductive circuit layers are on opposite surfaces of the inner circuit board through first and second adhesive layers. The third conductive circuit layer and the fourth conductive circuit layer are electrically connected to the first conductive circuit layer and the second conductive circuit layer.

Abstract: A flexible hybrid electronic (FHE) system includes a carrier, a first redistribution structure on the carrier, a first device on the first redistribution structure, and an encapsulation layer encapsulating the first device. The carrier has a first Young's modulus Y1. The first redistribution structure has a second Young's modulus Y2. The first device and a portion of the encapsulation layer form a top surface of the first redistribution structure to a top surface of the first device is a first portion having a third Young's modulus Y3. The other portion of the encapsulation layer from the top surface of the first device to a top surface of the encapsulation layer is a second portion having a fourth Young's modulus Y4. A ratio of Y3/Y4 is between 1.62 and 1.98; a ratio of Y3/Y2 is between 0.18 and 0.22; and a ratio of Y3/Y1 is between 280.62 and 342.98.

Abstract: A flexible circuit board having enhanced bending durability and a method for preparing same are provided. The method comprises: forming a signal line and a first ground layer on a first dielectric body and forming a second ground layer on a bottom side of the first dielectric body; preparing a second dielectric body; preparing a first bonding sheet and a first protective sheet which is connected to one end of the first bonding sheet or of which one or more parts are overlapped on one end of the first bonding sheet; bonding the second dielectric body onto the first dielectric body by means of the first bonding sheet; forming a via hole such that the first ground layer and the second ground layer are conducted; and cutting in a width direction the second dielectric body placed on the first protective sheet.

Abstract: A display apparatus includes a substrate having a bending area between a first area and a second area, wherein the substrate is bent in the bending area, a display portion on an upper surface of the substrate and positioned in the first area, and a protective film on a lower surface of the substrate and including a protective film base and an adhesive layer. The protective film base includes a plurality of cavities.

Abstract: A wiring board includes an insulating layer, and a metal layer. The insulating layer includes a first pattern and a second pattern. The first pattern includes first grooves extending parallel to each other, and a first projecting part separating adjacent first grooves. The second pattern includes a second projecting part, and a second groove surrounding the second projecting part. The metal layer includes a wiring formed within the first grooves, and a degassing hole formed within the second pattern and having an opening formed by the second projecting part.

Abstract: Various exemplary embodiments relate to a printed circuit board (PCB) for electrically connecting a discrete array component including a pattern formed on the PCB which is a merger of a set of via pads and a discrete array component; wherein the pattern is generated by a pin mapping between the discrete array component and a via grid array on the PCB; and wherein the pattern is formed of a metal etched during a manufacturing process of the PCB.

Abstract: A circuit board includes a substrate and at least two through holes defined in the substrate. The substrate includes a first conductive circuit layer and a second conductive circuit layer. The first conductive circuit layer and the second conductive circuit layer are respectively formed on opposite surfaces of the substrate. A number of conductive strips are formed on an inner wall of each of the at least two through holes. The number of conductive strips on the inner wall of a first one of the at least two through holes faces the number of conductive strips on the inner wall of a second one of the at least one through hole.

Abstract: Shape-memory alloy connectors and methods are provided for enhancing conductivity of a plated through-hole of a circuit board. A shape-memory alloy connector, including a shape-memory alloy material in deformed shape, is inserted into the plated through-hole of the circuit board. The shape-memory alloy connector is expanded within the plated through-hole by heating the shape-memory alloy material to, at least in part, transition the shape-memory alloy material towards a pre-deformed shape of the material. The transitioning of the shape-memory alloy material towards the pre-deformed shape expands the shape-memory alloy connector outward, at least in part, against plating of the plated through-hole to enhance contact of the shape-memory alloy connector with the plating of the plated through-hole.

Abstract: An antenna carrier plate structure has a first circuit board and a second circuit board. The first circuit board has a first substrate and a conductive connector disposed in the first substrate. The conductive connector has two opposite connecting ends respectively protruding from two opposite surfaces of the first substrate. The second circuit board has a second substrate formed with a through hole, and a connecting plug is disposed in the through hole. One end of the connecting plug is formed with an engaging concave portion for engaging one end of the conductive connector of the first substrate. Therefore, each circuit board can be firmly fixed and electrically connected by engaging to form a multi-layer circuit board module, thereby avoiding joint tolerances during soldering and ensuring a correct connection of the joints.

Abstract: A manufacturing method of an electronic product is provided. The manufacturing method includes following steps. Firstly, a conductive circuit is formed on a film, wherein the conductive circuit is made of a conductive metal layer, the conductive metal layer is a metal foil and the conductive metal layer is patterned to form the conductive circuit. Then, an electronic element is disposed on the conductive circuit of the film, and the electronic element is electrically connected to the conductive circuit. Then, the film and a supporting structure are combined by an out-mold forming technology or an in-mold forming technology, such that the electronic element is wrapped between the film and the supporting structure.

Abstract: A potting cup is provided and is positioned on a printed circuit board. The potting cup encapsulates a portion of the printed circuit board including at least one interface subject to corrosion when exposed to moisture and is configured to receive a potting material in the encapsulated portion to cover the at least one interface subject to corrosion.

Abstract: A solder bump structure includes a pillar formed on an electrode pad. The pillar has a concave curve-shaped surface and a geometry defined at least in part by dimensions including a first height greater than a first width. The solder bump structure further includes solder formed on the concave curve-shaped surface of the pillar. The solder has a convex top surface and having dimensions including a second height greater than a second width due to the geometry of the pillar.

Abstract: A method for producing a wired circuit board including an insulating layer and a conductive pattern, including (1), providing the insulating layer having an inclination face; (2), providing a metal thin film at least on the surface of the insulating layer; (3), providing a photoresist on the surface of the metal thin film; (4), disposing a photomask so that a first portion, where the conductive pattern is provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask; (5), removing the first portion to expose the metal thin film corresponding to the first portion; and (6), providing the conductive pattern on the surface of the metal thin film exposed from the photoresist. The inclination face has a second portion that allows the light reflected at the metal thin film to reach the first portion.