Patents Examined by Tremesha S Willis
  • Patent number: 11240916
    Abstract: An electronic device, a method and apparatus for producing an electronic device, and a composition therefor are disclosed. An adhesive material is applied in a first pattern on a surface of a receiver substrate. A carrier having a metal foil disposed thereon is brought into contact with the first substrate such that a portion of the metal foil contacts the adhesive material. The adhesive material includes a first polymer, a second polymer, and a conductive carbon black dispersion, and is activated using at least one of mechanical pressure and heat while the portion of the metal foil is in contact with the adhesive material. The first substrate and the second substrate are separated, whereby the portion of the metal foil is transferred to the first substrate. The adhesive is electrically conductive to maximize the possibility of maintaining electrical connectivity even when there is a break in the metal foil.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: February 1, 2022
    Assignee: CRYOVAC, LLC
    Inventors: James W. Blease, Theodore F. Cyman, Jr.
  • Patent number: 11231751
    Abstract: Apparatuses and associated methods for mounting PCBs and other electronics boards in portable medical equipment and/or other portable and non-portable electronic devices are disclosed herein. In some embodiments, the technology disclosed herein can provide PCB mounting systems that isolate the PCB from detrimental shock, vibration, and/or strain, while also providing electrical ground paths that greatly reduce EMI and other electrical disturbances. Some embodiments of the mounting systems described herein include both elastomeric (e.g., rubber) components and resilient metallic grounding members that, when assembled together, provide favorable shock mounting as well as robust electrical grounding without the inconvenience of using separate shock mounts, grounding straps, etc.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: January 25, 2022
    Assignee: FUJIFILM SONOSITE, INC.
    Inventor: Ken Dickenson
  • Patent number: 11229118
    Abstract: A printed circuit board, comprising a flexible insulating layer, a rigid insulating layer laminated on a portion of the flexible insulating layer, and a coverlay disposed on an upper surface of the rigid insulating layer, an upper surface of the flexible insulating layer, and a side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the upper surface of the flexible insulating layer.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: January 18, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Chang-Hwa Park
  • Patent number: 11199883
    Abstract: A display device includes a base substrate including a display area and a non-display area at a periphery of the display area; a first signal wiring on the non-display area of the base substrate and including a first wiring part and a second wiring part connected to the first wiring part; and a printed circuit board including a lead wiring on the first signal wiring. The second wiring part includes an open part passing through a surface of the second wiring part in a thickness direction, the second wiring part includes a long side extending along a first direction and a short side extending along a second direction intersecting the first direction, and a separation distance between the open part and an end of the short side of the second wiring part in the first direction is within about 0.4 times the long side of the second wiring part.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: December 14, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myong Soo Oh, Seung Ho Choi, Ji Hoon Hwang
  • Patent number: 11197370
    Abstract: A stretchable display device comprises a display panel that includes a stretchable substrate where a plurality of emission elements is disposed, wherein the stretchable substrate is stretchable in at least one of a first direction and a second direction perpendicular to the first direction; a printed circuit film that includes a first driving circuit chip generating a drive control signal to be applied to the display panel and a second driving circuit chip receiving image data from outside and transferring the image data to the first driving circuit chip, wherein the printed circuit film is stretchable in at least one of the first direction and the second direction with respect to a stretch direction of the display panel.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: December 7, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Hohyun Keum, Mingyu Kang
  • Patent number: 11195901
    Abstract: A display device includes a substrate having a first area, a second area, and a bending area disposed between the first area and the second area. An inner wiring is disposed in the first area. An outer wiring is disposed in the second area. An interlayer insulating layer covers the inner wiring and the outer wiring, and includes a first contact hole. A conductive layer is disposed on the interlayer insulating layer, and is connected to the inner wiring or the outer wiring through the first contact hole. An inorganic protective layer covers at least a portion of the conductive layer and includes an inorganic insulating material.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: December 7, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyungjun Park, Wonkyu Kwak
  • Patent number: 11166385
    Abstract: A component carrier is disclosed. The component carrier includes: i) at least one electrically insulating layer structure and at least one electrically conductive layer structure, wherein the electrically conductive layer structure is formed in or below the electrically insulating layer structure, and ii) a laser via formed in the electrically insulating layer structure and extending down to the electrically conductive layer structure, wherein the laser via is at least partially filled with an electrically conductive material. Hereby, a connection diameter at a first end of the laser via at the electrically conductive layer structure is equal to or larger than an opening diameter at a second end of the laser via facing away from the electrically conductive layer structure.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: November 2, 2021
    Assignee: AT&S (China) Co. Ltd.
    Inventors: Yee-Bing Ling, Kenny Cao, Jackson Xu
  • Patent number: 11153968
    Abstract: Techniques and mechanisms for mitigating the effect of signal noise on communication via an interconnect. In an embodiment, a substrate includes an interconnect and a conductor which has a hole formed therein. Portions of the interconnect variously extend over a side of the conductor, wherein another recess portion of the interconnect extends from a plane which includes the side, and further extends at least partially into the hole. The configuration of the recess portion extending within the hole may contribute to an impedance which dampens a transmitter slew rate of the communication. In an embodiment, a total distance along a path formed by the interconnect is equal to or less than 5.5 inches.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: October 19, 2021
    Assignee: Intel Corporation
    Inventors: Jackson Chung Peng Kong, Bok Eng Cheah, Khang Choong Yong, Yun Ling, Chia Voon Tan
  • Patent number: 11140784
    Abstract: A printed wiring board includes a base film having insulation properties and a conductive pattern including multiple wiring portions laminated so as to run on at least one surface of the base film, wherein each wiring portion includes a first conductive portion and a second conductive portion coating an outer surface of the first conductive portion, wherein an average width of each wiring portion is 10 ?m or greater to 50 ?m or smaller, and an average thickness of the second conductive portion is 1 ?m or greater to smaller than 8.5 ?m. A method for manufacturing a printed wiring board includes a first conductive portion forming step of forming a first conductive portion forming each wiring portion by plating an opening of the resist pattern on the conductive foundation layer, a conductive foundation layer removing step, and a second conductive portion coating step.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: October 5, 2021
    Assignees: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kohei Okamoto, Kousuke Miura, Hiroshi Ueda, Shoichiro Sakai, Maki Ikebe
  • Patent number: 11134572
    Abstract: The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and the conductor layer is thinned, in such a way that the conductor material of the conductor layer is removed from outside the conductor pattern.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: September 28, 2021
    Assignee: IMBERATEK, LLC
    Inventors: Risto Tuominen, Antti Iihola, Petteri Palm
  • Patent number: 11134568
    Abstract: Provided is a high-frequency circuit laminate that can reduce the transmission loss of electrical signals in high-frequency circuits and produce circuit boards with excellent smoothness. The high-frequency circuit laminate according to the present invention includes a metal layer and a resin layer which are laminated in contact with each other, the resin layer having an elastic modulus from 0.1 to 3 GPa, and the resin layer having an dielectric loss tangent from 0.001 to 0.01 and a relative permittivity from 2 to 3 at a frequency of 10 GHz at 23° C.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: September 28, 2021
    Assignee: JSR CORPORATION
    Inventors: Isao Nishimura, Nobuyuki Miyaki, Toshiaki Kadota, Shintarou Fujitomi, Tomotaka Shinoda
  • Patent number: 11121487
    Abstract: A car window glass includes a glass plate having a conductor layer, a connection terminal, and a power line. The connection terminal includes metal-plate first and second join parts joined to the conductor layer via the first and second solder layers, a metal-plate bridge section connected to the first and second join parts and spaced apart from the conductor layer, and a fixing part for fixing the power line to a bridge section main surface. The power line extends from the fixing part along a glass plate main surface, and the side opposite of the side facing the glass plate main surface is free of the bridge section, and the starting point of the power line extending from the fixing part is positioned in the upper direction of a virtual line connecting the center portions of the first and second join parts with each other.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: September 14, 2021
    Assignee: Central Glass Company, Limited
    Inventors: Kohei Seki, Jun Hamada, Kazunori Furuhashi
  • Patent number: 11122678
    Abstract: A structure having imbedded array of components is described. An example structure includes an imbedded component array layer having an array of imbedded passive devices contained therein. The structure further includes an Integrated Fan-Out (InFO) layer residing adjacent a first surface of the imbedded component array layer having traces and vias formed therein. The structure further includes an insulator layer residing adjacent a second surface of the imbedded component array layer and electrically coupled to at least the InFO layer and vias passing through the imbedded component array layer and electrically coupled to some of vias of the InFO layer.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: September 14, 2021
    Assignee: Tesla, Inc.
    Inventors: Vijaykumar Krithivasan, Jin Zhao, Mengzhi Pang, Steven Wayne Butler, Ganesh Venkataramanan, Yang Sun
  • Patent number: 11102881
    Abstract: A flat harness includes a plurality of flat circuit bodies that are stacked to each other. A mark is provided on a side surface of each of the plurality of flat circuit bodies. A position of the mark in a length direction of the flat circuit body is provided so as to be different for each type of the flat circuit body.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: August 24, 2021
    Assignee: YAZAKI CORPORATION
    Inventor: Naoto Kogure
  • Patent number: 11096273
    Abstract: Disclosed are a printed circuit board manufactured by filling a via hole formed in a flexible board and a via hole formed in a cured base substrate and then laminating the flexible board and the cured base substrate and a method of manufacturing same. The method includes preparing a flexible board including a flexible region and a rigid region, preparing a cured base substrate, and laminating the cured base substrate on the rigid region of the flexible board, in which during the laminating, via holes respectively formed in the flexible board and the cured base substrate are first filled with a conductive material and then the flexible board and the cured base substrate are laminated.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: August 17, 2021
    Assignee: AMOSENSE CO., LTD.
    Inventor: Sung-Baek Dan
  • Patent number: 11083084
    Abstract: A method for forming a stretchable platform according to one embodiment comprises: (a) a step of forming an adhesive layer on one surface of a rigid member; (b) a step of modifying one surface of a stretchable substrate and an adhesive layer surface to form an incomplete bond; and (c) a step of bonding so as to form a covalent bond between the one surface of a modified stretchable substrate and the adhesive layer surface.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: August 3, 2021
    Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Yongtaek Hong, Yunsik Joo, Jae-Young Yoon
  • Patent number: 11083091
    Abstract: Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: August 3, 2021
    Assignees: GUANGZHOU FASTPRINT CIRCUIT TECH CO., LTD., SHENZHEN FASTPRINT CIRCUIT TECH CO., LTD., YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
    Inventors: Zeyang Lian, Sen Wu, Yanguo Li, Bei Chen
  • Patent number: 11076492
    Abstract: Devices, methods, and systems for forming an electrical circuit out of a conductor embedded in two layers of substrate are disclosed. Portions of the two layers of substrate and the conductor are removed, forming a cavity through the two layers and the conductor. A blocker material is deposited along the wall of the cavity. A portion of the blocker material and adjacent layer of the substrate is removed forming another cavity in contact with a part of the conductor. A surface of the second cavity is then electroless plated by a conductive metal to form part of the electrical circuit.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: July 27, 2021
    Assignee: Averatek Corporation
    Inventors: Shinichi Iketani, Michael Riley Vinson, Haris Basit
  • Patent number: 11076481
    Abstract: A stretchable substrate according to an embodiment of the present invention comprises a first modulus region which has a first modulus, a second modulus region which is located in a plane direction with respect to the first modulus region and has a second modulus higher than the first modulus, and a third modulus region which is located between the first modulus region and the second modulus region and has an interface modulus which gradually changes between the first modulus and the second modulus, wherein the interface modulus of the third modulus region may be constant in the thickness direction thereof.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: July 27, 2021
    Assignee: Korea University Research and Business Foundation, Sejong Campus
    Inventors: Sang Il Kim, Mun Pyo Hong, Bo Sung Kim, Ho Won Yoon, Kyung Uk Ha, Yun O Im
  • Patent number: 11071210
    Abstract: An etching composition for etching an electrically conductive layer structure for forming a conductor track is provided. The etching composition includes an etchant, a highly branched compound and optionally a solvent. In addition, a method of etching an electrically conductive layer structure, a conductor track, an arrangement of at least two conductor tracks, and a component carrier are provided.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: July 20, 2021
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Jolanta Klocek, Thomas Krivec