Abstract: First diffusion region constituting a photodiode in each pixel stores carriers generated according to incident light. Second diffusion region is formed at a surface of the first diffusion region to cover a peripheral part of the first diffusion region. In the peripheral part of the first diffusion region, crystal defects tend to occur by a process of forming an isolation region and a gate electrode, so that dark current noise tends to occur. The second diffusion region functioning as a protection layer prevents crystal defects in a manufacturing process. The second diffusion region isn't formed on a center of the surface of the first diffusion region where crystal defects don't tend to occur. In the first diffusion region where the second diffusion region isn't formed, the thickness of a depletion layer increases, which improves light detection sensitivity. This improves detection sensitivity of the photodiode without increasing the dark current noise.

Abstract: A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB2VIA composition. A first deposition state is monitored, during the second deposition by making a first plurality of measurements of a first deposition state. The second deposition is terminated or attenuated based on a function of the first plurality of measurements of the indicia of the first deposition state.

Abstract: A method of fabricating metal film stacks is described that reduces or eliminates adverse effects of photolithographic misalignments. A bottom critical dimension is increased by removal of a bottom titanium nitride barrier.

Abstract: A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity.

Abstract: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, a second conductive semiconductor layer under the active layer, a second electrode layer under the second conductive semiconductor layer, and a transmissive conductive layer at least one part between the second conductive semiconductor layer and the second electrode layer.

Abstract: The present invention makes it possible to obtain: a semiconductor device capable of forming a highly reliable upper wire without a harmful influence on the properties of the magnetic material for an MTJ device; and the manufacturing method thereof. Plasma treatment is applied with reducible NH3 or H2 as pretreatment. Thereafter, a tensile stress silicon nitride film to impose tensile stress on an MTJ device is formed over a clad layer and over an interlayer dielectric film where the clad layer is not formed. Successively, a compressive stress silicon nitride film to impose compressive stress on the MTJ device is formed over the tensile stress silicon nitride film. The conditions for forming the tensile stress silicon nitride film and the compressive stress silicon nitride film are as follows: a parallel plate type plasma CVD apparatus is used; the RF power is set in the range of 0.03 to 0.4 W/cm2; and the film forming temperature is set in the range of 200° C. to 350° C.

Abstract: A semiconductor device includes: a copper (Cu) wire having a first region and a second region in which densities of silicon (Si) and oxygen (O) atoms are higher than in the first region; a compound film that is selectively formed on the Cu wire and contains Cu and Si; and a dielectric film formed on a side surface side of the Cu wire.

Abstract: In a side view type light emitting diode (LED) package, a lead frame portion and lead frame electrical contact portions are exposed outside a package body to serve as an additional heat dissipation path. The side view type LED package includes an LED chip, a package body having a side surface with an opening for receiving the LED chip, and lead frames for applying a current to the LED chip. The lead frames include inner leads electrically connected to the LED chip within the package body; electrical contact lower legs extending from the inner leads to a lower portion of the package body and exposed outside the package body in the vicinity of a lower surface of the package body perpendicular to the side surface; and a heat dissipation means extending, separately from the electrical contact lower legs, from at least one of the inner leads outside the package body.

Abstract: A Group-III nitride semiconductor substrate having a flat surface with a dangling bond density of higher than 14.0 nm?2 is produced by cleaning the surface having a dangling bond density of higher than 14.0 nm?2 with a cleaning agent containing an ammonium salt.

Abstract: It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFF, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.

Abstract: The use of a poly(arylene ether) polymer as a passivation or gate dielectric layer in thin film transistors. This poly(arylene ether) polymer includes polymer repeat units of the following structure: —(O—Ar1—O—Ar2—O—)m—(—O—Ar3—O—Ar4—O)n— where Ar1, Ar2, Ar3, and Ar4 are identical or different aryl radicals, m is 0 to 1, n is 1?m, and at least one of the aryl radicals is grafted to the backbone of the polymer.

Abstract: Disclosed herein are multilayer electronic devices comprising a high dielectric constant polymer composite layer that contains conductive components for embedded capacitor applications.

Abstract: A method for patterning CNTs on a wafer wherein a CNT layer is provided on a substrate, a hard mask film is deposited on the CNT layer, a BARC layer (optional) is coated on the hard mask film, and a resist is patterned on the BARC layer (or directly on the hard mask film if the BARC layer is not included). Then, the resist pattern is effectively transferred to the hard mask film by etching the BARC layer (if provided) and etching partly into, but not entirely through, the hard mask film (i.e., etching is stopped before reaching the CNT layer). Then, the resist and the BARC layer (if provided) is stripped, and the hard mask pattern is effectively transferred to the CNTs by etching away (preferably by using C1, F plasma) the portions of the hard mask which have been already partially etched away.

Abstract: A warm white light emitting apparatus includes a first light emitting diode (LED)-phosphor combination to generatea base light that is white or yellowish white and a second LED-phosphor combination to generate a Color Rendering Index (CRI) adjusting light. The base light the CRI adjusting light together make a warm white light having a color temperature of 2500 to 4500 K.

Abstract: A tunable voltage isolation ground to ground ESD clamp is provided. The clamp includes a dual-direction silicon controlled rectifier (SCR) and trigger elements. The SCR is coupled between first and second grounds. The trigger elements are also coupled between the first and second grounds. Moreover, the trigger elements are configured to provide a trigger current to the dual-direction silicon controlled rectifier when a desired voltage between the first and second grounds is reached.

Abstract: A semiconductor device including an N-channel insulated gate field effect transistor and a P-channel insulated gate field effect transistor, the device having: a first insulating layer and a second insulating layer; and gate electrode contact plugs. Each of the gate electrodes of the N-channel insulated gate field effect transistor and the P-channel insulated gate field effect transistor is buried in a gate electrode formation opening provided in the first insulating layer.

Abstract: A reflex coupler has an organic light emitter for generating a light signal and an inorganic photodetector with a detector area. The organic light emitter and the detector area are optically coupled as a result of radiation returned from an object onto which the light signal impinges, and the organic light emitter and the inorganic photodetector are integrated in one device.

Abstract: A method for generating a layout, use of a transistor layout, and semiconductor circuit is provided that includes a matching structure, which has a number of transistors, whose structure is similar to one another, metallization levels with geometrically formed traces, which are formed directly above the transistors, and vias (in via levels), which are formed between two of the metallization levels. Whereby, within one and the same metallization level, the geometry of the traces above each transistor is formed the same.

Abstract: For electrically connecting a wiring formed on one surface of an insulating substrate such as an FPC to an individual electrode arranged facing the other surface of the substrate, firstly, a through hole and a notch are formed by irradiating a laser beam from above onto the FPC. Next, the FPC is arranged to be positioned such that the individual electrode, the through hole and the notch are overlapped in a plan view. Next, an electroconductive liquid droplet having a diameter greater than a width of the notch is jetted, toward an area formed with the notch, from the one surface side of the FPC. The landed electroconductive liquid droplet flows along the notch in a thickness direction of the substrate due to an action of a capillary force and reaches assuredly to the individual electrode, thereby electrically connecting the wiring and electrode arranged sandwiching the insulating substrate assuredly.

Abstract: An MEMS transducer is constituted of a diaphragm, a plate, a support structure for supporting the diaphragm and the plate with a gap layer surrounded by an interior wall, an electrode film (e.g. a pad conductive film) for covering a contact hole formed in the support structure, and a protective film (e.g. a pad protective film) which is formed on the support structure externally of the interior wall so as to cover the side surface of the electrode film having low chemical stability. The protective film is formed in the limited area including a part of the surface of the electrode film except for its center portion and the surrounding area of the electrode film. This allows the protective film to use materials having high membrane stress such as silicon nitride or silicon nitride oxide.