Abstract: One embodiment of the present invention provides an integrated circuit chip, including an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The integrated circuit chip additionally comprises an electromagnetic via that facilitates communication between signal pads on the integrated circuit chip and signal pads on a second integrated circuit chip. The electromagnetic via couples a signal pad on the active face of the integrated circuit chip to the back face of the integrated circuit chip so that the integrated circuit chip can communicate with the second integrated circuit chip while the back face of the integrated circuit chip is adjacent to the active face of the second integrated circuit chip. Moreover, the electromagnetic via operates by facilitating non-conductive signaling through the integrated circuit chip.

Abstract: A device includes a microphone array fixed to the device. A signal processor produces an audio output using audio beamforming with input from the microphone array. The signal processor aims the beamforming in a selected direction. An orientation sensor—such as a compass, an accelerometer, or an inertial sensor—is coupled to the signal processor. The orientation sensor detects a change in the orientation of the microphone array and provides an orientation signal to the signal processor for adjusting the aim of the beamforming to maintain the selected direction. The device may include a camera that captures an image. An image processor may identify an audio source in the image and provide a signal adjusting the selected direction to follow the audio source. The image processor may receive the orientation signal and adjust the image for changes in the orientation of the camera before tracking movement of the audio source.

Abstract: In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.

Abstract: A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.

Abstract: In a non-insulated DC-DC converter having a circuit in which a power MOS•FET high-side switch and a power MOS•FET low-side switch are connected in series, the power MOS•FET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOS•FET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOS•FET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.

Abstract: A microphone system, includes: a housing, adapted to be placed in a reference position relative to a sound source; a first microphone, configured to receive sound from the sound source at a first position within the housing; a second microphone, configured to receive sound from the sound source at a second position within the housing; and a differential signal generator, wherein: the first and second positions are arranged on a first line; and the first line perpendicularly intersects a second line that is extended from the sound source at a third position which is not between the first and second positions, and obliquely intersects a third line that is extended from the sound source at a fourth position which is between the first and second positions, when the housing is placed at the reference position.

Abstract: A magnetic resonance imager performing images of a patient imager includes imaging coils. The imager includes receiver coils The imager includes a computer that causes the imaging coils to produce a first steady-state free precession excitation slab with respect to a first position regarding a target of the patient during a first repetition time, and a second steady-state free precession excitation slab with respect to a second position different from the first position regarding the target during a second repetition time; and forming a first 3-D dataset of the target associated with the first excitation slab and a second 3-D image dataset of the target associated with the second excitation slab from information received from the receiver coils. The first 3-D image dataset and the second 3-D image dataset, together defining a series of 3-D image datasets for each repetition time; and producing an image of the target from the series of 3-D image datasets. A method for analyzing a patient.

Abstract: A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding electrode electrically isolated from the data line, covering the data line at least in part, and having an aperture exposing the data line.

Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.

Abstract: Methods of forming non-volatile memory cell structures are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers in reverse and normal mode floating node memory cells that allow for direct tunnel programming and erase, while maintaining high charge blocking barriers and deep carrier trapping sites for good charge retention. The low voltage direct tunneling program and erase capability reduces damage to the gate stack and the crystal lattice from high energy carriers, reducing write fatigue and enhancing device lifespan. The low voltage direct tunnel program and erase capability also enables size reduction through low voltage design and further device feature scaling. Such memory cells also allow multiple bit storage. These characteristics allow such memory cells to operate within the definition of a universal memory, capable of replacing both DRAM and ROM in a system.

Abstract: A system and method is disclosed for bonding a substrate to a semiconductor die that is prone to curling when subjected to an elevated temperature in a solder reflow oven, for example, thereby improving the electrical and mechanical bonding for large dies, wafers, chips, and photovoltaic cells. In one embodiment, the substrate is adapted to curl to the same degree as the die to form a uniform gap between the substrate and die across the boundary there between. In another embodiment, solder used to bond the die and substrate is applied such that the volume deposited varies based on the expected gap between the die and substrate when heated to the melting temperature of the solder.

Abstract: Diodes having p-type and n-type regions in contact, having at least one of either the p-type region or n-type region including a conjugated organic material doped with an immobile dopant, conjugated organic materials for incorporation into such diodes, and methods of manufacturing such diodes and materials are provided.

Abstract: Magnetoelectronic devices are fabricated by joining the edge of one ferromagnetic thin film element with the top, or bottom, portion of a second ferromagnetic, or nonmagnetic, thin film element. The devices also employ a new operational geometry in which the transport of bias current is in the film plane of at least one of the thin film elements, but is substantially perpendicular to the film plane of at least one of the thin film elements. Additionally, any of the variety magnetoelectronic devices (e.g., current-in-plane spin valves, current-perpendicular-to-the-plane spin valves, magnetic tunnel junctions, and lateral spin valves can be fabricated using these features.

Abstract: Described is a modulatable injection barrier and a semiconductor element comprising same. More particularly, the invention relates to a two-terminal, non-volatile programmable resistor. Such a resistor can be applied in non-volatile memory devices, and as an active switch e.g. in displays. The device comprises, in between electrode layers, a storage layer comprising a blend of a ferro-electric material and a semiconductor material. Preferably both materials in the blend are polymers.

Abstract: A device for optical communication including a substrate for mounting an IC chip, and a multilayered printed circuit board. An optical path for transmitting optical signal which penetrates the substrate for mounting an IC chip is formed in the substrate for mounting an IC chip.

Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.

Abstract: A light emitting diode package having heat dissipating slugs is provided. The light emitting diode package comprises first and second heat dissipating slugs formed of a conductive material and spaced apart from each other; a package main body coupled to the first and second heat dissipating slugs to support the first and second heat dissipating slugs; and a light emitting diode die electrically connected to the first and second heat dissipating slugs, wherein the respective first and second heat dissipating slugs are exposed to the outside through lower and side surfaces of the package main body. As such, the first and second heat dissipating slugs can be used as external leads.

Abstract: A noise reduction system includes multiple transducers that generate time domain signals. A transforming device transforms the time domain signals into frequency domain signals. A signal mixing device mixes the frequency domain signals according to a mixing ratio. Frequency domain signals are rotated in phase to generate phase rotated signals. A post-processing device attenuates portions of the output based on coherence levels of the signals.

Abstract: An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation particles intersect the device layer can be calculated with coarse precision (e.g., to within 10 s of microns).

Abstract: The invention provides a method for manufacturing array microphones. First, signal delays of a plurality of microphones are measured. The microphones are then categorized into a plurality of categories according to the signal delays. A plurality of array microphones are then assembled with a number of component microphones selected from the same categories.