Patents Examined by Xiaoliang Chen
  • Patent number: 11013130
    Abstract: A display device includes a display panel including a display area on which a plurality of display elements is disposed and a non-display area on which one or more wires for driving the plurality of display elements are disposed. A back cover is attached to one surface of the display panel and has a plurality of openings. A roller unit winds or unwinds the back cover and the display panel, and a lifting unit moves the back cover and the display panel in a vertical direction. The plurality of openings overlaps the display panel, and each of the plurality of openings is disposed to be staggered with one or more of the openings in an adjacent row. A size of the back cover is larger than a size of the display panel.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 18, 2021
    Assignee: LG Display Co., Ltd.
    Inventors: Mi-Na Shin, ChounSung Kang, SunBok Song, GeunChang Park, Moonsun Lee
  • Patent number: 11006527
    Abstract: An aspect includes one or more board layers. A first chip cavity is formed within the one or more board layers, wherein a first Josephson amplifier or Josephson mixer is disposed within the first chip cavity. The first Josephson amplifier or Josephson mixer comprises at least one port, each port connected to at least one connector disposed on at least one of the one or more board layers, wherein at least one of the one or more board layers comprises a circuit trace formed on the at least one of the one or more board layers.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: May 11, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Baleegh Abdo, Nicholas T. Bronn, Oblesh Jinka, Salvatore B. Olivadese
  • Patent number: 11006521
    Abstract: Provided are a wiring base plate and the like including an insulating substrate including a first surface portion including an aluminum oxide-based sintered body and a mullite-based sintered body; and a metallization layer including a second surface portion, the second surface portion containing at least one of a manganese compound and a molybdenum compound and being in contact with the first surface portion of the insulating substrate; wherein the second surface portion of the metallization layer and the first surface portion of the insulating substrate contain at least one of a manganese silicate phase and a magnesium silicate phase.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: May 11, 2021
    Assignee: KYOCERA Corporation
    Inventors: Isamu Kirikihira, Makoto Yamamoto
  • Patent number: 10999929
    Abstract: The present disclosure describes expansion card interfaces for a printed circuit board and methods of making the same. The methods include forming electrical pads of the expansion card interface on a substrate, and dividing at least one electrical pad into a first portion and a second portion. The resulting expansion card interfaces have the first portion conductively coupled to a circuit on the printed circuit board, and the second portion conductively isolated from the first portion.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: May 4, 2021
    Assignee: QUANTA COMPUTER INC.
    Inventors: Che-Wei Chang, Cheng-Hsien Lee
  • Patent number: 10993314
    Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: April 27, 2021
    Assignee: Amphenol Corporation
    Inventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
  • Patent number: 10984957
    Abstract: A capacitor comprises a housing and a first stack of parallel plates within the housing. A first plate and a second plate in the first stack are capacitively coupled. The capacitor comprises a second stack of parallel plates within the housing. A third plate and a fourth plate in the stack are capacitively coupled. The capacitor also comprises a first input electrode and a second input electrode. The capacitor also comprises a first output electrode and a second output electrode on a side surface of the capacitor. The capacitor also comprises a dielectric material located between each plate in the first stack and the second stack. The first stack is not capacitively coupled with the second stack.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: April 20, 2021
    Assignee: International Business Machines Corporation
    Inventors: Samuel R. Connor, Stuart Brett Benefield, Matthew Doyle
  • Patent number: 10980119
    Abstract: A display device and a method of manufacturing the display device are capable of substantially minimizing damage to a display panel. The display device includes: a first substrate including a display area and a pad area; a polarization film disposed at an upper surface of the first substrate to overlap the display area; a flexible printed circuit board disposed at a lower surface of the first substrate; a via hole defined through the first substrate at the pad area; and a connection metal located at the via hole. The connection metal includes a connection portion disposed in the via hole and a first protruding portion that protrudes with respect to the first substrate, and the polarization film is spaced apart from the via hole in a plan view.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: April 13, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Junwoo You, Atsushi Nemoto, Byoungdae Ye, Taeho Lee
  • Patent number: 10980127
    Abstract: A method is provided for forming a printed circuit board (PCB) assembly. The method may include drilling a first plurality of vias having a first diameter in a PCB and filling the first plurality of vias to form a first plurality of plated or filled vias. The method may also include drilling a second plurality of vias having a second diameter in the PCB, and filling the second plurality of vias to form a second plurality of plated or filled vias. The first plurality of plated or filled vias is mixed with the second plurality of plated or filled vias such that the spacing between the first plurality of plated or filled vias and the second plurality of plated or filled vias is less than the first diameter and the second diameter.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: April 13, 2021
    Assignee: TTM Technologies Inc.
    Inventors: Michael Len, Chong Mei, Michael Lugert, Raj Kumar
  • Patent number: 10980129
    Abstract: An asymmetric electronic substrate and method of making the substrate includes forming a first layer on each opposing major surface of a removable carrier layer, the first layer being a routing layer, simultaneously laminating the first layers, and building up subsequent layers on layers previously formed and laminated on the removable carrier layer iteratively. The subsequent layers including routing layers and a core layer formed on each side of the removable carrier layer, the core layer including through holes having a larger gauge than through holes included in the routing layers. A number of layers on a first side of the core layer, between the core layer and the carrier layer, is different than a number of layers on a second side of the core layer. The carrier layer is removed to produce two asymmetric substrates, each asymmetric substrate including one of the at least one core layers.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: April 13, 2021
    Assignee: Intel Corporation
    Inventors: Sri Chaitra Jyotsna Chavali, Amruthavalli Pallavi Alur, Wei-Lun Kane Jen, Sriram Srinivasan
  • Patent number: 10973116
    Abstract: Embodiments are generally directed to 3D high-inductive ground plane for crosstalk reduction. An embodiment of a printed circuit board includes a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting; a second layer below the first layer; a third layer below the second layer; and a three-dimensional (3D) ground plane, the 3D ground plane including a first plurality of segments on the third layer, a second plurality of segments on the second layer, and a plurality of metal vias to connect the first plurality of segments and the second plurality of segments in the ground plane.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Jackson Chung Peng Kong, Bok Eng Cheah, Khang Choong Yong, Ramaswamy Parthasarathy
  • Patent number: 10973135
    Abstract: A display device includes a display panel including a display area on which a plurality of display elements is disposed and a non-display area on which one or more wires for driving the plurality of display elements are disposed. A back cover is attached to one surface of the display panel and has a plurality of openings. A roller unit winds or unwinds the back cover and the display panel, and a lifting unit moves the back cover and the display panel in a vertical direction. The plurality of openings overlaps the display panel, and each of the plurality of openings is disposed to be staggered with one or more of the openings in an adjacent row. A size of the back cover is larger than a size of the display panel.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 6, 2021
    Assignee: LG Display Co., Ltd.
    Inventors: Mi-Na Shin, ChounSung Kang, SunBok Song, GeunChang Park, Moonsun Lee
  • Patent number: 10966324
    Abstract: A wiring board, a multilayer wiring board, and a method of manufacturing a wiring board adapted to make the filling of through holes and the formation of fine wiring patterns. The wiring board comprises an insulator; a through hole between front and back surfaces of the insulator; a through hole conductor for electrically connecting front and back surface side openings; through hole lands around the front and the back surface side openings, and connected to the through hole conductor; lid plating conductors on the front and the back surface sides, and placed on the respective through hole lands; and wiring patterns formed on the front are compatible and the back surface of the insulator. The thickness of the through hole lands is 1.0 ?m or more and 10.0 ?m or less, and the area of each lid plating conductor is less than the area of each through hole land.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: March 30, 2021
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Yasuyuki Hitsuoka
  • Patent number: 10964474
    Abstract: According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: March 30, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiichiro Matsuo, Susumu Obata, Mitsuo Sano, Kazuhito Higuchi, Kazuo Shimokawa
  • Patent number: 10952321
    Abstract: A printed circuit board according to one aspect of the present invention includes an insulating layer having a through-hole, a conductive layer laminated on an inner circumferential surface of the through-hole, and metal plating layers laminated on a surface of the conductive layer facing opposite the insulating layer and laminated on both surfaces of the insulating layer, wherein an average thickness of the insulating layer is greater than or equal to 5 ?m and less than or equal to 50 ?m, wherein an average thickness of the metal plating layers is greater than or equal to 3 ?m and less than or equal to 50 ?m, wherein a hole diameter of the through-hole gradually increases from a first end of the through-hole at one surface of the insulating layer to a second end of the through-hole at another surface of the insulating layer, wherein the hole diameter of the through-hole at the first end is greater than or equal to 1.5 times, and less than or equal to 2.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: March 16, 2021
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kenji Takahashi, Koji Nitta, Shoichiro Sakai, Junichi Okaue
  • Patent number: 10952323
    Abstract: An electronic assembly and a method of forming an electronic assembly. The electronic assembly including a printed circuit board including a first face, a flexible printed circuit connected to the first face of the printed circuit board, a filler component arranged over a first portion of the first face of the printed circuit board, a housing defining a cavity, wherein the filler component is arranged in the cavity, a channel guide extending from the housing, wherein the flexible printed circuit sits in the channel guide, and a substrate positioned adjacent to a second face of the printed circuit board, wherein the second face opposes the first face.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: March 16, 2021
    Assignee: DUS OPERATING INC.
    Inventors: Ron G. Gipson, Bhanumurthy Veeragandham, Indraneel Page
  • Patent number: 10939557
    Abstract: An organic light emitting display apparatus is provided that includes a display panel, a first source printed circuit board connected to the display panel in a first direction, and including a first memory disposed in an area of first source printed circuit board, a second source printed circuit board connected to the display panel in the first direction, and a control printed circuit board disposed between the first source printed circuit board and the second source printed circuit board, and connected to each of the first source printed circuit board and the second source printed circuit board. Here, a direction in which the control printed circuit board and the first source printed circuit board are connected and a direction in which the control printed circuit board and the second source printed circuit board are connected are a second direction different from the first direction.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: March 2, 2021
    Assignee: LG Display Co., Ltd.
    Inventors: JinSol Choi, ByungChan Song, ChangIn Kim, YongKyu Park
  • Patent number: 10939579
    Abstract: A fan guard connector is provided. The fan guard connector includes a fan guard structure configured to be secured to a cooling system. The fan guard connector also includes a lever structure connected to the fan guard structure by a pivot element. The lever structure is configured to rotate between an engaged and a disengaged position. The fan guard connector also includes a connector member configured to secure the lever structure to the fan guard structure in the engaged position.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: March 2, 2021
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yaw-Tzorng Tsorng, Chun Chang, Cheng-Chieh Weng, Chih-Hao Chang
  • Patent number: 10939564
    Abstract: A circuit board includes a substrate, an input binding region and at least two output binding regions disposed on the substrate. Each of the output binding regions includes a plurality of binding portions, and the number of the binding portions included in different output binding regions is different. The substrate is configured to output a signal received by the input binding region to respective binding portions included in each of the output binding regions.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: March 2, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Enming Xie, Dongxu Han, Wenchao Bao, Chun Cao
  • Patent number: 10939537
    Abstract: Systems and methods for a printed circuit board assembly comprising a thermoelectric device at least partially embedded within the printed circuit board assembly are provided. The thermoelectric device is configured to adjust a temperature of the printed circuit board assembly based on the measurements of one or more sensors coupled to the printed circuit board assembly. Additionally, a control circuit is coupled to the at least one thermoelectric device and the one or more sensors, wherein the control circuit is configured to control the at least one thermoelectric device, and wherein the control circuit is configured to monitor a temperature set point at one or more target locations in the printed circuit board assembly.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: March 2, 2021
    Assignee: Honeywell International Inc.
    Inventors: Pedro Luis Lebron, Alejandro José Fernández
  • Patent number: 10932374
    Abstract: A process for deforming a flex circuit using a fixture assembly including a base plate having a recess, a wrinkle reducer plate, a stiffening block and a punch. The process including heating the fixture assembly; applying a force to the punch deforming the flex circuit into the recess in the base plate; holding the punch in contact with the flex circuit while heating the fixture assembly; cooling the fixture assembly with the punch in contact with the flex circuit; subsequent to cooling the fixture assembly, removing the force of the punch; and removing the flex circuit from the fixture assembly. The flex circuit having a recessed portion resulting from deforming the flex circuit into the recess in the base plate and a flat portion surrounding the recessed portion.
    Type: Grant
    Filed: February 15, 2020
    Date of Patent: February 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arthur Higby, James Busby, David C. Long, Robert Weiss, Michael Fisher, Tristen Gaudette