Patents Examined by Xiaoliang Chen
  • Patent number: 11910540
    Abstract: Embodiments and fabrication methods for a printed circuit board comprising two or more electrically conductive layers, including at least a first conductive layer opposing and adjacent to a second conductive layer. Also including one or more electrically non-conductive layers including at least a first non-conductive layer disposed between the first conductive layer and the second conductive layer. A first copper pad is included on the first conductive layer. A second copper pad is included on the second conductive layer. There is a conductive via extending through the first non-conductive layer and electrically connecting the first copper pad to the second copper pad and solder mask material on the first copper pad around the via.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: February 20, 2024
    Inventors: Pui Yin Yu, Hong Tu Zhang
  • Patent number: 11908768
    Abstract: Forming aluminum circuit layers forming an aluminum circuit layers on one surface of a ceramic substrate and forming copper circuit layers are included. The copper circuit layers are formed by laminating copper boards for the circuit layers on the respective aluminum circuit layers, arranging the laminate between a pair of support boards having a convex curved surface at least on one surface so as to face to each other, moving the support boards in a facing direction to press the laminate in a lamination direction, and heating in this pressing state so that the copper boards for the circuit layers are bonded on the aluminum circuit layers respectively by solid phase diffusion. In the step of forming the copper circuit layers, the support boards are arranged so that either one of the convex curved surface is in contact with the adjacent copper boards for the circuit layers in the laminate.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: February 20, 2024
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventors: Ryohei Yumoto, Tomoya Oohiraki, Takeshi Kitahara, Yoshiyuki Nagatomo
  • Patent number: 11910520
    Abstract: Vias may be established in printed circuit boards or similar structures and filled with a monolithic metal body to promote heat transfer. Metal nanoparticle paste compositions, such as copper nanoparticle paste compositions, may provide a ready avenue for filling the vias and consolidating the metal nanoparticles under mild conditions to form each monolithic metal body. The monolithic metal body within each via can be placed in thermal contact with one or more heat sinks to promote heat transfer. Adherence of the monolithic metal bodies within the vias may be promoted by a coating upon the walls of the vias. A tin coating, for example, may be particularly suitable for promoting adherence of a monolithic metal body comprising copper.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: February 20, 2024
    Assignee: Kuprion Inc.
    Inventor: Alfred A. Zinn
  • Patent number: 11903126
    Abstract: The laminate of the present disclosure includes multiple glass ceramic layers each containing quartz and a glass that contains SiO2, B2O3, Al2O3, and M2O, where M is an alkali metal. The B concentration of a surface layer portion of the laminate is lower than the B concentration of an inner layer portion of the laminate.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: February 13, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Sadaaki Sakamoto, Yutaka Senshu, Yasutaka Sugimoto
  • Patent number: 11903129
    Abstract: A printed circuit board includes: a first insulating material; and a second insulating material disposed on one surface of the first insulating material, and including first and second cavities having depths different from each other. At least one groove portion is disposed in a side surface of each of the first and second cavities.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: February 13, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chi Seong Kim, Won Seok Lee, Guh Hwan Lim, Jin Uk Lee, Jin Oh Park
  • Patent number: 11894342
    Abstract: Methods and systems for stacking multiple chips with high speed serializer/deserializer blocks are presented. These methods make use of Through Via (TV) to connect the dice to each other, and to the external pads. The methods enable efficient multilayer stacking that simplifies design and manufacturing, and at the same time, ensure high speed operation of serializer/deserializer blocks, using the TVs.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: February 6, 2024
    Assignee: BroadPak Corporation
    Inventor: Farhang Yazdani
  • Patent number: 11877386
    Abstract: An injection molded article is provided with: a flat molded resin body that has a flat rectangular parallelepiped shape and is formed from an injection molded resin; and a base sheet affixed to the surface of the molded resin body. The base sheet has formed therein a first conductive layer on a first surface and a through hole passing through from the first surface to a second surface. The through hole is filled with a conductive material, and a second conductive layer is formed so as to be electrically connected with the first conductive layer via the conductive material with which the through hole is filled. In addition, a sealing material is formed on the first conductive layer so as to cover the through hole. The molded resin body is fixed together with the first surface side of the base sheet so as to cover the sealing material.
    Type: Grant
    Filed: January 16, 2023
    Date of Patent: January 16, 2024
    Assignee: NISSHA CO., LTD.
    Inventor: Yasuisa Takinishi
  • Patent number: 11871526
    Abstract: A circuit board includes a substrate, a first circuit layer, a second circuit layer, and a third circuit layer. The substrate includes a base layer, a first metal layer formed on the base layer, and a seed layer formed on the first metal layer. The first circuit layer is located on the substrate and includes the first metal layer and a signal layer formed on a surface of the first metal layer. The second circuit layer is coupled to the first circuit layer and includes the first metal layer, the seed layer, and a connection pillar formed on a surface of the first metal layer and the seed layer. The third circuit layer is coupled to the second circuit layer and includes the seed layer and a coil formed on a surface of the seed layer.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: January 9, 2024
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventor: Jun Dai
  • Patent number: 11871507
    Abstract: An electronic device includes a casing, a circuit board and at least one antenna module. The casing has an accommodating space and an inner side wall surrounding the accommodating space. The circuit board is disposed in the accommodating space. Each of the antenna modules includes a first radiator and a second radiator. The first radiator is disposed on the circuit board and adjacent to the inner side wall, and includes a first section, a second section and a third section extending from the first section in opposite directions respectively. The first section includes a feeding end, and the third section includes a grounding end. The second radiator is disposed on the inner side wall. A coupling gap is formed between the first radiator and the second radiator.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: January 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Cheng-Jui Huang, Hao-Hsiang Yang, Shih-Keng Huang
  • Patent number: 11860460
    Abstract: A button deck assembly includes a button deck having at least one mechanical pushbutton, the pushbutton includes a lens cap, a liquid-crystal display (LCD) panel, and an optical block configured to transmit images from the LCD panel for display through the lens cap, a bottom surface of the optical block is positioned on the LCD panel, an air gap is defined between a top surface of the optical block and the lens cap. The assembly also includes a printed circuit board (PCB) assembly defining a PCB aperture, the PCB aperture is sized to receive the optical block, and an elastomeric membrane defining a membrane aperture sized to receive the optical block, the optical block extends from the LCD panel through the PCB and membrane apertures, the membrane channels fluid flow to outer edges of the membrane and around the PCB assembly and the LCD panel.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: January 2, 2024
    Assignee: Aristocrat Technologies Australia Pty Limited
    Inventor: Timothy Seckel
  • Patent number: 11856713
    Abstract: A multilayer resin substrate includes a stacked body including resin layers stacked on each other, a first planar conductor on a resin layer, and an interlayer connection conductor on a resin layer. The interlayer connection conductor includes a first interlayer connection conductor connected to an external conductor, and a second interlayer connection conductor bonded to the first interlayer connection conductor and a planar conductor. The first and second interlayer connection conductors are made of different materials. The second interlayer connection conductor includes a constricted portion including a smaller planar cross-sectional area than a different portion, between a bonding portion to which the first interlayer connection conductor is bonded and a bonding portion to which the planar conductor is bonded.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: December 26, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masanori Okamoto, Takeshi Osuga
  • Patent number: 11856708
    Abstract: Disclosed herein are devices comprising stretchable 3D circuits and methods for fabricating the circuits. The fabrication process includes providing in the elastomeric polymer as a substrate and providing conductive interconnects within the substrate encased in an insulating polymer, such as polyimide, to provide a stiffness gradient between the conductive interconnects and the flexible elastomeric substrate. The circuit may be fabricated as a multilayer construction using three-dimensional pillars as vias and as external interconnects to the circuit.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 26, 2023
    Assignee: CARNEGIE MELLON UNIVERSITY
    Inventors: Gary K. Fedder, Rahul Panat, Jacob Brenneman, Derya Z. Tansel
  • Patent number: 11856710
    Abstract: A method of manufacturing an electronic device including the following steps is provided herein. A plurality of first electronic components is provided. The plurality of first electronic components is transferred onto a plurality of pickup sites. An empty pickup site from the plurality of pickup sites may be figured out, wherein the plurality of first electronic components is absent at the empty pickup site. A second electronic component is transferred onto the empty pickup site. A target substrate is provided. The plurality of first electronic components and the second electronic component are transferred onto the target substrate.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: December 26, 2023
    Assignee: Innolux Corporation
    Inventors: Kai Cheng, Fang-Ying Lin, Tsau-Hua Hsieh
  • Patent number: 11848563
    Abstract: An electronic device of an embodiment of the present invention may comprise: a first structure comprising a first plate including a first surface and a second surface facing away from the first surface; a second structure comprising a second plate facing the second surface of the first plate, a first sidewall perpendicular to the second plate, a second sidewall perpendicular to the first sidewall and the second plate, and a third sidewall perpendicular to the first sidewall and the second plate and parallel to the second sidewall, wherein the first sidewall includes a conductive portion, and the second plate, the first sidewall, the second sidewall, and the third sidewall together form a trough with one side open to receive at least a portion of the first structure, and the first structure is movable between an open state and a closed state with respect to the second structure in a first direction parallel to the second plate and the second sidewall such that the first structure is located at a first distance
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: December 19, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yongyoun Kim, Kyungmoon Seol, Minsung Lee, Jinwoo Jung, Soyoung Lee, Jaebong Chun
  • Patent number: 11844175
    Abstract: Disclosed is a method of manufacturing a stretchable substrate having improved stretch uniformity according to various embodiments of the present disclosure in order to implement the above-described object. The method may include forming an auxetic including a plurality of unit structures, and attaching one or more elastic sheets to the auxetic and forming a stretchable substrate.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: December 12, 2023
    Assignee: Korea Institute of Science and Technology
    Inventors: Phillip Lee, SeungJun Chung, HeeSuk Kim, JeongGon Son, SukJoon Hwang
  • Patent number: 11839033
    Abstract: Disclosed are a method of directly patterning a stretchable substrate; and a stretchable electrode fabricated by the method. More particularly, the method of directly patterning a stretchable substrate includes: forming a hydrophilic group on a surface of a stretchable substrate by UV-ozone treatment; forming at least one layer to be etched on the hydrophilic group-formed stretchable substrate, wherein the at least one layer to be etched includes an adhesion enhancing material; forming a photoresist layer on the at least one layer to be etched; exposing the photoresist layer; and patterning the at least one layer to be etched using the exposed photoresist layer, wherein a carbon chain included in the adhesion enhancing material forms ether bonding (R—O—R) with a hydrophilic group formed on the surface of the stretchable substrate.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: December 5, 2023
    Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Soong Ju Oh, Jun Sung Bang
  • Patent number: 11832397
    Abstract: A printed wiring board includes a resin insulating layer, via conductors formed in the resin insulating layer, metal posts formed on the via conductors, respectively, and a solder resist layer formed on the resin insulating layer such that the metal posts have lower portions embedded in the solder resist layer and upper portions exposed from the solder resist layer, respectively. The metal posts are formed such that each of the metal posts has a top portion having a diameter in a range of 0.8 to 0.9 times a diameter of a respective one of the lower portions of the metal posts.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: November 28, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Masashi Awazu, Keisuke Kojima
  • Patent number: 11832395
    Abstract: A method is disclosed for applying an electrical conductor to an electrically insulating substrate, which comprises providing a flexible membrane with a pattern of groove formed on a first surface thereof, and loading the grooves with a composition comprising conductive particles. The composition is, or may be made, electrically conductive. Once the membrane is loaded, the grooved first surface of the membrane is brought into contact with a front or/and back of the substrate. A pressure is then applied between the substrate and the membrane(s) so that the composition loaded to the grooves adheres to the substrate. The membrane(s) and the substrate are separated and the composition in the groove is left on the surface of the electrically insulating substrate. The electrically conductive particles in the composition are then sintered to form a pattern of electrical conductors on the substrate, the pattern corresponding to the pattern formed in the membrane(s).
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: November 28, 2023
    Assignee: Landa Labs (2012) LTD.
    Inventors: Benzion Landa, Naomi Elfassy, Stanislav Thygelbaum
  • Patent number: 11825599
    Abstract: The present invention relates to an electrical device including a printed circuit board (PCB) accommodated in a case, and more particularly, to an air-pocket prevention PCB, an air-pocket prevention PCB module, an electrical device including the same, and a manufacturing method of an electrical device including the same with improved fluidity of a resin material so that air pockets that may occur when the case is filled with the resin material are easily discharged and the resin material may be evenly filled inside the case.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: November 21, 2023
    Assignee: SOLUM CO., LTD.
    Inventors: Jun Kyu Lee, Jeong Man Han, Su Young Kim, Yong Woo Kang, Sang Keun Ji, Dong Kyun Ryu
  • Patent number: 11818842
    Abstract: A circuit board can be configured to access features and controls associated with a third-party circuit board. One or more spring-loaded pins or other connectors can contact one or more interaction points of the third-party circuit boards and form a connection. The circuit board can include a common or generic interface that the connections with the third-party circuit board are routed through by the circuit board. The generic interface can then connect the circuit board and third-party circuit board to external power sources, telecommunication devices, and connection ports. Based on the connection between the circuit board and the third-party circuit board, a user device can be assigned to and remotely access the features and controls of the third-party circuit board.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 14, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: David E. Carrillo, Jin Li, Xingang Guo