Patents Examined by Yaima Rigol
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Patent number: 10884884Abstract: A secondary volume of a remote computational device stores an asynchronous copy of a primary volume of a local computational device. The remote computational device generates a target volume that stores consistent data from the secondary volume, and also generates a plurality of point in time copies at a plurality of instants of time from the target volume. A restoration is made of data in the primary volume to at least one of the plurality of instants of time by using one or more data structures that provide identification of all tracks from the target volume that are to be written to the primary volume for restoring the data in the primary volume.Type: GrantFiled: March 23, 2017Date of Patent: January 5, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David R. Blea, Anthony J. Ciaravella, Marisa F. Roberson, Damian Trujillo
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Patent number: 10852998Abstract: Embodiments disclosed herein provide systems, methods, and computer readable media for sub-cluster recovery in a data storage environment having a plurality of storage nodes. In a particular embodiment, the method provides scanning data items in the plurality of nodes. While scanning, the method further provides indexing the data items into an index of a plurality of partition groups. Each partition group includes data items owned by a particular one of the plurality of storage nodes. The method then provides storing the index.Type: GrantFiled: February 27, 2017Date of Patent: December 1, 2020Assignee: RUBRIK, INC.Inventors: Rohit Shekhar, Hyo Jun Kim, Prasenjit Sarkar, Maohua Lu, Ajaykrishna Raghavan, Pin Zhou
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Patent number: 10846230Abstract: Embodiments of the invention include a machine-readable medium having stored thereon at least one instruction, which if performed by a machine causes the machine to perform a method that includes decoding, with a node, an invalidate instruction; and executing, with the node, the invalidate instruction for invalidating a memory range specified across a fabric interconnect.Type: GrantFiled: December 12, 2016Date of Patent: November 24, 2020Assignee: Intel CorporationInventors: Karthik Kumar, Thomas Willhalm, Francesc Guim Bernat, Brian J. Slechta
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Patent number: 10831409Abstract: Aspects of the present disclosure concern automated volume reconfiguration for volumes assigned to a virtual machine (VM). Properties of a volume controller with respect to a set of input/output (I/O nodes) used to transmit a set of volumes to the VM are analyzed, wherein each volume of the set of volumes is mapped to an I/O node of the set of I/O nodes. Based on the analysis, a reconfiguration action is determined, wherein the reconfiguration action includes migrating at least one volume of the set of volumes to a different I/O node of the set of I/O nodes. The reconfiguration action is then executed.Type: GrantFiled: November 16, 2017Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventor: Gerald F. McBrearty
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Patent number: 10761742Abstract: A method and system for dynamic redundancy in storage systems is described. The method may include receiving a data fragment from a data stream of user data to be archived. The method may further include splitting the data fragment into a first number of data chunks. The method may also include, in response to determining that the data fragment is not a last data fragment in the data stream, generating a second number of additional data chunks based upon, at least in part, the first number of data chunks. The method may additionally include, in response to determining that the data fragment is the last data fragment in the data stream, generating a third number of additional data chunks based upon, at least in part, the first number of data chunks.Type: GrantFiled: June 28, 2016Date of Patent: September 1, 2020Assignee: ACRONIS INTERNATIONAL GMBHInventors: Andrey Neporada, Stanislav Protasov, Serguei M. Beloussov
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Patent number: 10747432Abstract: A storage device includes a first memory having a first access speed, a second memory having a second access speed slower than the first access speed, and a processor coupled to the first memory and the second memory and configured to copy one or a plurality of first data blocks included in a plurality of data blocks stored in the first memory, to the second memory, determine whether a processing amount per unit of time in the first memory reaches a threshold value based on a limit value of the processing amount when the processor receives a read request of a second data block included in the first data blocks, and read the second data block from the first memory when the processing amount does not reach the threshold value, and read the second data block from the second memory when the processing amount reaches the threshold value.Type: GrantFiled: July 26, 2017Date of Patent: August 18, 2020Assignee: FUJITSU LIMIITEDInventors: Hiroki Kimura, Toshiharu Makida
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Patent number: 10740171Abstract: In an information processing apparatus including a first memory storing data, whether the first memory is in a state where the stored data is readable and data is unwritable is determined. When it is determined that the first memory is in the state, whether particular data is stored in the first memory is determined. When it is determined that the particular data is stored in the first memory, whether a second memory is connected to the information processing apparatus is determined. When it is determined that the second memory is connected, the particular data is read from the first memory and is written into the second memory.Type: GrantFiled: December 21, 2015Date of Patent: August 11, 2020Assignee: Canon Kabushiki KaishaInventor: Atsushi Ikeda
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Patent number: 10740038Abstract: Embodiments described herein are related to performing virtual application delivery. In some embodiments, a method includes accessing, at a computing device, a datastore comprising a first virtual disk file mapped to a plurality of virtual disk files separate from the first virtual disk file, wherein each of the plurality of virtual disk files comprises at least one application stored thereon. The method further includes receiving, at the computing device, one or more operations for accessing the first virtual disk file, the one or more operations corresponding to a first application stored on a second virtual disk file of the plurality of virtual disk files. The method further includes redirecting the one or more operations for accessing the first virtual disk file to the second virtual disk file.Type: GrantFiled: August 20, 2018Date of Patent: August 11, 2020Assignee: VMWARE, INC.Inventors: Michael John Wookey, Paul Adam Ryman, Maria Matelle Tarroza, Mallikharjuna Reddy Deva, Stephen Jonathan Parry-Barwick
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Patent number: 10732866Abstract: A processor includes a plurality of memory units, each of the memory units including a plurality of memory cells, wherein each of the memory units is configurable to operate as memory, as a computation unit, or as a hybrid memory-computation unit.Type: GrantFiled: May 15, 2017Date of Patent: August 4, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Dimin Niu, Shuangchen Li, Bob Brennan, Krishna T. Malladi, Hongzhong Zheng
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Patent number: 10705964Abstract: In one embodiment, a processor includes a control logic to determine whether to enable an incoming data block associated with a first priority to displace, in a cache memory coupled to the processor, a candidate victim data block associated with a second priority and stored in the cache memory, based at least in part on the first and second priorities, a first access history associated with the incoming data block and a second access history associated with the candidate victim data block. Other embodiments are described and claimed.Type: GrantFiled: April 28, 2015Date of Patent: July 7, 2020Assignee: Intel CorporationInventors: Kshitij A. Doshi, Christopher J. Hughes
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Patent number: 10705979Abstract: An apparatus, method, program product, and system are disclosed for evicting pages from memory using a neural network. One embodiment of a method for evicting pages from memory using a neural network includes determining state information related to evicting pages from memory. The state information may be determined by a dedicated hardware snooping device that snoops a system bus for the state information. The method includes determining an identifier for a page in memory to be evicted using a neural network. The neural network performs machine learning operations on the state information to identify the page in memory to be evicted. The method includes locating the identified page in memory using the identifier determined by the neural network and evicting the identified page from memory.Type: GrantFiled: October 27, 2017Date of Patent: July 7, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Amanda A. Liem, Matthew R. Ochs, Lennard G. Streat, Brendan M. Wong
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Method, data storage system, and computer-readable recording medium for disk array data distribution
Patent number: 10705744Abstract: A method, a data storage system, and a computer-readable recording medium for disk array data distribution are proposed. The method includes the following steps. The space of a disk array composed of multiple flash storage devices is divided into multiple RAID extents with a same data distribution pattern, where each of the RAID extents includes a first region having multiple first stripes and first strips and also a second region having multiple second stripes and second strips. The first strips in each of the first stripes are evenly distributed among the flash storage devices in a first rotation pattern, and the second strips in each of the second stripes are unevenly distributed among the flash storage devices in a second rotation pattern.Type: GrantFiled: August 21, 2018Date of Patent: July 7, 2020Assignee: QNAP SYSTEMS, INC.Inventor: Chin-Hsing Hsu -
Patent number: 10705987Abstract: A control circuit for controlling memory prefetch requests to system level cache (SLC). The control circuit includes a circuit identifying memory access requests received at the system level cache (SLC), where each of the memory access requests includes an address (ANEXT) of memory to be accessed. Another circuit associates a tracker with each of the memory access streams. A further circuit performs tracking for the memory access streams by: when the status is tracking and the address (ANEXT) points to an interval between the current address (ACURR) and the last prefetched address (ALAST), issuing a prefetch request to the SLC; and when the status is tracking, and distance (ADIST) between the current address (ACURR) and the last prefetched address (ALAST) is greater than a specified maximum prefetch for the associated tracker, waiting for further requests to control a prefetch process.Type: GrantFiled: May 12, 2017Date of Patent: July 7, 2020Assignee: LG ELECTRONICS INC.Inventors: Arkadi Avrukin, Seungyoon Song, Tariq Afzal, Yongjae Hong, Michael Frank, Thomas Zou, Hoshik Kim, Jungsook Lee
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Patent number: 10698815Abstract: To provide enhanced operation of data storage devices and systems, various systems, apparatuses, methods, and software are provided herein. In a first example, a data storage device accumulates write data into a cache storage region prior to committing into an archive storage region and maintains a data structure that tracks the write data in the cache storage region. Responsive to receiving first write data into the cache storage region, the data storage device establishes first tracking elements in the data structure for the first write data in the cache storage region. Responsive to receiving second write data directed to storage locations overlapping the first write data, the data storage device accepts the second write data into the cache storage region and establishes second tracking elements in the data structure for the second write data in the cache storage region without modifying the first tracking elements.Type: GrantFiled: June 30, 2015Date of Patent: June 30, 2020Assignee: Western Digital Technologies, Inc.Inventors: Randall L. Hess, Berck E. Nash, James M. Reiser, Randy L. Roberson, Kris B. Stokes, Jesse L. Yandell
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Patent number: 10691375Abstract: In one example, a memory network may control access to a shared memory that is by multiple compute nodes. The memory network may control the access to the shared memory by receiving a memory access request originating from an application executing on the multiple compute nodes and determining a priority for processing the memory access request. The priority determined by the memory network may correspond to a memory address range in the memory that is specifically used by the application.Type: GrantFiled: January 30, 2015Date of Patent: June 23, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Vanish Talwar, Paolo Faraboschi, Daniel Gmach, Yuan Chen, Al Davis, Adit Madan
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Patent number: 10691554Abstract: Techniques are described for managing access of executing programs to non-local block data storage. In some situations, a block data storage service uses multiple server storage systems to reliably store copies of network-accessible block data storage volumes that may be used by programs executing on other physical computing systems, and snapshot copies of some volumes may also be stored (e.g., on remote archival storage systems). A group of multiple server block data storage systems that store block data volumes may in some situations be co-located at a data center, and programs that use volumes stored there may execute on other computing systems at that data center, while the archival storage systems may be located outside the data center. The snapshot copies of volumes may be used in various ways, including to allow users to obtain their own copies of other users' volumes (e.g., for a fee).Type: GrantFiled: February 3, 2017Date of Patent: June 23, 2020Assignee: Amazon Technologies, Inc.Inventors: Peter N. DeSantis, Atle Normann Jorgensen, Matthew S. Garman, Tate Andrew Certain, Roland Paterson-Jones
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Patent number: 10678470Abstract: Securing redundancy for physical storage devices that are extended in units smaller than physical storage devices configuring one RAID group. When d+r pieces of physical storage devices are connected by connecting r pieces of physical storage devices, a computer: adds v×r pieces of logical chunks; adds n×v pieces of physical storage areas in each additional storage device; changes mapping information to associate n pieces of physical storage areas with v×(d+r) pieces of logical chunks under a mapping condition; in response to a write request of user data, creates redundant data; determines a first logical chunk corresponding to the write request; and respectively writes n pieces of element data including the user data and the redundant data into n pieces of physical storage areas corresponding to the first logical chunk, based on the mapping information.Type: GrantFiled: April 5, 2016Date of Patent: June 9, 2020Assignee: Hitachi, Ltd.Inventors: Takeru Chiba, Shintaro Ito, Mitsuo Hayasaka
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Patent number: 10678703Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: allocate a named portion of the non-volatile storage device; generate, according to a first block size, first block-wise mapping data; translate, using the first block-wise mapping data, logical addresses defined in the named portion to logical addresses defined for the entire non-volatile storage media, which can then be further translated to physical addresses in a same way for all named portions; determine a second block size; generate, according to the second block size, second block-wise mapping data; translate, using the second block-wise mapping data, the logical addresses defined in the name portion to the logical addresses defined for the entire non-volatile storage media.Type: GrantFiled: November 16, 2017Date of Patent: June 9, 2020Assignee: Micron Technology, Inc.Inventor: Alex Frolikov
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Patent number: 10664201Abstract: Provided are a computer program product, system, and method for considering input/output workload and space usage at a plurality of logical devices to select one of the logical devices to use to store an object. A determination is made of a logical device to store the object based on workload scores for each of the logical devices indicating a level of read and write access of objects in the logical device and space usage of the logical devices. The object is written to the determined logical device.Type: GrantFiled: July 24, 2018Date of Patent: May 26, 2020Assignee: International Business Machines CorporationInventors: Matthew J. Anglin, Arthur John Colvig, Michael G. Sisco
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Patent number: 10643707Abstract: An apparatus includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to receive a command from a device to perform a write operation at the non-volatile memory. The command indicates a plurality of logical addresses, data associated with the plurality of logical addresses, and a number of write operations associated with the command.Type: GrantFiled: July 25, 2017Date of Patent: May 5, 2020Assignee: Western Digital Technologies, Inc.Inventors: Thibash Rajamani, Ramesh Chander, Manavalan Krishnan, Brian O'Krafka, Nagi Reddy Chodem