Abstract: A database system includes a plurality of computing devices. Each computing device includes a plurality of processing modules, a computing device operating system, and an application specific operating system. The computing device operating system includes a computing device operating system file system management instruction set. The application specific operating system includes at least one custom file system management instruction set operable to configure operation of a configurable set of processing modules of the plurality of processing modules based on generating a corresponding file system management configuration signal for each processing module of the configurable set of processing modules indicating a selected file system management instruction set of the computing device operating system or the application specific operating system.

Abstract: A power conversion device is provided, which includes: a power conversion circuit that performs power conversion between a primary power and a secondary power; a buffer data accumulation circuit that, in a predetermined buffer cycle, repeatedly acquires data sets relating to a state of the power conversion circuit and store the data sets in a ring buffer; a state monitoring circuit that generates a trigger signal in a case where a state of a predetermined monitoring target satisfies a predetermined condition; and a data replication circuit that, in a case where a trigger signal is generated, stores, in a data storage circuit, a plurality of the data sets accumulated in the ring buffer in a target storage period including a time before a generation time of the trigger signal.

Abstract: An expansion apparatus with a power management function includes a power supply device, an expansion module and a control module. The power supply device includes a controller and an output terminal, and provides a predetermined power through the output terminal. The expansion module includes an input port coupled to the output terminal, and multiple output ports operable to be coupled to multiple electronic apparatuses. The control module has a full-power output mode and a disabled mode, and receives a device identifier provided by the controller through the input port to learn the predetermined power, so as to selectively adjust the output ports to operate in the full-power output mode or the disabled mode based on the predetermined power, thereby limiting a total power consumed by the electronic apparatuses and the expansion module to be less than or equal to the predetermined power.

Abstract: The present disclosure includes apparatuses and methods related to power management in memory. Memory devices with multiple input/output ports may have the ports separately managed to transfer data from the various to a host or other components of the module based on certain power management signaling or constraints. For example, a memory device with multiple ports may be managed to transfer data to a host from one set of ports in response to power management (or other) signaling, and the device may be managed to transfer other data to another memory device in response to different power management (or other signaling). Power management may be done onboard a memory module with or without direction from a host. Power management may be performed by a dedicated integrated circuit. Data may be transferred from or between different classes of memory devices, using different ports, based on power management, e.g., criteria.

Abstract: Introduced herein is a computer-implemented system for creating a digital twin of an electrical system using auto-discovery techniques. The system receives power data from meters in an electrical system. For each meter, the system captures a power profile related to a component connected to the meter and creates a set of delta data representing change in power over time. The system detects correlated changes by comparing the sets of delta data and generates a system dataset by combining the sets of delta data. The system detects echoes of power fluctuations of the electrical system from the system dataset and creates a digital twin of the electrical system.

Abstract: A method for inputting and/or outputting signals having a selectable sample rate in a time-synchronized manner on a group of input and/or output channels of an electronic circuit includes: configuring each channel of the group at a standard sample period; synchronously initiating all the channels of the group at the standard sample period; detecting an entry for a modified sample period TPeriod of a first channel of the group; detecting a current counter value TCounter; configuring the first channel at the modified sample period; establishing a waiting time of TWaiting clocks in accordance with TWaiting=TPeriod?mod(TCounter, TPeriod), where mod (TCounter, TPeriod) denotes the division remainder from the current counter value TCounter and the modified sample period TPeriod; and initiating the first channel after the waiting time TWaiting.

Abstract: The present disclosure provides intelligent radio frequency interference mitigation in a computing platform. The computing platform includes a processor, a memory, a system clock and a wireless network interface. The system clock can be controlled so that the processor and/or the memory may operate at a slow frequency or a fast frequency. The wireless network may operate on a radio channel that experiences radio frequency interference at the fast frequency. The system clock may be intelligently controlled to select the slow frequency to reduce radio frequency interference to prioritize execution of a network application, or to select the fast frequency to increase processor speed and prioritize execution of a local application.

Abstract: A distributed power network includes a power bus infrastructure distributed over a region with node points provided to interface with controllable power nodes. Each power node can be connected to an external power device such as a DC power sources, a DC power load, or a rechargeable DC battery. The power nodes form a communication network and cooperate with each other to receive input power from DC power sources and or rechargeable DC batteries connected to the power bus infrastructure and distribute the power received therefrom to the power bus infrastructure for distribution to the DC power loads and to rechargeable DC batteries.

Abstract: In an electronic device capable of running multiple software applications concurrently, applications, documents, cards, or other activities can be selected for hibernation so as to free up system resources for other activities that are in active use. A determination is made as to which activities should hibernate, for example based on a determination as to which activities have not been used recently or based on relative resource usage. When an activity is to hibernate, its state is preserved on a storage medium such as a disk, so that the activity can later be revived in the same state and the user can continue with the same task that was being performed before the activity entered hibernation.

Abstract: Techniques are disclosed for deploying a computing resource (e.g., a service) in response to user input. A computer-implemented method can include operations of receiving (e.g., by a gateway computer of a cloud-computing environment) a request comprising an identifier for a computing component of the cloud-computing environment. The computing device receiving the request may determine whether the identifier exists in a routing table that is accessible to the computing device. If so, the request may be forwarded to the computing component. If not, the device may transmit an error code (e.g., to the user device that initiated the request) indicating the computing component is unavailable and a bootstrap request to a deployment orchestrator that is configured to deploy the requested computing component. Once deployed, the computing component may be added to a routing table such that subsequent requests can be properly routed to and processed by the computing component.

Abstract: The example computing device includes a universal serial bus (USB) port to provide a data connection and power to a connected device. The example computing device also includes a controller to control a power state of the USB port during a reboot process of the computing device. The example computing device further includes a basic input/output system (BIOS) to send a port reboot setting to the controller. The port reboot setting defines a power-off time period that the USB port is to be powered off during the reboot process.

Abstract: A node, that includes a processor executing a first operating system, a peripheral port connected to a peripheral device, where the peripheral port is configured to block access to the peripheral device, a system control processor executing a second operating system, where the system control processor is configured to perform a method for providing access of the peripheral device to the first operating system, the method that includes receiving a peripheral access message from a remote authentication server, where the peripheral access message includes a peripheral device identifier associated with the peripheral device, and in response to receiving the peripheral access message, unblocking the access to the peripheral device.

Abstract: An edge device, method and computer program product may perform, include or cause performance of various operations. The operations include determining an amount of electrical energy that an edge device is expected to have available from a local renewable energy system during each of a plurality of time periods and determining an amount of electrical energy that the edge device is expected to use for operations during each of the plurality of time periods. The operations further include identifying a first one of the time periods for which the determined amount of electrical energy that the edge device is expected to have available from the local renewable energy system is greater than the determined amount of electrical energy that the edge device is expected to use for operations and causing a cooling system that cools the edge device to perform an overcooling operation during the identified first time period.

Abstract: Provided are a memory control method and an electronic device performing the method. A memory control method according to an embodiment may include measuring an internal temperature of a processor by a thermal manage unit, predicting a leakage current of a first memory based on the internal temperature and a voltage applied to the first memory, and controlling the operation of the first memory. The processor may access a second memory following accessing the first memory.

Abstract: Methods, systems, and devices for tracking a reference voltage (also referred to as VREFD) after boot-up are described. For example, a host device or a memory device may determine a temperature value associated with the memory device. The host device or the memory device may select a reference voltage offset value for the memory device based on mapping the temperature value associated with the memory device to a relationship between reference voltage offset values and temperature differential values associated with the memory device. The host device or the memory device may adjust a reference voltage value associated with the memory device based on the reference voltage offset value. The host device, or the memory device, may operate the memory device in accordance with the reference voltage value based on adjusting the reference voltage value.

Abstract: Various embodiments of the present disclosure relate to monitoring the integrity of power signals within memory systems. A method can include receiving a power signal at a memory component, and monitoring, via a power signal monitoring component of the memory component, an integrity characteristic of the power signal. Responsive to the integrity characteristic meeting a particular criteria, the method can include providing a status indication to a control component external to the memory component.

Abstract: Provided are embodiments for monitoring clock drift. Embodiments may include an XOR gate that is configured to receive a first clock signal from a first clock source and a second clock signal from a second clock source, wherein the XOR logic gate is further configured to generate a switching output based on an XOR operation of the first clock signal and the second clock signal, and a rising edge detector and a falling edge detector that are configured to detect a rising edge and a falling edge of the switching output. Embodiments may also include an AND gate that is configured to threshold compare the rising edge to a configurable threshold to determine if a fault condition exists indicating clock drift between the first clock signal and the second clock signal and provide an indication of the fault condition based at least in part on the comparison.

Abstract: In an embodiment a method includes generating a low-frequency clock signal having a first frequency, in a standby mode and in a run mode of the CPU, generating a high-frequency clock signal having a second frequency higher than the first frequency, in the run mode, updating a value of the reference time base at each period of the low-frequency clock signal in the standby mode, and accessing the counter register with the high-frequency clock signal in the run mode.

Abstract: Systems and methods to dynamically adjust operating conditions of a graphics processing unit (GPU) are disclosed. A machine learning model is trained to determine operating voltages and frequencies to be provided to a GPU core of the GPU to execute a workload comprising a plurality of commands. The trained machine learning model is deployed to firmware of the GPU. A command in the workload to be executed by the GPU core is received. The trained machine learning model determines operating voltage and frequency for the GPU core to execute the command.

Abstract: Scalable life-cycle maintenance of hardware. In an embodiment, a software-defined Preboot eXecution Environment (PXE) server is executed to receive a request, comprising an identifier, from hardware. The identifier is compared to a plurality of attribute sets. When the identifier does not match any of the attribute sets, a task graph is generated for a PXE process for the hardware, and an initial stage of the task graph is initiated. Otherwise, when the identifier matches one of the attribute sets, the task graph associated with that attribute set is retrieved, and the a next stage in the task graph is initiated. In addition, a display key may be used to tether hardware with a user system. Furthermore, hardware may be validated by comparing signatures using a validating operating system, and a boot order of operating systems in the hardware may be changed once the hardware device is validated.