Abstract: Disclosed are various embodiments for simulating one or more virtual objects (e.g., renders) specified spatial areas of a real-world environment. Options of item models for modeling in a given spatial area can be filtered based on specified dimensions and identified features of an image of a given spatial area. A selected item model can be rendered. and continuously updated on a display device as the client device is physical moved.

Abstract: An apparatus is described. The apparatus includes a three dimensional storage cell array structure. The apparatus also includes a staircase structure having alternating conductive and dielectric layers, wherein respective word lines are formed in the conductive layers. The word lines are connected to respective storage cells within the three dimensional storage cell array structure. The apparatus also includes upper word lines above the staircase structure that are connected to first vias that connect to respective steps of the staircase structure. The upper word lines are also connected to second vias that run vertically off a side of the staircase structure other than a side opposite the three dimensional storage cell array structure. The second vias are connected to respective word line driver transistors that are disposed beneath the staircase structure.

Abstract: Embodiments of the present invention, as presented herein, relate to an augmented reality application-based service, which facilitates the sharing of a design request, by a first end-user, via a messaging application or social networking service. The design request may be included as part of a content posting published to a feed and shared with members of a social networking service, and enables the members to select and position products (e.g., images of household items) using a room design application, such that the selected and positioned products can be rendered in a live AR viewing session by the first end-user.

Abstract: Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a block of memory cells to a precharge voltage during a first portion of a programming operation. A programming voltage can then he applied to a selected memory cell in a selected sub-block of the block of memory cells during a second portion of the programming operation. The selected memory cell is coupled to a same access line as an unselected memory cell in the unselected sub-block. Additional methods and apparatus are disclosed.

Abstract: Memory devices might be configured to perform methods including reading a first page of memory cells and flag data wherein the flag data indicates whether a second page of memory cells adjacent to the first page is programmed, and determining from the flag data whether to re-read the first page of memory cells with an adjusted read voltage; performing a sense operation on memory cells coupled to first data lines of a first array of memory cells and memory cells coupled to data lines of a second array of memory cells, and determining a program indication of memory cells coupled to second data lines from the sense operation performed on the memory cells coupled to the data lines of the second array of memory cells; and/or programming memory cells coupled to first data lines in a first array of memory cells, and programming memory cells coupled to second data lines in the first array of memory cells while programming memory cells coupled to data lines in a second array of memory cells with flag data indicative o

Abstract: An approach for simulating items in an environment, such as a room, is disclosed. A package file can store information including an image of the environment and metadata including an identifier that uniquely identifies a selected image. The package file can be used to regenerate a simulation of the item arranged over the image of the environment. Later changes can be made to the simulation of the item by accessing the metadata.

Abstract: An object can be simulated in an environment using a three-dimensional model of the object as viewed from a virtual camera at a position in the environment. The position in the environment can be determined using user input or through visual analysis of a video recording. Composite frames depicting the modeled object may be played back based on the orientation of the playback device.

Abstract: Disclosed are various embodiments for simulating one or more virtual objects (e.g., renders) in specified spatial areas of a real-world environment. Options of item models for modeling in a given spatial area can be filtered based on specified dimensions and identified features of an image of a given spatial area. A selected item model can be rendered and continuously updated on a display device as the client device is physical moved.

Abstract: Disclosed are various embodiments for simulating one or more virtual objects (e.g., renders) in specified spatial areas of a real-world environment. Options of item models for modeling in a given spatial area can be filtered based on specified dimensions and identified features of an image of a given spatial area. A selected item model can be rendered and continuously updated on a display device as the client device is physical moved.

Abstract: Some embodiments include apparatuses, and methods of operating the apparatuses. Some of the apparatuses include a first memory cell string; a second memory cell string; a first group of conductive lines to access the first and second memory cell strings; a second group of conductive lines; a group of transistors, each transistor of the group of transistors coupled between a respective conductive line of the first group of conductive lines and a respective conductive line of the second group of conductive lines, the group of transistors having a common gate; and a circuit including a first transistor and a second transistor coupled in series between a first node and a second node, the first transistor including a gate coupled to the second node, and a third transistor coupled between the second node and the common gate.

Abstract: Memories may include a first bi-directional select device connected between a first access line and a second access line, and a plurality of memory cells, each memory cell of the plurality of memory cells connected between the second access line and a respective third access line of a plurality of third access lines. Each memory cell of the plurality of memory cells comprises a respective second bi-directional select device, of a plurality of second bi-directional select devices, and a respective programmable element, of a plurality of programmable elements, connected in series.

Abstract: Methods for programming sense flags may include programming memory cells coupled to first data lines in a main memory array, and programming memory cells coupled to second data lines in the main memory array while programming memory cells coupled to data lines in a flag memory array with flag data indicative of the memory cells coupled to the second data lines being programmed. Methods for sensing flags may include performing a sense operation on memory cells coupled to first data lines of a main memory array and memory cells coupled to data lines of a flag memory array, and determining a program indication of memory cells coupled to second data lines of the main memory array from the sense operation performed on the memory cells coupled to the data lines of the flag memory array.

Abstract: Conductive structures include stair step structures positioned along a length of the conductive structure and at least one landing comprising at least one via extending through the conductive structure. The at least one landing is positioned between a first stair step structure of the stair step structures and a second stair step structure of the stair step structures. Devices may include such conductive structures. Systems may include a semiconductor device and stair step structures separated by at least one landing having at least one via formed in the at least one landing. Methods of forming conductive structures include forming at least one via through a landing positioned between stair step structures.

Abstract: Apparatuses and methods for reducing capacitive loading are described. One apparatus includes a first memory string including first and second dummy memory cells, a second memory string including third and fourth dummy memory cells, and a control unit configured to provide first and second control signals to activate the first and second dummy memory cells of the first memory string and to further deactivate at least one of the third and fourth dummy memory cell of the second memory string.

Abstract: An approach for simulating items in an environment, such as a room, is disclosed. A package file can store information including an image of the environment and metadata including an identifier that uniquely identifies a selected image. The package file can be used to regenerate a simulation of the item arranged over the image of the environment. Later changes can be made to the simulation of the item by accessing the metadata.

Abstract: Embodiments of the present invention, as presented herein, relate to an augmented reality application-based service, which facilitates techniques for aiding a first end-user (e.g., a room designer) with the selection and placement of objects (e.g., images of home furnishing and related products) in an augmented reality scene that is being, or has been, generated via a mobile computing device that is remote from the first end-user, such that a second end-user (e.g., a potential consumer) operating the mobile computing device can view objects, in the augmented reality scene, as placed by the first, remote end-user.

Abstract: Some embodiments include apparatuses, and methods of operating the apparatuses. Some of the apparatuses include a data line, a first memory cell string including first memory cells located in different levels of the apparatus, first access lines to access the first memory cells, a first select gate coupled between the data line and the first memory cell string, a first select line to control the first select gate, a second memory cell string including second memory cells located in different levels of the apparatus, second access lines to access the second memory cells, the second access lines being electrically separated from the first access lines, a second select gate coupled between the data line and the second memory cell string, a second select line to control the second select gate, and the first select line being in electrical contact with the second select line.

Abstract: Conductive structures include stair step structures positioned along a length of the conductive structure and at least one landing comprising at least one via extending through the conductive structure. The at least one landing is positioned between a first stair step structure of the stair step structures and a second stair step structure of the stair step structures. Devices may include such conductive structures. Systems may include a semiconductor device and stair step structures separated by at least one landing having at least one via formed in the at least one landing. Methods of forming conductive structures include forming at least one via through a landing positioned between stair step structures.

Abstract: Apparatuses and methods for reducing capacitive loading are described. One apparatus includes a first memory string including first and second dummy memory cells, a second memory string including third and fourth dummy memory cells, and a control unit configured to provide first and second control signals to activate the first and second dummy memory cells of the first memory string and to further deactivate at least one of the third and fourth dummy memory cell of the second memory string.

Abstract: Memories may include a first bi-directional select device connected between a first access line and a second access line, and a plurality of memory cells, each memory cell of the plurality of memory cells connected between the second access line and a respective third access line of a plurality of third access lines. Each memory cell of the plurality of memory cells comprises a respective second bi-directional select device, of a plurality of second bi-directional select devices, and a respective programmable element, of a plurality of programmable elements, connected in series.