Patents by Inventor Ajey Poovannummoottil Jacob

Ajey Poovannummoottil Jacob has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10747030
    Abstract: Structures for an electro-optic modulator and methods of fabricating a structure for an electro-optic modulator. An electro-optic modulator is positioned proximate to a section of a waveguide core. The electro-optic modulator includes an active layer and a confinement layer. The active layer is composed of a first material, the confinement layer is composed of a second material with a different composition than the first material, the first material has a refractive index that is variable under an applied bias voltage, and the second material has a permittivity with an imaginary part that ranges from 0 to about 15.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: August 18, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob
  • Publication number: 20200243126
    Abstract: A memory structure includes a first memory array with two transistor-two variable resistor memory cells and a second memory array with one transistor-one variable resistor memory cells, which are each selectively operable in read, write and standby modes. The first memory array and the second memory array are interleaved so that, when the second memory operates in the read mode, the first memory array automatically and concurrently operates in a reference mode. A method of operating the memory structure includes, when the second memory array operates in the read mode, automatically and concurrently operating the first memory array in the reference mode so that the first memory array generates and outputs a statistical reference voltage, which is between the low and high voltages of a nominal memory cell within the second memory array and which is employed by the second memory array to sense a stored data value.
    Type: Application
    Filed: January 30, 2019
    Publication date: July 30, 2020
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Ajey Poovannummoottil Jacob, Amogh Agrawal
  • Patent number: 10726896
    Abstract: A memory structure includes a first memory array with two transistor-two variable resistor memory cells and a second memory array with one transistor-one variable resistor memory cells, which are each selectively operable in read, write and standby modes. The first memory array and the second memory array are interleaved so that, when the second memory operates in the read mode, the first memory array automatically and concurrently operates in a reference mode. A method of operating the memory structure includes, when the second memory array operates in the read mode, automatically and concurrently operating the first memory array in the reference mode so that the first memory array generates and outputs a statistical reference voltage, which is between the low and high voltages of a nominal memory cell within the second memory array and which is employed by the second memory array to sense a stored data value.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: July 28, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ajey Poovannummoottil Jacob, Amogh Agrawal
  • Publication number: 20200235252
    Abstract: The present disclosure generally relates to semiconductor detectors for use in optoelectronic devices and integrated circuit (IC) chips, and methods for forming same. More particularly, the present disclosure relates to integration of semiconductor detectors with Bragg reflectors. The photodetector of the present disclosure includes a substrate, a Bragg reflector disposed on the substrate, and a semiconductor detector disposed on the Bragg reflector. The Bragg reflector includes alternating layers of a semiconductor material and a dielectric material.
    Type: Application
    Filed: January 21, 2019
    Publication date: July 23, 2020
    Inventors: AJEY POOVANNUMMOOTTIL JACOB, THEODORE J. LETAVIC, ABU THOMAS, YUSHENG BIAN
  • Patent number: 10718903
    Abstract: Structures for a waveguide bend and methods of fabricating a structure for a waveguide bend. A first waveguide core has a first section, a second section, and a first waveguide bend connecting the first section with the second section. The first waveguide core has a first side surface extending about an outer radius of the first waveguide bend. A second waveguide core also has a first section, a second section, and a second waveguide bend connecting the first section with the second section. The second waveguide core has a second side surface extending about an outer radius of the second waveguide bend. The first waveguide bend is spaced from the second waveguide bend in a first non-contacting relationship with a gap between the first side surface and the second side surface. The gap has a perpendicular distance selected to permit optical signal transfer between the first and second waveguide bends.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: July 21, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob
  • Patent number: 10698159
    Abstract: Structures that include a waveguide and methods of fabricating a structure that includes a waveguide. A first dielectric layer comprised of a first silicon nitride is formed. The waveguide is arranged over the first dielectric layer. A second dielectric layer is formed that is arranged over the waveguide. The second dielectric layer is composed of a second silicon nitride having a lower absorption of optical signals than the first silicon nitride.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: June 30, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob
  • Patent number: 10690845
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to three dimensional (3D) optical interconnect structures and methods of manufacture. The structure includes: a first structure having a grating coupler and a first optical waveguide structure; and a second structure having a second optical waveguide structure in alignment with the first optical waveguide structure and which has a modal effective index that matches to the first optical waveguide structure.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: June 23, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ajey Poovannummoottil Jacob, Abu Thomas, Yusheng Bian
  • Patent number: 10684530
    Abstract: Structures for an electro-optic modulator and methods of fabricating a structure for an electro-optic modulator. An electro-optic modulator is arranged over a portion of a waveguide core. The electro-optic modulator includes an electrode, an active layer arranged adjacent to the electrode, and a dielectric layer including a portion that has a lateral arrangement between the electrode and the active layer. The active layer is composed of a material having a refractive index that is a function of a bias voltage applied to the electrode and the active layer.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: June 16, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob, Abu Thomas
  • Patent number: 10685847
    Abstract: One illustrative device includes, among other things, at least one fin defined in a semiconductor substrate and a substantially vertical nanowire having an oval-shaped cross-section disposed on a top surface of the at least one fin.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: June 16, 2020
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Steven Bentley, Richard A. Farrell, Gerard Schmid, Ajey Poovannummoottil Jacob
  • Patent number: 10672465
    Abstract: One illustrative device includes, among other things, a first resistive storage element; a second resistive storage element; and logic to couple the first resistive storage element and the second resistive storage element in a series arrangement in a first configuration and to couple the first resistive storage element and the second resistive storage element in a parallel arrangement in a second configuration.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: June 2, 2020
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Amogh Agrawal, Ajey Poovannummoottil Jacob
  • Patent number: 10670804
    Abstract: Waveguiding structures and methods of fabricating a waveguiding structure. The waveguiding structure includes a waveguide and an array of semiconductor fins that are arranged at least in part inside the waveguide.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 2, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Abu Thomas, Ajey Poovannummoottil Jacob
  • Publication number: 20200166702
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to rib waveguide structures and methods of manufacture. The structure includes: a waveguide structure comprising one or more bends, an input end and an output end; and grating structures which are positioned adjacent to the one or more bends of the waveguide structure.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 28, 2020
    Inventors: Ajey Poovannummoottil JACOB, Marcus V. S. DAHLEM, Humaira ZAFAR, Anatol KHILO, Sujith CHANDRAN
  • Publication number: 20200166709
    Abstract: Structures for a waveguide and methods of fabricating a structure for a waveguide. A grating coupler is formed that has an arrangement of grating structures. A conformal layer is arranged over the plurality of grating structures. The conformal layer is composed of a tunable material having a refractive index that changes with an applied voltage.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 28, 2020
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob
  • Patent number: 10665281
    Abstract: A device is disclosed including a first resistive storage element, a first access transistor having a first terminal coupled to the first resistive storage element at a first node, a second resistive storage element, a second access transistor having a first terminal coupled to the second resistive storage element at a second node, and a write assist transistor having a first terminal coupled to the first node and a second terminal coupled to the second node.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: May 26, 2020
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ajey Poovannummoottil Jacob, Amogh Agrawal, Bipul C. Paul
  • Patent number: 10649140
    Abstract: Structures including a waveguide core and methods of fabricating a structure including a waveguide core. A back-end-of-line interconnect structure includes a cap layer, an interlayer dielectric layer, and one or more metal features embedded in the interlayer dielectric layer. The interlayer dielectric layer is stacked in a vertical direction with the cap layer. The one or more metal features have an overlapping arrangement in a lateral direction with the waveguide core, which is arranged under the back-end-of-line interconnect structure.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: May 12, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob, Abu Thomas
  • Patent number: 10649245
    Abstract: Structures for an electro-optic modulator and methods of fabricating a structure for an electro-optic modulator. The electro-optic modulator is arranged over a portion of a first waveguide core. The electro-optic modulator may include an electrode, an active layer, a second waveguide core, and a dielectric layer that is arranged between the active layer and the second waveguide core. The active layer is composed of a material having a refractive index that is a function of a bias voltage applied between the electrode and the first waveguide core.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: May 12, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob, Abu Thomas
  • Patent number: 10641956
    Abstract: Structures including a waveguide core and methods of fabricating a structure including a waveguide core. A back-end-of-line interconnect structure has an interlayer dielectric layer and a cap layer stacked over the interlayer dielectric layer. A waveguide core includes a section arranged beneath the cap layer. The waveguide core has a first index of refraction that varies as a function of width, and the cap layer has a second index of refraction. The section of the waveguide core has a width that is selected such that the first index of refraction is substantially equal to the second index of refraction to provide phase matching effective for coupling a portion of an optical signal from the waveguide core to the cap layer.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: May 5, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob, Abu Thomas
  • Publication number: 20200124796
    Abstract: Structures that include a waveguide and methods of fabricating a structure that includes a waveguide. A first dielectric layer comprised of a first silicon nitride is formed. The waveguide is arranged over the first dielectric layer. A second dielectric layer is formed that is arranged over the waveguide. The second dielectric layer is composed of a second silicon nitride having a lower absorption of optical signals than the first silicon nitride.
    Type: Application
    Filed: October 19, 2018
    Publication date: April 23, 2020
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob
  • Publication number: 20200088942
    Abstract: Structures with waveguides in multiple levels and methods of fabricating a structure that includes waveguides in multiple levels. A waveguide crossing has a first waveguide and a second waveguide arranged to intersect the first waveguide. A third waveguide is displaced vertically from the waveguide crossing, The third waveguide includes a portion having an overlapping arrangement with a portion of the first waveguide. The overlapping portions of the first and third waveguides are configured to transfer optical signals between the first waveguide and the third waveguide.
    Type: Application
    Filed: September 18, 2018
    Publication date: March 19, 2020
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob, Abu Thomas
  • Patent number: 10585219
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to grating couplers with multiple configurations and methods of manufacture. A grating coupler structure includes: a polysilicon material with a first grating coupling pattern; a SiN material with second grating coupling pattern; a dielectric material covering the polysilicon material and the SiN material; and a back end of line (BEOL) multilayer stack over the dielectric material.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: March 10, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ajey Poovannummoottil Jacob, Yusheng Bian