Patents by Inventor Alejandro G. Schrott

Alejandro G. Schrott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130001499
    Abstract: A process for manufacturing a PCM device comprises forming a dielectric, producing a via in the dielectric starting at an area on the surface of the dielectric by forming a via opening in the area and extending the opening into the dielectric toward and then terminating at an electrode comprising a first electrode in the dielectric. We form a spacer layer contiguous with the side walls of the via and fill the via with a PCM. We then remove the surface of the dielectric to leave a PCM cusp at the opening of the via, cap the PCM cusp with a low density capping film; densify the PCM and capping film to obtain a high density capping film that exerts compressive pressure on the high density PCM in a direction toward the first electrode to enhance electrical contact between the PCM and the first electrode.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 3, 2013
    Applicant: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Alejandro G. Schrott
  • Patent number: 8344351
    Abstract: A phase change memory device includes a plurality of memory cells comprising a substrate having a contact surface with an array of conductive contacts to be connected with access circuitry and a nitride layer formed at the contact surface. A plurality of vias are formed through the nitride layer to the contact surface and correspond to each conductive contact, the vias including a conformal conductive seed layer lining each via along exposed portions of the nitride layer and the contact surface and having oxidized edges. A dielectric layer is recessed within the conformal conductive seed layer and exposes a center region of each via. A phase change material is recessed within the center region of each via. A conductive material that remains conductive upon oxidation is formed over the phase change material. A top electrode is formed on each memory cell.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: January 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Alejandro G. Schrott, Xiaoyan Shao
  • Patent number: 8338225
    Abstract: A memory cell structure and method to form such structure. The method partially comprised of forming a via within an oxidizing layer, over the center of a bottom electrode. The method includes depositing a via spacer along the sidewalls of the via and oxidizing the via spacer. The via spacer being comprised of a material having a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The via area is reduced by expansion of the via spacer during the oxidation. Alternatively, the method is partially comprised of forming a via within a first layer, over the center of the bottom electrode. The first layer has a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The method also includes oxidizing at least a portion of the sidewalls of the via in the first layer.
    Type: Grant
    Filed: January 16, 2012
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott, Yu Zhu
  • Patent number: 8330137
    Abstract: A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: December 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Alejandro G. Schrott, Chung H. Lam, Eric A. Joseph, Matthew J. Breitwisch, Roger W. Cheek
  • Publication number: 20120309159
    Abstract: An example embodiment is a method for filling a via hole with phase change material. The method steps include forming a bottom electrode in a substrate, depositing a dielectric layer above the bottom electrode, and forming a via hole within the dielectric layer down to a top surface of the bottom electrode. The substrate is heated to a reaction temperature and a first phase change material precursor is deposited within the via hole. The first precursor is configured to decompose on the top surface of the bottom electrode and chemisorb on a top surface of the dielectric layer at the reaction temperature. A second precursor is deposited within the via hole after the first precursor at least partially decomposes on the top surface of the bottom electrode.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 6, 2012
    Applicants: Macronix International Co., Ltd., International Business Machines Corporation
    Inventors: Chieh-Fang Chen, Chung H. Lam, Alejandro G. Schrott
  • Publication number: 20120280197
    Abstract: A phase change memory cell having a flat lower bottom electrode and a method for fabricating the same. The method includes forming a dielectric layer over a substrate including an array of conductive contacts, patterning, a via having a low aspect ratio such that a depth of the via is less than a width thereof, to a contact surface of the substrate corresponding to each of the array of conductive contacts to be connected to access circuitry, etching the dielectric layer and depositing electrode material over the etched dielectric layer and within each via, and planarizing the electrode material to form a plurality of lower bottom electrodes on each of the conductive contacts.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 8, 2012
    Applicants: MACRONIX INTERNATIONAL COMPANY, LTD., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Hsiang-Lan Lung, Alejandro G. Schrott
  • Publication number: 20120276688
    Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.
    Type: Application
    Filed: July 11, 2012
    Publication date: November 1, 2012
    Applicants: Macronix International Co., Ltd., International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chieh-Fang Chen, Shih-Hung Chen, Eric A. Joseph, Chung Hon Lam, Michael F. Lofaro, Hsiang-Lan Lung, Alejandro G. Schrott, Min Yang
  • Publication number: 20120267601
    Abstract: An example embodiment is a phase change memory cell including a bottom electrode and phase change material carried within a via above the bottom electrode. A surfactant layer is deposited above the bottom electrode. The surfactant layer includes a surfactant configured to lower an interfacial force between the phase change material and the via surface.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 25, 2012
    Applicant: International Business Machines Corporation
    Inventors: Chung H. Lam, Alejandro G. Schrott
  • Patent number: 8283650
    Abstract: A phase change memory cell having a flat lower bottom electrode and a method for fabricating the same. The method includes forming a dielectric layer over a substrate including an array of conductive contacts, patterning, a via having a low aspect ratio such that a depth of the via is less than a width thereof, to a contact surface of the substrate corresponding to each of the array of conductive contacts to be connected to access circuitry, etching the dielectric layer and depositing electrode material over the etched dielectric layer and within each via, and planarizing the electrode material to form a plurality of lower bottom electrodes on each of the conductive contacts.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: October 9, 2012
    Assignees: International Business Machines Corporation, Macronix International Co., Ltd.
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Hsiang-Lan Lung, Alejandro G. Schrott
  • Patent number: 8273598
    Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: September 25, 2012
    Assignees: International Business Machines Corporation, Macronix International Co., Ltd.
    Inventors: Matthew J. Breitwisch, Chieh-Fang Chen, Shih-Hung Chen, Eric A. Joseph, Chung Hon Lam, Michael F. Lofaro, Hsiang-Lan Lung, Alejandro G. Schrott, Min Yang
  • Publication number: 20120202333
    Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and fowling at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.
    Type: Application
    Filed: February 3, 2011
    Publication date: August 9, 2012
    Applicants: MACRONIX INTERNATIONAL CO., LTD., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Breitwisch, Chieh-Fang Chen, Shih-Hung Chen, Eric A. Joseph, Chung Hon Lam, Michael F. Lofaro, Hsiang-Lan Lung, Alejandro G. Schrott, Min Yang
  • Patent number: 8233317
    Abstract: A phase change memory cell that includes a bottom electrode, a top electrode separated from the bottom electrode, and growth-dominated phase change material deposited between the bottom electrode and the top electrode and contacting the bottom electrode and the top electrode and surrounded by insulation material at sidewalls thereof. The phase change memory cell in a reset state only includes an amorphous phase of the growth-dominated phase change material within an active volume of the phase change memory cell.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Bipin Rajendran, Simone Raoux, Alejandro G. Schrott, Daniel Krebs
  • Publication number: 20120147666
    Abstract: An example embodiment disclosed is a phase change memory cell. The memory cell includes a phase change material and a transducer positioned proximate the phase change material. The phase change material is switchable between at least an amorphous state and a crystalline state. The transducer is configured to activate when the phase change material is changed from the amorphous state to the crystalline state. In a particular embodiment, the transducer is ferroelectric material.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 14, 2012
    Applicants: Centre National de la Recherche Scientifique, International Business Machines Corporation
    Inventors: Catherine A. Dubourdieu, Martin M. Frank, Bipin Rajendran, Alejandro G. Schrott
  • Publication number: 20120134204
    Abstract: The present invention in one embodiment provides a memory device including a first electrode; a second electrode; and a memory cell positioned between the first electrode and the second electrode, the memory cell including a core of a first phase change material and a cladding of a second phase change material, wherein the first phase change material has a lower crystallization temperature than the second phase change material. The present invention also provides methods of forming the above described memory device.
    Type: Application
    Filed: February 2, 2012
    Publication date: May 31, 2012
    Applicants: QIMONDA NORTH AMERICA CORP., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas D. Happ, Alejandro G. Schrott
  • Publication number: 20120126194
    Abstract: A memory cell structure and method for forming the same. The method includes forming a pore within a dielectric layer. The pore is formed over the center of an electrically conducting bottom electrode. The method includes depositing a thermally insulating layer along at least one sidewall of the pore. The thermally insulating layer isolates heat from phase change current to the volume of the pore. In one embodiment phase change material is deposited within the pore and the volume of the thermally insulating layer. In another embodiment a pore electrode is formed within the pore and the volume of the thermally insulating layer, with the phase change material being deposited above the pore electrode. The method also includes forming an electrically conducting top electrode above the phase change material.
    Type: Application
    Filed: February 1, 2012
    Publication date: May 24, 2012
    Applicant: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Roger W. Cheek, Eric A. Joseph, Chung H. Lam, Bipin Rajendran, Alejandro G. Schrott, Yu Zhu
  • Publication number: 20120129313
    Abstract: A memory cell structure and method for forming the same. The method includes forming a pore within a dielectric layer. The pore is formed over the center of an electrically conducting bottom electrode. The method includes depositing a thermally insulating layer along at least one sidewall of the pore. The thermally insulating layer isolates heat from phase change current to the volume of the pore. In one embodiment phase change material is deposited within the pore and the volume of the thermally insulating layer. In another embodiment a pore electrode is formed within the pore and the volume of the thermally insulating layer, with the phase change material being deposited above the pore electrode. The method also includes forming an electrically conducting top electrode above the phase change material.
    Type: Application
    Filed: February 1, 2012
    Publication date: May 24, 2012
    Applicant: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Roger W. Cheek, Eric A. Joseph, Chung H. Lam, Bipin Rajendran, Alejandro G. Schrott, Yu Zhu
  • Publication number: 20120112154
    Abstract: A method for fabricating a phase change memory device including a plurality of in via phase change memory cells includes forming pillar heaters formed of a conductive material along a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, forming a dielectric layer along exposed areas of the substrate surrounding the pillar heaters, forming an interlevel dielectric (ILD) layer above the dielectric layer, etching a via to the dielectric layer, each via corresponding to each of pillar heater such that an upper surface of each pillar heater is exposed within each via, recessing each pillar heater, depositing phase change material in each via on each recessed pillar heater, recessing the phase change material within each via, and forming a top electrode within the via on the phase change material.
    Type: Application
    Filed: January 16, 2012
    Publication date: May 10, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Breitwisch, Roger W. Cheek, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott
  • Publication number: 20120115302
    Abstract: A memory cell structure and method to form such structure. The method partially comprised of forming a via within an oxidizing layer, over the center of a bottom electrode. The method includes depositing a via spacer along the sidewalls of the via and oxidizing the via spacer. The via spacer being comprised of a material having a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The via area is reduced by expansion of the via spacer during the oxidation. Alternatively, the method is partially comprised of forming a via within a first layer, over the center of the bottom electrode. The first layer has a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The method also includes oxidizing at least a portion of the sidewalls of the via in the first layer.
    Type: Application
    Filed: January 16, 2012
    Publication date: May 10, 2012
    Applicant: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott, Yu Zhu
  • Patent number: 8138056
    Abstract: A memory cell structure and method for forming the same. The method includes forming a pore within a dielectric layer. The pore is formed over the center of an electrically conducting bottom electrode. The method includes depositing a thermally insulating layer along at least one sidewall of the pore. The thermally insulating layer isolates heat from phase change current to the volume of the pore. In one embodiment phase change material is deposited within the pore and the volume of the thermally insulating layer. In another embodiment a pore electrode is formed within the pore and the volume of the thermally insulating layer, with the phase change material being deposited above the pore electrode. The method also includes forming an electrically conducting top electrode above the phase change material.
    Type: Grant
    Filed: July 3, 2009
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Roger W. Cheek, Eric A. Joseph, Chung H. Lam, Bipin Rajendran, Alejandro G. Schrott, Yu Zhu
  • Patent number: 8124950
    Abstract: A memory device including a first electrode; a second electrode; and a memory cell positioned between the first electrode and the second electrode, the memory cell including a core of a first phase change material and a cladding of a second phase change material, wherein the first phase change material has a lower crystallization temperature than the second phase change material.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: February 28, 2012
    Assignees: International Business Machines Corporation, Qimonda North America Corp.
    Inventors: Thomas D. Happ, Alejandro G. Schrott