Patents by Inventor Alejandro G. Schrott

Alejandro G. Schrott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8119528
    Abstract: A process for preparing a phase change memory semiconductor device comprising a (plurality of) nanoscale electrode(s) for alternately switching a chalcogenide phase change material from its high resistance (amorphous) state to its low resistance (crystalline) state, whereby a reduced amount of current is employed, and wherein the plurality of nanoscale electrodes, when present, have substantially the same dimensions.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Alejandro G Schrott, Eric A Joseph, Mary Beth Rothwell, Matthew J Breitwisch, Chung H Lam, Bipin Rajendran, Sarunya Bangsaruntip
  • Patent number: 8110901
    Abstract: Vertical field effect transistor semiconductor structures and methods for fabrication of the vertical field effect transistor semiconductor structures provide an array of semiconductor pillars. Each vertical portion of each semiconductor pillar in the array of semiconductor pillars has a linewidth greater than a separation distance to an adjacent semiconductor pillar. Alternatively, the array may comprise semiconductor pillars with different linewidths, optionally within the context of the foregoing linewidth and separation distance limitations. A method for fabricating the array of semiconductor pillars uses a minimally photolithographically dimensioned pillar mask layer that is annularly augmented with at least one spacer layer prior to being used as an etch mask.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: February 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Alejandro G. Schrott
  • Patent number: 8105859
    Abstract: A method for fabricating a phase change memory device including a plurality of in via phase change memory cells includes forming pillar heaters formed of a conductive material along a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, forming a dielectric layer along exposed areas of the substrate surrounding the pillar heaters, forming an interlevel dielectric (ILD) layer above the dielectric layer, etching a via to the dielectric layer, each via corresponding to each of pillar heater such that an upper surface of each pillar heater is exposed within each via, recessing each pillar heater, depositing phase change material in each via on each recessed pillar heater, recessing the phase change material within each via, and forming a top electrode within the via on the phase change material.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Roger W. Cheek, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott
  • Patent number: 8101456
    Abstract: A memory cell structure and method to form such structure. The method partially comprised of forming a via within an oxidizing layer, over the center of a bottom electrode. The method includes depositing a via spacer along the sidewalls of the via and oxidizing the via spacer. The via spacer being comprised of a material having a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The via area is reduced by expansion of the via spacer during the oxidation. Alternatively, the method is partially comprised of forming a via within a first layer, over the center of the bottom electrode. The first layer has a Pilling-Bedworth ratio of at least one and one-half and is an insulator when oxidized. The method also includes oxidizing at least a portion of the sidewalls of the via in the first layer.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: January 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott, Yu Zhu
  • Publication number: 20110275209
    Abstract: Vertical field effect transistor semiconductor structures and methods for fabrication of the vertical field effect transistor semiconductor structures provide an array of semiconductor pillars. Each vertical portion of each semiconductor pillar in the array of semiconductor pillars has a linewidth greater than a separation distance to an adjacent semiconductor pillar. Alternatively, the array may comprise semiconductor pillars with different linewidths, optionally within the context of the foregoing linewidth and separation distance limitations. A method for fabricating the array of semiconductor pillars uses a minimally photolithographically dimensioned pillar mask layer that is annularly augmented with at least one spacer layer prior to being used as an etch mask.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 10, 2011
    Applicant: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Alejandro G. Schrott
  • Publication number: 20110240944
    Abstract: A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.
    Type: Application
    Filed: June 14, 2011
    Publication date: October 6, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Alejandro G. Schrott, Xiaoyan Shao
  • Patent number: 8030130
    Abstract: A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: October 4, 2011
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Alejandro G. Schrott, Xiaoyan Shao
  • Publication number: 20110227021
    Abstract: Techniques for forming a phase change memory cell. An example apparatus includes a substrate and a bottom electrode carried by the substrate. The bottom electrode is a thermal conductor. A phase change layer, including phase change material, is disposed over the bottom electrode. A thermal insulating layer is disposed above the phase change layer. A heater is configured to temporarily melt the phase change material such that the phase change material crystallizes without voids within a switching region after melting.
    Type: Application
    Filed: June 1, 2011
    Publication date: September 22, 2011
    Applicant: International Business Machines Corporation
    Inventors: Alejandro G. Schrott, Chung H. Lam, Stephen M. Rossnagel
  • Patent number: 8017432
    Abstract: A method for formation of a phase change memory (PCM) cell includes depositing amorphous phase change material in a via hole, the via hole comprising a bottom and a top, such that the amorphous phase change material is grown on an electrode located at the bottom of the via hole; melt-annealing the amorphous phase change material; and crystallizing the phase change material starting at the electrode at the bottom of the via hole and ending at the top of the via hole.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Chung Hon Lam, Alejandro G. Schrott
  • Patent number: 8017433
    Abstract: Techniques for forming a phase change memory cell. An example method includes forming a bottom electrode within a substrate. The method includes forming a phase change layer above the bottom electrode. The method includes forming a capping layer and an insulator layer. The method includes crystallizing the phase change material in the phase change layer so that the phase change layer is void free. The method further comprises heating the phase change material in the phase change layer from the bottom electrode and as a result the phase change layer is crystallized from the bottom to the top. In one embodiment, a rapid thermal anneal (RTA) is applied for crystallizing the phase change material.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Chung H. Lam, Stephen M. Rossnagel, Alejandro G. Schrott
  • Publication number: 20110193045
    Abstract: Techniques for forming a phase change memory cell. An example method includes forming a bottom electrode within a substrate. The method includes forming a phase change layer above the bottom electrode. The method includes forming a capping layer and an insulator layer. The method includes crystallizing the phase change material in the phase change layer so that the phase change layer is void free. The method further comprises heating the phase change material in the phase change layer from the bottom electrode and as a result the phase change layer is crystallized from the bottom to the top. In one embodiment, a rapid thermal anneal (RTA) is applied for crystallizing the phase change material.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 11, 2011
    Applicant: International Business Machines Corporation
    Inventors: Alejandro G. Schrott, Chung H. Lam, Stephen M. Rossnagel
  • Publication number: 20110186800
    Abstract: A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
    Type: Application
    Filed: April 11, 2011
    Publication date: August 4, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alejandro G. Schrott, Chung H. Lam, Eric A. Joseph, Matthew J. Breitwisch, Roger W. Cheek
  • Patent number: 7981755
    Abstract: The present invention in one embodiment provides a method of manufacturing an electrode that includes providing at least one metal stud positioned in a via extending into a first dielectric layer, wherein an electrically conductive liner is positioned between at least a sidewall of the via and the at least one metal stud; recessing an upper surface of the at least one metal stud below an upper surface of the first dielectric layer to provide at least one recessed metal stud; and forming a second dielectric atop the at least one recessed metal stud, wherein an upper surface of the electrically conductive liner is exposed.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: July 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott, Brandon Yee
  • Patent number: 7981748
    Abstract: Vertical field effect transistor semiconductor structures and methods for fabrication of the vertical field effect transistor semiconductor structures provide an array of semiconductor pillars. Each vertical portion of each semiconductor pillar in the array of semiconductor pillars has a linewidth greater than a separation distance to an adjacent semiconductor pillar. Alternatively, the array may comprise semiconductor pillars with different linewidths, optionally within the context of the foregoing linewidth and separation distance limitations. A method for fabricating the array of semiconductor pillars uses a minimally photolithographically dimensioned pillar mask layer that is annularly augmented with at least one spacer layer prior to being used as an etch mask.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: July 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Alejandro G. Schrott
  • Publication number: 20110168966
    Abstract: A method for formation of a phase change memory (PCM) cell includes depositing amorphous phase change material in a via hole, the via hole comprising a bottom and a top, such that the amorphous phase change material is grown on an electrode located at the bottom of the via hole; melt-annealing the amorphous phase change material; and crystallizing the phase change material starting at the electrode at the bottom of the via hole and ending at the top of the via hole.
    Type: Application
    Filed: January 8, 2010
    Publication date: July 14, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chung Hon Lam, Alejandro G. Schrott
  • Patent number: 7972966
    Abstract: The present invention in one embodiment provides an etch method that includes providing a structure including a tungsten (W) portion and a titanium nitride (TiN) portion; applying a first etch feed gas of sulfur hexafluoride (SF6) and oxygen (O2), in which the ratio of sulfur hexafluoride (SF6) to oxygen (O2) ranges from 1:3.5 to 1:4.5; and applying a second etch feed gas of nitrogen trifluoride (NF3), helium (He) and chlorine (Cl2), in which the ratio of nitrogen trifluoride (NF3) to chlorine (Cl2) ranges from 1:5 to 2:5 and the ratio of helium (He) to nitrogen trifluoride (NF3) and chlorine (Cl2) ranges from 1:3 to 1:1.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: July 5, 2011
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott, Brandon Yee
  • Patent number: 7960203
    Abstract: A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Alejandro G. Schrott, Chung H. Lam, Eric A. Joseph, Matthew J. Breitwisch, Roger W. Cheek
  • Publication number: 20110116307
    Abstract: A phase change memory cell that includes a bottom electrode, a top electrode separated from the bottom electrode, and growth-dominated phase change material deposited between the bottom electrode and the top electrode and contacting the bottom electrode and the top electrode and surrounded by insulation material at sidewalls thereof. The phase change memory cell in a reset state only includes an amorphous phase of the growth-dominated phase change material within an active volume of the phase change memory cell.
    Type: Application
    Filed: November 16, 2009
    Publication date: May 19, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Bipin Rajendran, Simone Raoux, Alejandro G. Schrott, Daniel Krebs
  • Publication number: 20110108792
    Abstract: A method for fabricating a phase change memory (PCM) cell includes forming a dielectric layer over an electrode, the electrode comprising an electrode material; forming a via hole in the dielectric layer such that the via hole extends down to the electrode; and growing a single crystal of a phase change material on the electrode in the via hole. A phase change memory (PCM) cell includes an electrode comprising an electrode material; a dielectric layer over the electrode; a via hole in the dielectric layer; and a single crystal of a phase change material located in the via hole, the single crystal contacting the electrode at the bottom of the via hole.
    Type: Application
    Filed: November 11, 2009
    Publication date: May 12, 2011
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, Macronix International Co., Ltd.
    Inventors: Chung Hon Lam, Alejandro G. Schrott, Chieh-Fang Chen
  • Publication number: 20110057162
    Abstract: A method for fabricating a phase change memory device including a plurality of in via phase change memory cells includes forming pillar heaters formed of a conductive material along a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, forming a dielectric layer along exposed areas of the substrate surrounding the pillar heaters, forming an interlevel dielectric (ILD) layer above the dielectric layer, etching a via to the dielectric layer, each via corresponding to each of pillar heater such that an upper surface of each pillar heater is exposed within each via, recessing each pillar heater, depositing phase change material in each via on each recessed pillar heater, recessing the phase change material within each via, and forming a top electrode within the via on the phase change material.
    Type: Application
    Filed: September 9, 2009
    Publication date: March 10, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Breitwisch, Roger W. Cheek, Eric A. Joseph, Chung H. Lam, Alejandro G. Schrott