Patents by Inventor An-Yu Kuo

An-Yu Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11119854
    Abstract: A method of controlling verification operations for error correction of a non-volatile memory device includes the following. A tolerated error bit (TEB) number for error correction of the non-volatile memory device is set to a first value to control verification operations in accordance with the TEB number. After at least one portion of the non-volatile memory device is programmed for a specific number of times, the TEB number is changed from the first value to a second value to control the verification operations in accordance with the TEB number, wherein the second value is greater than the first value and is less than or equal to the TEB threshold. The method may be performed while the at least one portion of the non-volatile memory device is programmed and verified.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: September 14, 2021
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventors: Yu-Kuo Yang, Takao Akaogi, Pauling Chen
  • Publication number: 20210268558
    Abstract: An apparatus includes a wafer stage and a particle removing assembly. The wafer stage includes a cup adjacent to a wafer chuck. The particle removing assembly is configured to remove contaminant particles from the cup. In some embodiments, the particle removing assembly comprises a flexible ejecting member that includes one or more elongated tubes, a front tip, and a cleaning tip adapter configured to attach the front tip to each of the one or more elongated tubes. The front tip includes front openings and lateral openings from which pressurized cleaning material are introduced onto an unreachable area of the cup to remove the contaminant particles from the cup.
    Type: Application
    Filed: December 23, 2020
    Publication date: September 2, 2021
    Inventors: M.H. WU, Fang-Yu KUO, Kai-Yu LIU, Yu-Chun WU, Jao Sheng HUANG, W.Y. CHEN
  • Publication number: 20210267726
    Abstract: A method for producing an adaptive element for dental implantation includes: creating a 3D virtual model including a crown part and a root part; obtaining a boundary curve between the crown part and the root part; defining a boundary plane on the root part perpendicular to a vertical axis of the 3D virtual model and spaced apart from the boundary curve; projecting the boundary curve on the boundary plane in a direction parallel to the vertical axis; generating a tubular model having a predetermined thickness based on the boundary curve, a virtual surface connected from the boundary curve to the cutting plane, and the cutting plane; and producing the adaptive element according to the tubular model.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Hsin-Yu KUO, Tsung-Fu HUNG, Po-Jan KUO
  • Publication number: 20210264449
    Abstract: A demand forecasting method and a demand forecasting apparatus are provided. A preliminary prediction amount corresponding to a part number is obtained based on historical demand data. A demand probability of the part number is calculated based on the preliminary prediction amount. A prediction demand amount corresponding to the part number is obtained based on the historical demand data, the preliminary prediction amount and the demand probability.
    Type: Application
    Filed: April 23, 2020
    Publication date: August 26, 2021
    Applicant: Wistron Corporation
    Inventors: Chi Lin Tsai, Chi Hao Yu, Wen Hsuan Lan, Ling-Yu Kuo, Han-Yi Shih, Pei Yu Ho
  • Patent number: 11100880
    Abstract: A pixel array with a gate driver and a matrix sensor array are provided. The pixel array includes at least one pixel unit and a gate driver. The pixel unit includes a pixel circuit and an open area. The pixel circuit includes a thin film transistor (TFT) and a physical quantity conversion device. The TFT includes gate terminal, source terminal, and drain terminals. The source terminal is coupled to a corresponding data line. The physical quantity conversion device is coupled to the drain terminal of the TFT. The gate driver is disposed in a corresponding pixel unit and a scan line outputted by the gate driver is coupled to the gate terminal in the corresponding pixel unit. The gate driver is disposed adjacent to one of the at least one pixel unit. The gate driver is controlled by a gate control signal to drive the at least one pixel unit.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: August 24, 2021
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Yu Kuo, Wen-Ya Chao, Ying-Ting Liou, Wei-Chung Chen
  • Patent number: 11099614
    Abstract: A function expansion device and an electronic device including the same. The function expansion device includes a casing, an expansion device and a handle. The casing has a main space and a side space. The expansion device is accommodated in the main space of the casing. The handle is slidably disposed in the side space and is thus allowed to move between a housed position and an extracted position along a sliding direction of the casing by gravitational force. A first protruding length of the handle relative to the casing when the handle is at the housed position is less than a second protruding length of the handle relative to the casing when the handle is at the extracted position. When the handle is at the extracted position, the handle is pressed against the casing to enable the casing to be moved along with the handle.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: August 24, 2021
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Hsiu-Yu Kuo
  • Publication number: 20210257779
    Abstract: A male plug and a female receptacle and a docking structure thereof include a male plug and a female receptacle docked with each other. When the male plug and the female receptacle docked with each other, the male plug is fitted with the female receptacle using a horizontal holding force provided by a first fastening structure, and is fitted with the female receptacle using a vertical holding force provided by a second fastening structure, hence further reinforcing plugging stability between the male plug and the female receptacle by the horizontal and vertical holding forces.
    Type: Application
    Filed: February 19, 2021
    Publication date: August 19, 2021
    Inventor: HSIU-YU KUO
  • Publication number: 20210255921
    Abstract: A method of controlling verification operations for error correction of a non-volatile memory device includes the following. A tolerated error bit (TEB) number for error correction of the non-volatile memory device is set to a first value to control verification operations in accordance with the TEB number. After at least one portion of the non-volatile memory device is programmed for a specific number of times, the TEB number is changed from the first value to a second value to control the verification operations in accordance with the TEB number, wherein the second value is greater than the first value and is less than or equal to the TEB threshold. The method may be performed while the at least one portion of the non-volatile memory device is programmed and verified.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 19, 2021
    Inventors: YU-KUO YANG, TAKAO AKAOGI, PAULING CHEN
  • Publication number: 20210248235
    Abstract: A computer-implemented method, a computer program product, and a computer system for creating malware domain sinkholes by domain clustering. The computer system clusters malware domains into domain clusters. The computer system collects domain metrics in the domain clusters. The computer system sorts clustered malware domains in the respective ones of the domain clusters, based on the domain metrics. The computer system selects, from the clustered malware domains in the respective ones of the domain clusters, a predetermined number of top domains as candidates of respective domain sinkholes, wherein the respective domain sinkholes are created for the respective ones of the domain clusters.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 12, 2021
    Inventors: Cheng-Ta Lee, Bo-Yu Kuo, Gideon Zenz, Andrii Iesiev, Jacobus P. Lodewijkx
  • Publication number: 20210246721
    Abstract: A window includes a window frame and a screen mounting assembly. The window frame is formed with two rail slots. The screen mounting assembly is adapted to be connected to a window screen and includes a roller unit, a sliding unit and an interconnecting unit. The roller unit includes a roller seat. The sliding unit is slidable along the rail slots and defines an engaging groove. The interconnecting unit is operable between a disengaging state where the interconnecting unit is connected to the roller seat, and an engaging state where the interconnecting unit is separated from the roller seat and inserted into the engaging groove so as to engage the sliding unit, such that movement of the sliding unit along the rail slots results in winding and unwinding of the window screen.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 12, 2021
    Inventors: Chiu-Lan FAN, Chin-Yu KUO
  • Publication number: 20210234021
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Application
    Filed: July 23, 2020
    Publication date: July 29, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu KUO, Shang-Yun HUANG, Chih-Yin KUO
  • Patent number: 11069652
    Abstract: A method of manufacturing a semiconductor structure is provided. The method includes providing a first substrate including a plurality of conductive bumps disposed over the first substrate; providing a second substrate; disposing a patterned adhesive over the first substrate, wherein at least a portion of the plurality of conductive bumps is exposed through the patterned adhesive; bonding the first substrate with the second substrate; and singulating a chip from the first substrate.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: July 20, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu, Chin-Yu Ku, De-Dui Liao, Kuo-Chio Liu, Kai-Di Wu, Kuo-Pin Chang, Sheng-Pin Yang, Isaac Huang
  • Patent number: 11069533
    Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: July 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Te-Chien Hou, Yu-Ting Yen, Cheng-Yu Kuo, Chih Hung Chen, William Weilun Hong, Kei-Wei Chen
  • Patent number: 11067642
    Abstract: The present invention provides device for generating magnetic field of calibration and built-in self-calibration (BISC) magnetic sensor and calibration method, in which a novelty structure utilized for generating a uniform, predetermined magnitude, and three-dimensional orthogonal or approximately orthogonal magnetic field of calibration is arranged in the magnetic sensor such that the magnetic sensor can perform BISC function for obtaining a calibrating information with respect to the magnetic field of calibration anytime and anywhere. The magnetic sensor can be arranged in the application device for measuring magnetic field under the real environment where the magnetic sensor is located and the calibrating information are utilized for calibrating the measuring result thereby improving and advancing the accuracy of measuring three-dimensional magnetic field.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: July 20, 2021
    Assignee: VOLTAFIELD TECHNOLOGY CORPORATION
    Inventors: Nai-Chung Fu, Ming-Yu Kuo, Ta-Yung Wong
  • Publication number: 20210215975
    Abstract: A backlight module provides light to a display panel and includes a bottom board, a support frame, first and second magnetic members, a light guide device, and a light source. The support frame is connected to the bottom board to contain the light guide device. The light source is disposed on the bottom board corresponding to a light entrance surface of the light guide device. Light of the light source is incident into the light guide device via the light entrance surface and emitted to the display panel from a light exit surface of the light guide device. The first magnetic member is disposed on the support frame or the light guide device corresponding to the light source. The second magnetic member is disposed corresponding to the first magnetic member to generate a magnetic force for driving the light entrance surface to be aligned with the light source.
    Type: Application
    Filed: December 7, 2020
    Publication date: July 15, 2021
    Inventors: Chun-Wei Huang, Chih-Chieh Su, Chung-Yu Kuo
  • Publication number: 20210201837
    Abstract: A pixel array with a gate driver and a matrix sensor array are provided. The pixel array includes at least one pixel unit and a gate driver. The pixel unit includes a pixel circuit and an open area. The pixel circuit includes a thin film transistor (TFT) and a physical quantity conversion device. The TFT includes gate terminal, source terminal, and drain terminals. The source terminal is coupled to a corresponding data line. The physical quantity conversion device is coupled to the drain terminal of the TFT. The gate driver is disposed in a corresponding pixel unit and a scan line outputted by the gate driver is coupled to the gate terminal in the corresponding pixel unit. The gate driver is disposed adjacent to one of the at least one pixel unit. The gate driver is controlled by a gate control signal to drive the at least one pixel unit.
    Type: Application
    Filed: April 16, 2020
    Publication date: July 1, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Wen-Yu Kuo, Wen-Ya Chao, Ying-Ting Liou, Wei-Chung Chen
  • Patent number: D920985
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: June 1, 2021
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Hsiu-Yu Kuo
  • Patent number: D921641
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: June 8, 2021
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Hsiu-Yu Kuo
  • Patent number: D924131
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: July 6, 2021
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Hsiu-Yu Kuo
  • Patent number: D933727
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: October 19, 2021
    Assignee: KTL INTERNATIONAL CO., LTD.
    Inventors: Ying-Chieh Liao, Yu-Kuo Liao