Patents by Inventor Anand S

Anand S has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160283116
    Abstract: In one embodiment, sequential write stream management is employed to improve the sequential nature of write data placed in a storage such as a solid state drive, notwithstanding intermingling of write commands from various sequential and nonsequential streams from multiple processor nodes in a system. In one embodiment, write data from an identified sequential write stream is placed in a storage area assigned to that particular identified sequential write stream. In another aspect, detected sequential write streams are identified as a function of write velocity of the detected stream. Other aspects are described herein.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventor: Anand S. RAMALINGAM
  • Publication number: 20160284393
    Abstract: Methods and apparatus related to cost optimized Single Level Cell (SLC) write buffering for Three Level Cell (TLC) Solid State Drives (SSDs) are described. In one embodiment, non-volatile memory includes a first region in a Single Level Cell (SLC) mode and a second region in a multiple level cell mode. A portion of the second region is moved from the multiple level cell mode to the SLC mode, without adding any new capacity to the non-volatile memory and without reducing any existing capacity from the non-volatile memory. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Applicant: Intel Corporation
    Inventor: Anand S. Ramalingam
  • Publication number: 20160283338
    Abstract: Apparatus, systems, and methods to implement boot operations in nonvolatile storage devices are described. In one example, a controller comprises logic to receive a shutdown notification from a host device operating system, monitor modifications to one or more an indirection table segments for the nonvolatile memory during a shutdown process, and mark the one or more indirection table segments which were modified during the shutdown for fast loading during a subsequent boot process for the host device. Other examples are also disclosed and claimed.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Applicant: Intel Corporation
    Inventor: Anand S. Ramalingam
  • Publication number: 20160282979
    Abstract: Systems, apparatuses, and methods may include a touch device having conductive traces to receive human body communication signals and user selection signals such that the human body communication signals are multiplexed with the user selection signals on the conductive traces. A processor receives the human body communication signals and the user selection signals.
    Type: Application
    Filed: March 25, 2015
    Publication date: September 29, 2016
    Inventors: Anand S. Konanur, Shwetank Kumar, Anchit Dixit, Rohit Mittal, Jaroslaw J. Sydir, Chia-Yun Kuan
  • Patent number: 9444522
    Abstract: Described herein are techniques related to near field coupling and proximity sensing operations. For example, a proximity sensor uses a coil antenna that is utilized for near field communications (NFC) functions. The proximity sensor may be integrated into an NFC module to form a single module.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: September 13, 2016
    Assignee: Intel Corporation
    Inventors: Songnan Yang, Anand S. Konanur, Ulun Karacaoglu, Hao-Han Hsu
  • Publication number: 20160260802
    Abstract: Techniques are disclosed for customization of nanowire transistor devices to provide a diverse range of channel configurations and/or material systems within the same integrated circuit die. In accordance with one example embodiment, sacrificial fins are removed and replaced with custom material stacks of arbitrary composition and strain suitable for a given application. In one such case, each of a first set of the sacrificial fins is recessed or otherwise removed and replaced with a p-type layer stack, and each of a second set of the sacrificial fins is recessed or otherwise removed and replaced with an n-type layer stack. The p-type layer stack can be completely independent of the process for the n-type layer stack, and vice-versa. Numerous other circuit configurations and device variations are enabled using the techniques provided herein.
    Type: Application
    Filed: May 16, 2016
    Publication date: September 8, 2016
    Applicant: INTEL CORPORATION
    Inventors: GLENN A. GLASS, KELIN J. KUHN, SEIYON KIM, ANAND S. MURTHY, DANIEL B. AUBERTINE
  • Patent number: 9437691
    Abstract: Techniques are disclosed for forming column IV transistor devices having source/drain regions with high concentrations of germanium, and exhibiting reduced parasitic resistance relative to conventional devices. In some example embodiments, the source/drain regions each include a thin p-type silicon or germanium or SiGe deposition with the remainder of the source/drain material deposition being p-type germanium or a germanium alloy (e.g., germanium:tin or other suitable strain inducer, and having a germanium content of at least 80 atomic % and 20 atomic % or less other components). In some cases, evidence of strain relaxation may be observed in the germanium rich cap layer, including misfit dislocations and/or threading dislocations and/or twins. Numerous transistor configurations can be used, including both planar and non-planar transistor structures (e.g., FinFETs and nanowire transistors), as well as strained and unstrained channel structures.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: September 6, 2016
    Assignee: INTEL CORPORATION
    Inventors: Glenn A. Glass, Anand S. Murthy
  • Patent number: 9439106
    Abstract: An embodiment includes determining estimate(s) of bandwidth for class(es) of quality of service to be implemented in base station(s) for service(s) provided to user equipment by the base station(s), determining expiration time(s) for corresponding ones of the estimate(s) of bandwidth, and communicating indications of the same toward mobile backhaul node(s). At a backhaul node, the indications are received and, based on the received indications, downstream bandwidth is modified for user equipment of different quality of service classes, wherein the downstream bandwidth passes through the mobile backhaul node toward the base station(s). Apparatus, software, and computer program products are also disclosed.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: September 6, 2016
    Assignee: Nokia Solutions and Networks Oy
    Inventors: Anand S. Bedekar, Thomas Gemmer, Joao Gustavo Kluck Gomes, Nir Zinger, Heikki-Stefan Almay, Giuseppe Targia, Raul Pombo
  • Publication number: 20160240616
    Abstract: Techniques and methods related to strained NMOS and PMOS devices without relaxed substrates, systems incorporating such semiconductor devices, and methods therefor.
    Type: Application
    Filed: December 16, 2013
    Publication date: August 18, 2016
    Inventors: Stephen M. CEA, Roza KOTLYAR, Harold W. KENNEL, Anand S. MURTHY, Glenn A. GLASS, Kelin J. KUHN, Tahir GHANI
  • Publication number: 20160240534
    Abstract: Techniques are disclosed for improving gate control over the channel of a transistor, by increasing the effective electrical gate length (Leff) through deposition of a gate control layer (GCL) at the interfaces of the channel with the source and drain regions. The GCL is a nominally undoped layer (or substantially lower doped layer, relative to the heavily doped S/D fill material) that can be deposited when forming a transistor using replacement S/D deposition. The GCL can be selectively deposited in the S/D cavities after such cavities have been formed and before the heavily doped S/D fill material is deposited. In this manner, the GCL decreases the source and drain underlap (Xud) with the gate stack and further separates the heavily doped source and drain regions. This, in turn, increases the effective electrical gate length (Leff) and improves the control that the gate has over the channel.
    Type: Application
    Filed: December 18, 2013
    Publication date: August 18, 2016
    Applicant: INTEL CORPORATION
    Inventors: ANAND S. MURTHY, NICK LINDERT, GLENN A. GLASS
  • Publication number: 20160218777
    Abstract: Described herein are techniques related one or more systems, apparatuses, methods, etc. for reducing induced currents in a apparatus chassis. For example, a fractal slot is constructed in the apparatus chassis to reduce the induced currents, and enhance passage of magnetic fields through the apparatus chassis. In this example, the fractal slot may include a no-self loop fractal space filling curve shape to provide high impedance to the induced currents.
    Type: Application
    Filed: December 28, 2015
    Publication date: July 28, 2016
    Applicant: Intel Corporation
    Inventors: Anand S. Konanur, Ulun Karacaoglu, Songnan Yang
  • Publication number: 20160218773
    Abstract: Described herein are techniques related to near field coupling and proximity sensing operations. For example, a proximity sensor uses a coil antenna that is utilized for near field communications (NFC) functions. The proximity sensor may be integrated into an NFC module to form a single module.
    Type: Application
    Filed: April 6, 2016
    Publication date: July 28, 2016
    Applicant: Intel Corporation
    Inventors: Songnan Yang, Anand S. Konanur, Ulun Karacaoglu, Hao-Han Hsu
  • Publication number: 20160211925
    Abstract: Data can be transferred from one device to another in the Internet of Things without using a network by a touch-based human body communication (HBC) interaction between a wearable storage module and HBC-compatible interface pads on external host devices. Information on a source host device is copied to the wearable storage module when the user touches the source device's HBC interface pad, can be stored indefinitely on the wearable module, and is copied to a destination host device when the user touches the destination devices HBC interface pad. Because the interface pads only need to be simple electrodes, their size and shape can be widely varied to fit the host devices.
    Type: Application
    Filed: December 26, 2014
    Publication date: July 21, 2016
    Inventors: Jaroslaw J. Sydir, Anand S. Konanur, Ulun Karacaoglu, Anthony G. LaMarca, Stephen R. Wood
  • Patent number: 9397102
    Abstract: Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. In some example embodiments, the techniques can be used to implement the contacts of MOS transistors of a CMOS device, where an intermediate III-V semiconductor material layer is provided between the p-type and n-type source/drain regions and their respective contact metals to significantly reduce contact resistance. The intermediate III-V semiconductor material layer may have a small bandgap (e.g., lower than 0.5 eV) and/or otherwise be doped to provide the desired conductivity. The techniques can be used on numerous transistor architectures (e.g., planar, finned, and nanowire transistors), including strained and unstrained channel structures.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: July 19, 2016
    Assignee: Intel Corporation
    Inventors: Glenn A. Glass, Anand S. Murthy, Tahir Ghani
  • Publication number: 20160189860
    Abstract: Described herein are techniques related to near field coupling and wireless power transfers. A device may include a cascaded coil antenna to include a first coil antenna that is connected in series with a second coil antenna. The first and second coil antennas are independent antennas prior to cascading and are located in different surfaces of the device to establish near field coupling through front side, top side, bottom side, or corner side of the portable device. Furthermore, a flux guide may be placed in the cascaded coil antenna to facilitate magnetic flux at the first coil antenna and the second coil antenna to induce current of the same phase during receive mode. During transmit mode, the flux guide facilitates the magnetic flux at the first coil antenna and the second coil antenna to generate magnetic fields of the same direction.
    Type: Application
    Filed: December 16, 2015
    Publication date: June 30, 2016
    Applicant: Intel Corporation
    Inventors: Anand S. Konanur, Ulun Karacaoglu, Songnan Yang
  • Publication number: 20160191122
    Abstract: Described herein are techniques related one or more systems, apparatuses, methods, etc. for integrating a near field communications (NFC) coil antenna in a portable device. For example, the NFC antenna is integrated under a metal chassis of the portable device. The metal chassis and a conductive coating—that is integrated underneath the full metal chassis—are designed to include one or more slots to provide high impedance to Eddy current induced in the conductive coating.
    Type: Application
    Filed: November 3, 2015
    Publication date: June 30, 2016
    Inventors: Songnan Yang, Hao-Han Hsu, Ulun Karacaoglu, Anand S. Konanur, Yee Wei Eric Hong
  • Publication number: 20160188919
    Abstract: The disclosure generally relates to a method and apparatus for energy harvest from a proximity coupling device (PCD) by a proximity integrated circuit card. In one embodiment, the PICC includes an integrated BLE. The BLE may be exclusively charged by the external magnetic field received from the PCD. The PCD may be configured to detect when the PICC is nearby and increase its duty cycle to thereby increase the magnetic field imposed on the PICC. The PICC may include circuitry to receive and convert the magnetic field to electric potential or voltage. The voltage may be store at a capacitor for BLE's usage.
    Type: Application
    Filed: December 24, 2014
    Publication date: June 30, 2016
    Applicant: Intel Corporation
    Inventors: Jie Gao, Xintian E. Lin, Anand S. Konanur, Ulun Karacaoglu
  • Publication number: 20160179223
    Abstract: Described herein are architectures, platforms and methods for NFC-based operations in a stylus device.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: ANAND S. KONANUR, ANCHIT DIXIT, ROHIT MITTAL, SHWETANK KUMAR, ULUN KARACAOGLU, SONGNAN YANG
  • Publication number: 20160181857
    Abstract: Apparatus, system and method to provide switchable coils in a computing device, comprising: a plurality of electrically conductive coils to transfer electromagnetic energy; a sensor coupled to a processor, to select a coil from among the plurality of electrically conductive coils; a switch to energize the selected coil; and a switch controller coupled to the switch and to the processor. In some embodiments, the plurality of coils may comprise an inductive charging interface. Some embodiments may further include a communication interface between the processor to the plurality of electrically conductive coils, the plurality of coils comprising an interface for near-field communications (NFC). The antenna coils may be arranged to provide improved NFC coverage when the computing device is in a respective predetermined physical configuration. Sensors may be used to detect the configuration and switch NFC communications to use a preferred antenna coil for the detected configuration.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 23, 2016
    Applicant: INTEL CORPORATION
    Inventors: Anand S. KONANUR, Songnan YANG, Ulun KARACAOGLU, Jiancheng TAO, Farid RANGI
  • Publication number: 20160180805
    Abstract: Disclosed herein is a computing device configured to send display data to a display through a near-field communication (NFC) interface. The computing device includes a chassis, a primary display, and a near-field communication interface to transmit display data to a secondary display.
    Type: Application
    Filed: March 26, 2015
    Publication date: June 23, 2016
    Applicant: Intel Corporation
    Inventors: Anand S. Konanur, Ulun Karacaoglu, Justin M. Huttula, Farid Adrangi