Patents by Inventor Anand S

Anand S has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160179376
    Abstract: A controller of a solid state drive initiates a repacking of data stored in a non-volatile memory of the solid state drive, wherein refreshing of the data stored in the non-volatile memory of the solid state drive is performed during the repacking of the data stored in the non-volatile memory of the solid state drive. Logical blocks are placed physically contiguously in an increasing order in pre-erased locations of the non-volatile memory of the solid state drive while the data stored in the non-volatile memory of the solid state drive is being repacked.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventor: Anand S. RAMALINGAM
  • Publication number: 20160174017
    Abstract: Described herein are architectures, platforms and methods for enhancing range and increasing data rates during near field communication (NFC) related functions or transactions.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 16, 2016
    Inventors: Anand S. Konanur, Niranjan Karandikar, Songnan Yang, Ulun Karacaoglu, Edward Agis
  • Publication number: 20160163802
    Abstract: Techniques are disclosed for using a high resistance layer between a III-V channel layer and a group IV substrate for semiconducting devices, such as metal-oxide-semiconductor (MOS) transistors. The high resistance layer can be used to minimize (or eliminate) current flow from source to drain that follows a path other than directly through the channel. In some cases, the high resistance layer may be a III-V wide bandgap layer. In some such cases, the wide bandgap layer may have a bandgap greater than 1.4 electron volts (eV), and may even have a bandgap greater than 2.0 eV. In other cases, the wide bandgap layer may be partially or completely converted to an insulator through oxidation or nitridation, for example. The resulting structures may be used with planar, finned, or nanowire/nanoribbon transistor architectures to help prevent substrate leakage problems.
    Type: Application
    Filed: August 23, 2013
    Publication date: June 9, 2016
    Applicant: INTEL CORPORATION
    Inventors: GLENN A. GLASS, ANAND S. MURTHY
  • Publication number: 20160162416
    Abstract: Described is a system comprising: a storage device; a bus; and a host apparatus including a host memory and a driver module, wherein the host apparatus is coupled to the storage device via the bus, wherein the driver module is operable to: retrieve a logical to physical address mapping from the host memory; and provide the logical to physical address mapping to the storage device via the bus along with a read or write operation request. Described is a method comprising: retrieving a logical to physical address mapping from a host memory; and providing the logical to physical address mapping to a storage device via a bus along with a read or write operation request. Described is a machine readable storage medium having instructions stored thereon that, when executed, cause a machine to perform the method described above.
    Type: Application
    Filed: December 8, 2014
    Publication date: June 9, 2016
    Inventors: James A. Boyd, Anand S. Ramalingam, Pallav H. Gala, John W. Carroll, Richard P. Mangold
  • Patent number: 9357586
    Abstract: In a communication network (400), wireless access points (300) utilize one or more agents (302, 306) to support the operating needs of corresponding mobile stations. Pursuant to one approach, the agent supports translation of the mobile station's end-to-end protocol-based messages to Internet Protocol-based messages that are readily ported through an Internet Protocol-friendly communication system infrastructure that preferably eschews the use of network elements that rely upon unique and/or proprietary non-Internet Protocol interfaces. Pursuant to another approach the wireless access point is able to interact on a peer-to-peer basis with other wireless access points in order to facilitate, for example, handovers and other mobility management tasks.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: May 31, 2016
    Assignee: Google Technology Holdings LLC
    Inventors: Anand S. Bedekar, Rajeev Agrawal, Venkat Gopikanth, Suresh Kalyanasundaram, Vishnu Ram Ov
  • Patent number: 9349810
    Abstract: Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. The techniques can be implemented, for example, using a standard contact stack such as a series of metals on, for example, silicon or silicon germanium (SiGe) source/drain regions. In accordance with one example such embodiment, an intermediate boron doped germanium layer is provided between the source/drain and contact metals to significantly reduce contact resistance. Numerous transistor configurations and suitable fabrication processes will be apparent in light of this disclosure, including both planar and non-planar transistor structures (e.g., FinFETs), as well as strained and unstrained channel structures. Graded buffering can be used to reduce misfit dislocation. The techniques are particularly well-suited for implementing p-type devices, but can be used for n-type devices if so desired.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: May 24, 2016
    Assignee: Intel Corporation
    Inventors: Glenn A. Glass, Anand S. Murthy, Tahir Ghani
  • Patent number: 9343559
    Abstract: Techniques are disclosed for customization of nanowire transistor devices to provide a diverse range of channel configurations and/or material systems within the same integrated circuit die. In accordance with one example embodiment, sacrificial fins are removed and replaced with custom material stacks of arbitrary composition and strain suitable for a given application. In one such case, each of a first set of the sacrificial fins is recessed or otherwise removed and replaced with a p-type layer stack, and each of a second set of the sacrificial fins is recessed or otherwise removed and replaced with an n-type layer stack. The p-type layer stack can be completely independent of the process for the n-type layer stack, and vice-versa. Numerous other circuit configurations and device variations are enabled using the techniques provided herein.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: May 17, 2016
    Assignee: INTEL CORPORATION
    Inventors: Glenn A. Glass, Kelin J. Kuhn, Seiyon Kim, Anand S. Murthy, Daniel B. Aubertine
  • Patent number: 9344934
    Abstract: A wireless access point (102) detects an indicia of a change in wireless connectivity of a mobile station (101) with respect to itself and another wireless access point (103). The wireless access point then automatically effects at least one of establishing a communication between itself and the second wireless access point regarding the change in wireless connectivity and/or establishing a temporary data tunnel as between itself and the second wireless access point. These network elements can also act to automatically establish a data flow path for the mobile station as between the second wireless access point and a network element (such as a mobility management agent (105)) that is external to the common subnet. In a preferred approach this comprises, at least in part, automatically sending a registration request to the network element other than in response to a specific request from the mobile station to send such a registration request.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: May 17, 2016
    Assignee: Google Technology Holdings LLC
    Inventors: Anand S. Bedekar, Rajeev Agrawal, Venkat Gopikanth, Suresh Kalyanasundaram, Vishnu Ram OV
  • Publication number: 20160118384
    Abstract: Techniques are disclosed for forming low contact resistance transistor devices. A p-type germanium layer is provided between p-type source/drain regions and their respective contact metals, and an n-type III-V semiconductor material layer is provided between n-type source/drain regions and their respective contact metals. The n-type III-V semiconductor material layer may have a small bandgap (e.g., <0.5 eV) and/or otherwise be doped to provide desired conductivity, and the p-type germanium layer can be doped, for example, with boron. After deposition of the III-V material over both the n-type source/drain regions and the germanium covered p-type source/drain regions, an etch-back process can be performed to take advantage of the height differential between n and p type regions to self-align contact types and expose the p-type germanium over p-type regions and thin the n-type III-V material over the n-type regions. The techniques can be used on planar and non-planar transistor architectures.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 28, 2016
    Applicant: INTEL CORPORATION
    Inventors: GLENN A. GLASS, ANAND S. MURTHY, TAHIR GHANI
  • Patent number: 9313814
    Abstract: The present disclosure relates to computer-implemented systems and methods for wireless communication via proximity detection. The method may include determining, by a computer via a plurality of induction coils in a proximity transponder, a magnetic field emitted from a base station. The computer may include one or more processors, a radio transceiver, and the proximity transponder. The method may also include transmitting, by the proximity transponder to the base station in response to the magnetic field, identification information. Additionally, the method may include receiving, from the base station, a verification of the identification information. The method may also include establishing, by the radio transceiver based at least in part on the verification, a radio connection with the base station.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: April 12, 2016
    Assignee: Intel Corporation
    Inventors: Kwan Ho Lee, Anand S. Konanur, Xintian E. Lin, Ulun Karacaoglu
  • Patent number: 9306628
    Abstract: A mechanism is described for facilitating hybrid communication between devices according to one embodiment. A method of embodiments, as described herein, includes coupling an inductive coil of a near proximity circuitry with a capacitive pad of a body area circuitry to form a hybrid circuitry, and facilitating, via the hybrid circuitry, the hybrid communication between a plurality of devices.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: April 5, 2016
    Assignee: Intel Corporation
    Inventors: Anand S. Konanur, Ulun Karacaoglu, Kwan Ho Lee, Akihiro Takagi
  • Patent number: 9305194
    Abstract: Some demonstrative embodiments include a one-touch input interface. For example, a one-touch input interface may include a hybrid Body-Area-Network (BAN) Near-Field-Communication (NFC) module to receive NFC information from a NFC device via a body of a user; and a fingerprint sensor to sense a fingerprint of the user, wherein the hybrid BAN NFC module and the fingerprint sensor are to receive the NFC information and to sense the fingerprint during a touch of the one-touch interface by the user.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: April 5, 2016
    Assignee: INTEL CORPORATION
    Inventors: Farid Adrangi, Anand S. Konanur
  • Publication number: 20160092117
    Abstract: Provided are a method and system for allocating read requests in a solid state drive coupled to a host. An arbiter in the solid state drive determines which of a plurality of channels in the solid state drive is a lightly loaded channel of a plurality of channels. Resources for processing one or more read requests intended for the determined lightly loaded channel are allocated, wherein the one or more read requests have been received from the host. The one or more read requests are placed in the determined lightly loaded channel for the processing. In certain embodiments, the lightly loaded channel is the most lightly loaded channel of the plurality of channels.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 31, 2016
    Inventors: Anand S. RAMALINGAM, Vasantha M. SRIRANJANI
  • Publication number: 20160085959
    Abstract: Generally, this disclosure provides systems, devices, methods and computer readable media for prevention of cable swap security attacks on storage devices. A host system may include a provisioning module configured to generate a challenge-response verification key-pair and further to provide the key-pair to the storage device to enable the challenge-response verification. The system may also include a link error detection module to detect a link error between the host system and the storage device. The system may further include a challenge-response protocol module configured to initiate, in response to the link-error detection, a verification challenge from the storage system and to provide a response to the verification challenge based on the key-pair.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 24, 2016
    Applicant: Intel Corporation
    Inventors: SANJEEV N. TRIKA, JASON COX, ANAND S. RAMALINGAM
  • Publication number: 20160086951
    Abstract: Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance.
    Type: Application
    Filed: November 20, 2015
    Publication date: March 24, 2016
    Inventors: Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Annalisa Cappellani, Stephen M. Cea, Rafael Rios, Glenn A. Glass
  • Publication number: 20160073221
    Abstract: Described herein are techniques related one or more systems, apparatuses, methods, etc. for integrating a near field communications (NFC) coil antenna in a portable device. For example, the NFC antenna is integrated under a metal chassis of the portable device. The metal chassis and a conductive coating—that is integrated underneath the full metal chassis—are designed to include one or more slots to provide high impedance to Eddy current induced in the conductive coating.
    Type: Application
    Filed: November 16, 2015
    Publication date: March 10, 2016
    Applicant: INTEL CORPORATION
    Inventors: Songnan Yang, Hao-Han Hsu, Ulun Karacaoglu, Anand S. Konanur, Yee Wei Eric Hong
  • Publication number: 20160071934
    Abstract: Techniques are disclosed for incorporating high mobility strained channels into fin-based transistors (e.g., FinFETs such as double-gate, trigate, etc), wherein a stress material is cladded onto the channel area of the fin. In one example embodiment, silicon germanium (SiGe) is cladded onto silicon fins to provide a desired stress, although other fin and cladding materials can be used. The techniques are compatible with typical process flows, and the cladding deposition can occur at a plurality of locations within the process flow. In some cases, the built-in stress from the cladding layer may be enhanced with a source/drain stressor that compresses both the fin and cladding layers in the channel. In some cases, an optional capping layer can be provided to improve the gate dielectric/semiconductor interface. In one such embodiment, silicon is provided over a SiGe cladding layer to improve the gate dielectric/semiconductor interface.
    Type: Application
    Filed: November 9, 2015
    Publication date: March 10, 2016
    Applicant: Intel Corporation
    Inventors: Stephen M. Cea, Anand S. Murthy, Glenn A. Glass, Daniel B. Aubertine, Tahir Ghani, Jack T. Kavalieros, Roza Kotlyar
  • Patent number: 9281118
    Abstract: Described herein are techniques related to near field coupling and wireless power transfers. A device may include a cascaded coil antenna to include a first coil antenna that is connected in series with a second coil antenna. The first and second coil antennas are independent antennas prior to cascading and are located in different surfaces of the device to establish near field coupling through front side, top side, bottom side, or corner side of the portable device. Furthermore, a flux guide may be placed in the cascaded coil antenna to facilitate magnetic flux at the first coil antenna and the second coil antenna to induce current of the same phase during receive mode. During transmit mode, the flux guide facilitates the magnetic flux at the first coil antenna and the second coil antenna to generate magnetic fields of the same direction.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: March 8, 2016
    Assignee: Intel Corporation
    Inventors: Anand S Konanur, Ulun Karacaoglu, Songnan Yang
  • Publication number: 20160066128
    Abstract: Described herein are techniques related to near field coupling and WLAN dual-band operations. For example, a WLAN dual-band utilizes the same coil antenna that is utilized for near field communications (NFC) functions. The WLAN dual-band may be integrated into an NFC module to form a single module.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 3, 2016
    Inventors: Anand S. Konanur, Ulun Karacaoglu, Songnan Yang
  • Patent number: 9276624
    Abstract: According to one embodiment disclosed herein, there is provided an antenna module including a self-identification mechanism that may be used by one or more wireless circuits for management purposes. The self-identification mechanism may, for example, take the form of an integrated circuit (IC) device or chip that stores a serial number that may function as a unique identifier for an antenna on which it is mounted or associated. In one embodiment, a wireless module, for example containing RF components for sending and receiving signals from the antenna, queries the serial number device, and acquires the serial number for the antenna. The wireless module can use the serial number for any number of purposes, and in particular to verify that the antenna connected is a compliant antenna that will operate within the range, within the limits, and/or with the performance specified for the radio circuits within the wireless module.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: March 1, 2016
    Assignee: Intel Corporation
    Inventors: Ulun Karacaoglu, Robert Paxman, Anand S Konanur