Abstract: A semiconductor device comprises a transistor. The transistor includes a source region, a drain region, a body region, a drift zone, and a gate electrode being adjacent to the body region. The body region, the drift zone, the source region and the drain region are disposed in a first semiconductor layer having a first main surface. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The transistor further comprises a drift control region arranged adjacent to the drift zone, the drift control region being disposed over the first main surface.

Abstract: A method of operating a closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor comprises a culture liquid and is partially or completely surrounded by water of a water body. A density difference between the culture liquid and the surrounding water is provided so that the position of the photobioreactor in the water body is controlled. A closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor is adapted to comprise a culture liquid and to be partially or completely surrounded by water of a water body. The photobioreactor comprises means for determining the density difference between the culture liquid and the surrounding water.

Abstract: A method for producing a semiconductor device is disclosed. The method includes providing a semiconductor body having a first surface, and a second surface opposite the first surface, producing a first trench having a bottom and sidewalls and extending from the first surface into the semiconductor body, forming a dielectric layer along at least one sidewall of the trench, and filling the trench with a filling material. Forming the dielectric layer includes forming a protection layer on the least one sidewall such that the protection layer leaves a section of the at least one sidewall uncovered, oxidizing the semiconductor body in the region of the uncovered sidewall section to form a first section of the dielectric layer, removing the protection layer, and forming a second section of the dielectric layer on the at least one sidewall.

Abstract: An integrated circuit including a semiconductor device has a power component including a plurality of trenches in a cell array, the plurality of trenches running in a first direction, and a sensor component integrated into the cell array of the power component and including a sensor cell having an area which is smaller than an area of the cell array of the power component. The integrated circuit further includes isolation trenches disposed between the sensor component and the power component, an insulating material being disposed in the isolation trenches. The isolation trenches run in a second direction that is different from the first direction.

Abstract: A semiconductor device includes a transistor, formed in a semiconductor substrate having a first main surface. The transistor includes a channel region, doped with dopants of a first conductivity type, a source region, a drain region, the source and the drain region being doped with dopants of a second conductivity type different from the first conductivity type, a drain extension region, and a gate electrode adjacent to the channel region. The channel region is disposed in a first portion of a ridge. The drain extension region is disposed in a second portion of the ridge, and includes a core portion doped with the first conductivity type. The drain extension region further includes a cover portion doped with the second conductivity type, the cover portion being adjacent to at least one or two sidewalls of the second portion of the ridge.

Abstract: A semiconductor device is manufactured in a semiconductor substrate comprising a first main surface, the semiconductor substrate including chip areas. The method of manufacturing the semiconductor substrate comprises forming components of the semiconductor device in the first main surface in the chip areas, removing substrate material from a second main surface of the semiconductor substrate, the second main surface being opposite to the first main surface, forming a separation trench into a first main surface of the semiconductor substrate, the separation trench being disposed between adjacent chip areas. The method further comprises forming at least one sacrificial material in the separation trench, and removing the at least one sacrificial material from the trench.

Abstract: One embodiment of a semiconductor device includes a fin on a first side of a semiconductor body. The semiconductor device further includes a body region of a second conductivity type in at least a part of the fin. The semiconductor device further includes a drain extension region of a first conductivity type, a source and a drain region of the first conductivity type, and a gate structure adjoining opposing walls of the fin. The body region and the drain extension region are arranged one after another between the source region and the drain region.

Abstract: A semiconductor device comprises a transistor formed in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode being adjacent to the channel region. The gate electrode is configured to control a conductivity of a channel formed in the channel region, the channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a first ridge extending along the first direction, and the transistor includes a first field plate arranged adjacent to the drift zone.

Abstract: A semiconductor device includes a transistor, formed in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode being adjacent to the channel region, the gate electrode configured to control a conductivity of a channel formed in the channel region. The channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a ridge extending along the first direction and the drift zone including a superjunction layer stack.

Abstract: A method for producing a semiconductor component with a semiconductor body includes providing a substrate of a first conductivity type. A buried semiconductor layer of a second conductivity type is provided on the substrate. A functional unit semiconductor layer is provided on the buried semiconductor layer. At least one trench, which reaches into the substrate, is formed in the semiconductor body. An insulating layer is formed, which covers inner walls of the trench and electrically insulates the trench interior from the functional unit semiconductor layer and the buried semiconductor layer, the insulating layer having at least one opening in the region of the trench bottom. The at least one trench is filled with an electrically conductive semiconductor material of the first conductivity type, wherein the electrically conductive semiconductor material forms an electrical contact from a surface of the semiconductor body to the substrate.

Abstract: A semiconductor device is at least partially formed in a semiconductor substrate, the substrate including first and second opposing main surfaces. The semiconductor device includes a cell field portion and a contact area, the contact area being electrically coupled to the cell field portion, the cell field portion including at least a transistor. The contact area includes a connection substrate portion insulated from other substrate portions and including a part of the semiconductor substrate, an electrode adjacent to the second main surface and in contact with the connection substrate portion, and a metal layer disposed over the first main surface, the connection substrate portion being electrically coupled to the metal layer to form an ohmic contact between the electrode and metal layer. The connection substrate portion is not electrically coupled to a component of the cell field portion by a conductive material disposed between the first and second main surfaces.

Abstract: A semiconductor device is formed in a semiconductor substrate comprising a first main surface and includes a control gate disposed in a lower portion of a first trench formed in the first main surface, a floating gate disposed in the first trench above the control gate and insulated from the control gate, a source region of a first conductivity type, a body region of a second conductivity type, and a drain region of the first conductivity type.

Abstract: Disclosed is a method for producing a controllable semiconductor component. In a semiconductor body with a top side and a bottom side, a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body are formed in a common etching process. The first trench has a first width and the second trench has a second width greater than the first width. Then, in a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. Subsequently, the oxide layer is removed from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.

Abstract: One embodiment of a semiconductor device includes a semiconductor body with a first side and a second side opposite to the first side. The semiconductor device further includes a first contact trench extending into the semiconductor body at the first side. The first contact trench includes a first conductive material electrically coupled to the semiconductor body adjoining the first contact trench. The semiconductor further includes a second contact trench extending into the semiconductor body at the second side. The second contact trench includes a second conductive material electrically coupled to the semiconductor body adjoining the second contact trench.

Abstract: A semiconductor device includes a transistor cell array in the semiconductor body of a first conductivity type. The semiconductor device further includes a first trench in the transistor cell array between transistor cells. The first trench extends into the semiconductor body from a first side and includes a pn junction diode electrically coupled to the semiconductor body at a sidewall.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Abstract: A bridge circuit is provided. The bridge circuit includes a first integrated semiconductor device having a high-side switch, a second integrated semiconductor device having a low-side switch electrically connected with the high-side switch, a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device, and a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device. Further, an integrated semiconductor device is provided.

Abstract: A semiconductor device a field of transistor cells integrated in a semiconductor body. A number of the transistor cells forming a power transistor and at least one of the transistor cells forming a sense transistor. A first source electrode is arranged on the semiconductor body electrically connected to the transistor cell(s) of the sense transistor but electrically isolated from the transistor cells of the power transistor. A second source electrode is arranged on the semiconductor body and covers the transistor cells of both the power transistor and the sense transistor, and at least partially covering the first source electrode in such a manner that the second source electrode is electrically connected only to the transistor cells of the power transistor but electrically isolated from the transistor cells of the sense transistor.

Abstract: A monolithically integrated power semiconductor component includes a semiconductor body having first and second regions each extending from a first surface of the semiconductor body to a second opposing surface of the body. A power field effect transistor structure formed in the first region has a first load terminal on the first surface and a second load terminal on the second surface. A power diode formed in the second region has a first load terminal on the first surface and a second load terminal on the second surface. The second load terminals of the power field effect transistor structure and power diode are formed by a common load terminal. An edge termination structure is arranged adjacent to the first surface and in a horizontal direction between the first load terminal of the power field effect transistor structure and the first load terminal of the power diode.

Abstract: Described herein are embodiments of a vertical power transistor having drain and gate terminals located on the same side of a semiconductor body and capable of withstanding high voltages in the off-state, in particular voltages of more than 100V.